]> rtime.felk.cvut.cz Git - can-eth-gw-linux.git/commitdiff
ARM: tegra: tamonten: Add DDC/PTA pinmux
authorThierry Reding <thierry.reding@avionic-design.de>
Fri, 9 Nov 2012 13:04:50 +0000 (14:04 +0100)
committerStephen Warren <swarren@nvidia.com>
Thu, 15 Nov 2012 22:07:29 +0000 (15:07 -0700)
This commit allows the I2C2 controller on Tegra20 to be routed either to
the DDC or the PTA pin group at runtime. On Tamonten this allows the I2C
bus to be used for the DDC of the HDMI connector or to access I2C chips
on the carrier board.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/boot/dts/tegra20-tamonten.dtsi

index 5b3d8b157b336eafd58511500e87a4d9076828af..c3540e033e8dc9c1cfc68054b8ab14a7435e25c6 100644 (file)
                                nvidia,pins = "dap4";
                                nvidia,function = "dap4";
                        };
-                       ddc {
-                               nvidia,pins = "ddc";
-                               nvidia,function = "i2c2";
-                       };
                        dta {
                                nvidia,pins = "dta", "dtd";
                                nvidia,function = "sdio2";
@@ -91,7 +87,7 @@
                                nvidia,function = "pcie";
                        };
                        hdint {
-                               nvidia,pins = "hdint", "pta";
+                               nvidia,pins = "hdint";
                                nvidia,function = "hdmi";
                        };
                        i2cp {
                                nvidia,pull = <1>;
                        };
                };
+
+               state_i2cmux_ddc: pinmux_i2cmux_ddc {
+                       ddc {
+                               nvidia,pins = "ddc";
+                               nvidia,function = "i2c2";
+                       };
+                       pta {
+                               nvidia,pins = "pta";
+                               nvidia,function = "rsvd4";
+                       };
+               };
+
+               state_i2cmux_pta: pinmux_i2cmux_pta {
+                       ddc {
+                               nvidia,pins = "ddc";
+                               nvidia,function = "rsvd4";
+                       };
+                       pta {
+                               nvidia,pins = "pta";
+                               nvidia,function = "i2c2";
+                       };
+               };
+
+               state_i2cmux_idle: pinmux_i2cmux_idle {
+                       ddc {
+                               nvidia,pins = "ddc";
+                               nvidia,function = "rsvd4";
+                       };
+                       pta {
+                               nvidia,pins = "pta";
+                               nvidia,function = "rsvd4";
+                       };
+               };
        };
 
        i2s@70002800 {
                status = "okay";
        };
 
+       i2c@7000c400 {
+               clock-frequency = <100000>;
+               status = "okay";
+       };
+
+       i2cmux {
+               compatible = "i2c-mux-pinctrl";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               i2c-parent = <&{/i2c@7000c400}>;
+
+               pinctrl-names = "ddc", "pta", "idle";
+               pinctrl-0 = <&state_i2cmux_ddc>;
+               pinctrl-1 = <&state_i2cmux_pta>;
+               pinctrl-2 = <&state_i2cmux_idle>;
+
+               i2c@0 {
+                       reg = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               i2c@1 {
+                       reg = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+
        i2c@7000d000 {
                clock-frequency = <400000>;
                status = "okay";