]> rtime.felk.cvut.cz Git - can-eth-gw-linux.git/commitdiff
ARM: tegra: apbio access using dma for tegra20 only
authorLaxman Dewangan <ldewangan@nvidia.com>
Wed, 20 Jun 2012 12:36:34 +0000 (18:06 +0530)
committerStephen Warren <swarren@nvidia.com>
Fri, 6 Jul 2012 17:48:56 +0000 (11:48 -0600)
The Tegra20 HW issue with accessing APBIO registers (such
as fuse registers) directly from the CPU concurrently with
APB DMA accesses has been fixed in Tegra30 and later chips.

Access these registers directly from the CPU on Tegra30
and later, and apply the workaround only for Tegra20.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Chaitanya Bandi <bandik@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/apbio.c
arch/arm/mach-tegra/apbio.h
arch/arm/mach-tegra/common.c

index 2eb4445ddb1435648cdba9d587d50fa8c8b7a04a..e9f48ec00ca7311703b2c01a58e8fe75384d948c 100644 (file)
@@ -8,6 +8,7 @@ obj-y                                   += timer.o
 obj-y                                  += fuse.o
 obj-y                                  += pmc.o
 obj-y                                  += flowctrl.o
+obj-y                                  += apbio.o
 obj-$(CONFIG_CPU_IDLE)                 += cpuidle.o
 obj-$(CONFIG_CPU_IDLE)                 += sleep.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)                += powergate.o
@@ -18,7 +19,7 @@ obj-$(CONFIG_ARCH_TEGRA_3x_SOC)               += tegra30_clocks.o
 obj-$(CONFIG_SMP)                      += platsmp.o headsmp.o
 obj-$(CONFIG_SMP)                       += reset.o
 obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
-obj-$(CONFIG_TEGRA_SYSTEM_DMA)         += dma.o apbio.o
+obj-$(CONFIG_TEGRA_SYSTEM_DMA)         += dma.o
 obj-$(CONFIG_CPU_FREQ)                  += cpu-tegra.o
 obj-$(CONFIG_TEGRA_PCI)                        += pcie.o
 obj-$(CONFIG_USB_SUPPORT)              += usb_phy.o
index e75451e517bdd2b55a4c94bc17be3abaddc24c1c..74ac0db5373989ff362932e315f34d64f14b418b 100644 (file)
 
 #include <linux/kernel.h>
 #include <linux/io.h>
+#include <mach/iomap.h>
+#include <linux/of.h>
+
+#ifdef CONFIG_TEGRA_SYSTEM_DMA
 #include <linux/dma-mapping.h>
 #include <linux/spinlock.h>
 #include <linux/completion.h>
@@ -22,7 +26,6 @@
 #include <linux/mutex.h>
 
 #include <mach/dma.h>
-#include <mach/iomap.h>
 
 #include "apbio.h"
 
@@ -33,6 +36,9 @@ static u32 *tegra_apb_bb;
 static dma_addr_t tegra_apb_bb_phys;
 static DECLARE_COMPLETION(tegra_apb_wait);
 
+static u32 tegra_apb_readl_direct(unsigned long offset);
+static void tegra_apb_writel_direct(u32 value, unsigned long offset);
+
 bool tegra_apb_init(void)
 {
        struct tegra_dma_channel *ch;
@@ -72,13 +78,13 @@ static void apb_dma_complete(struct tegra_dma_req *req)
        complete(&tegra_apb_wait);
 }
 
-u32 tegra_apb_readl(unsigned long offset)
+static u32 tegra_apb_readl_using_dma(unsigned long offset)
 {
        struct tegra_dma_req req;
        int ret;
 
        if (!tegra_apb_dma && !tegra_apb_init())
-               return readl(IO_TO_VIRT(offset));
+               return tegra_apb_readl_direct(offset);
 
        mutex_lock(&tegra_apb_dma_lock);
        req.complete = apb_dma_complete;
@@ -108,13 +114,13 @@ u32 tegra_apb_readl(unsigned long offset)
        return *((u32 *)tegra_apb_bb);
 }
 
-void tegra_apb_writel(u32 value, unsigned long offset)
+static void tegra_apb_writel_using_dma(u32 value, unsigned long offset)
 {
        struct tegra_dma_req req;
        int ret;
 
        if (!tegra_apb_dma && !tegra_apb_init()) {
-               writel(value, IO_TO_VIRT(offset));
+               tegra_apb_writel_direct(value, offset);
                return;
        }
 
@@ -143,3 +149,46 @@ void tegra_apb_writel(u32 value, unsigned long offset)
 
        mutex_unlock(&tegra_apb_dma_lock);
 }
+#else
+#define tegra_apb_readl_using_dma tegra_apb_readl_direct
+#define tegra_apb_writel_using_dma tegra_apb_writel_direct
+#endif
+
+typedef u32 (*apbio_read_fptr)(unsigned long offset);
+typedef void (*apbio_write_fptr)(u32 value, unsigned long offset);
+
+static apbio_read_fptr apbio_read;
+static apbio_write_fptr apbio_write;
+
+static u32 tegra_apb_readl_direct(unsigned long offset)
+{
+       return readl(IO_TO_VIRT(offset));
+}
+
+static void tegra_apb_writel_direct(u32 value, unsigned long offset)
+{
+       writel(value, IO_TO_VIRT(offset));
+}
+
+void tegra_apb_io_init(void)
+{
+       /* Need to use dma only when it is Tegra20 based platform */
+       if (of_machine_is_compatible("nvidia,tegra20") ||
+                       !of_have_populated_dt()) {
+               apbio_read = tegra_apb_readl_using_dma;
+               apbio_write = tegra_apb_writel_using_dma;
+       } else {
+               apbio_read = tegra_apb_readl_direct;
+               apbio_write = tegra_apb_writel_direct;
+       }
+}
+
+u32 tegra_apb_readl(unsigned long offset)
+{
+       return apbio_read(offset);
+}
+
+void tegra_apb_writel(u32 value, unsigned long offset)
+{
+       apbio_write(value, offset);
+}
index 8b49e8c89a648993ec7452d2550a5552998c03c6..f05d71c303c75979abd43ebb1f079920a156632f 100644 (file)
 #ifndef __MACH_TEGRA_APBIO_H
 #define __MACH_TEGRA_APBIO_H
 
-#ifdef CONFIG_TEGRA_SYSTEM_DMA
-
+void tegra_apb_io_init(void);
 u32 tegra_apb_readl(unsigned long offset);
 void tegra_apb_writel(u32 value, unsigned long offset);
-
-#else
-#include <asm/io.h>
-#include <mach/io.h>
-
-static inline u32 tegra_apb_readl(unsigned long offset)
-{
-        return readl(IO_TO_VIRT(offset));
-}
-
-static inline void tegra_apb_writel(u32 value, unsigned long offset)
-{
-        writel(value, IO_TO_VIRT(offset));
-}
-#endif
-
 #endif
index 204a5c8b0b574bd0cf2b46f5b0d4d1ccde87dd61..96fef6bcc65116bde2071ba6a2c46b66d6a1ed54 100644 (file)
@@ -33,6 +33,7 @@
 #include "clock.h"
 #include "fuse.h"
 #include "pmc.h"
+#include "apbio.h"
 
 /*
  * Storage for debug-macro.S's state.
@@ -127,6 +128,7 @@ static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
 void __init tegra20_init_early(void)
 {
+       tegra_apb_io_init();
        tegra_init_fuse();
        tegra2_init_clocks();
        tegra_clk_init_from_table(tegra20_clk_init_table);
@@ -138,6 +140,7 @@ void __init tegra20_init_early(void)
 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
 void __init tegra30_init_early(void)
 {
+       tegra_apb_io_init();
        tegra_init_fuse();
        tegra30_init_clocks();
        tegra_clk_init_from_table(tegra30_clk_init_table);