]> rtime.felk.cvut.cz Git - can-eth-gw-linux.git/commitdiff
ARM: ebsa110: use __iomem pointers for MMIO
authorArnd Bergmann <arnd@arndb.de>
Fri, 14 Sep 2012 20:11:12 +0000 (20:11 +0000)
committerArnd Bergmann <arnd@arndb.de>
Tue, 18 Sep 2012 08:15:12 +0000 (10:15 +0200)
ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/arm/mach-ebsa110/core.c
arch/arm/mach-ebsa110/core.h

index 6f8068692edf151ea4cbe01afc266fd334df5df8..f0fe6b5350e2abe1ca646a84c7b5997eaa0612ba 100644 (file)
@@ -74,22 +74,22 @@ static struct map_desc ebsa110_io_desc[] __initdata = {
         * sparse external-decode ISAIO space
         */
        {       /* IRQ_STAT/IRQ_MCLR */
-               .virtual        = IRQ_STAT,
+               .virtual        = (unsigned long)IRQ_STAT,
                .pfn            = __phys_to_pfn(TRICK4_PHYS),
                .length         = TRICK4_SIZE,
                .type           = MT_DEVICE
        }, {    /* IRQ_MASK/IRQ_MSET */
-               .virtual        = IRQ_MASK,
+               .virtual        = (unsigned long)IRQ_MASK,
                .pfn            = __phys_to_pfn(TRICK3_PHYS),
                .length         = TRICK3_SIZE,
                .type           = MT_DEVICE
        }, {    /* SOFT_BASE */
-               .virtual        = SOFT_BASE,
+               .virtual        = (unsigned long)SOFT_BASE,
                .pfn            = __phys_to_pfn(TRICK1_PHYS),
                .length         = TRICK1_SIZE,
                .type           = MT_DEVICE
        }, {    /* PIT_BASE */
-               .virtual        = PIT_BASE,
+               .virtual        = (unsigned long)PIT_BASE,
                .pfn            = __phys_to_pfn(TRICK0_PHYS),
                .length         = TRICK0_SIZE,
                .type           = MT_DEVICE
index c93c9e43012dfc836ec00dd3ac2e6ce8ed952a24..afe137ee172eb63026cafa34ca15823ff93dcc3a 100644 (file)
 #define TRICK7_PHYS            0xf3c00000
 
 /* Virtual addresses */
-#define PIT_BASE               0xfc000000      /* trick 0 */
-#define SOFT_BASE              0xfd000000      /* trick 1 */
-#define IRQ_MASK               0xfe000000      /* trick 3 - read */
-#define IRQ_MSET               0xfe000000      /* trick 3 - write */
-#define IRQ_STAT               0xff000000      /* trick 4 - read */
-#define IRQ_MCLR               0xff000000      /* trick 4 - write */
+#define PIT_BASE               IOMEM(0xfc000000)       /* trick 0 */
+#define SOFT_BASE              IOMEM(0xfd000000)       /* trick 1 */
+#define IRQ_MASK               IOMEM(0xfe000000)       /* trick 3 - read */
+#define IRQ_MSET               IOMEM(0xfe000000)       /* trick 3 - write */
+#define IRQ_STAT               IOMEM(0xff000000)       /* trick 4 - read */
+#define IRQ_MCLR               IOMEM(0xff000000)       /* trick 4 - write */
 
 #endif