ARM: LPC32xx: Adjust dtsi file for MLC controller configuration

This patch takes into account that the MTD NAND MLC controller needs more
registers, located actually before the previously allocated memory range,
already starting at 200a8000 instead of 200b0000.

Further, the interrupt for the controller is configured.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>

diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index 3f5dad801a9806ad3173a0d06dedc0c4a37e8388..254d586d4b1a90383e3eadece3592df75d9ef65d 100644 (file)
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -38,9 +38,10 @@
                        status = "disable";
                };
 
-               mlc: flash@200B0000 {
+               mlc: flash@200a8000 {
                        compatible = "nxp,lpc3220-mlc";
-                       reg = <0x200B0000 0x1000>;
+                       reg = <0x200a8000 0x11000>;
+                       interrupts = <11 0>;
                        status = "disable";
                };