]> rtime.felk.cvut.cz Git - can-eth-gw-linux.git/commitdiff
MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set}
authorGabor Juhos <juhosg@openwrt.org>
Wed, 14 Mar 2012 09:45:26 +0000 (10:45 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 15 May 2012 15:49:09 +0000 (17:49 +0200)
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3511/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/ath79/common.c
arch/mips/include/asm/mach-ath79/ar71xx_regs.h

index f0fda982b9650698c6b641aeeb6c38d9ea16f060..5a4adfc9d79dc3b3fe891456530ff88e20c5ff90 100644 (file)
@@ -1,9 +1,12 @@
 /*
  *  Atheros AR71XX/AR724X/AR913X common routines
  *
- *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  *
+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
+ *
  *  This program is free software; you can redistribute it and/or modify it
  *  under the terms of the GNU General Public License version 2 as published
  *  by the Free Software Foundation.
@@ -67,6 +70,8 @@ void ath79_device_reset_set(u32 mask)
                reg = AR913X_RESET_REG_RESET_MODULE;
        else if (soc_is_ar933x())
                reg = AR933X_RESET_REG_RESET_MODULE;
+       else if (soc_is_ar934x())
+               reg = AR934X_RESET_REG_RESET_MODULE;
        else
                BUG();
 
@@ -91,6 +96,8 @@ void ath79_device_reset_clear(u32 mask)
                reg = AR913X_RESET_REG_RESET_MODULE;
        else if (soc_is_ar933x())
                reg = AR933X_RESET_REG_RESET_MODULE;
+       else if (soc_is_ar934x())
+               reg = AR934X_RESET_REG_RESET_MODULE;
        else
                BUG();
 
index d6af4eb5d2c02e547f2e13d584143e984fc1294b..32abbf984a997da2b234070cbcc809f52a37070c 100644 (file)
 #define AR933X_RESET_REG_RESET_MODULE          0x1c
 #define AR933X_RESET_REG_BOOTSTRAP             0xac
 
+#define AR934X_RESET_REG_RESET_MODULE          0x1c
 #define AR934X_RESET_REG_BOOTSTRAP             0xb0
 #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS  0xac