F: arch/arm/mach-cns3xxx/
T: git git://git.infradead.org/users/cbou/linux-cns3xxx.git
+ARM/CIRRUS LOGIC CLPS711X ARM ARCHITECTURE
+M: Alexander Shiyan <shc_work@mail.ru>
+L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S: Odd Fixes
+F: arch/arm/mach-clps711x/
+
ARM/CIRRUS LOGIC EP93XX ARM ARCHITECTURE
M: Hartley Sweeten <hsweeten@visionengravers.com>
M: Ryan Mallon <rmallon@gmail.com>
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
select ARCH_REQUIRE_GPIOLIB
select ARCH_USES_GETTIMEOFFSET
+ select AUTO_ZRELADDR
select CLKDEV_LOOKUP
select COMMON_CLK
select CPU_ARM720T
select GENERIC_CLOCKEVENTS
+ select MULTI_IRQ_HANDLER
select NEED_MACH_MEMORY_H
+ select SPARSE_IRQ
help
Support for Cirrus Logic 711x/721x/731x based boards.
OBJS += head-shark.o ofw-shark.o
endif
-ifeq ($(CONFIG_ARCH_P720T),y)
-# Borrow this code from SA1100
-OBJS += head-sa1100.o
-endif
-
ifeq ($(CONFIG_ARCH_SA1100),y)
OBJS += head-sa1100.o
endif
-CONFIG_EXPERIMENTAL=y
+CONFIG_KERNEL_LZMA=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
+CONFIG_RD_LZMA=y
CONFIG_EMBEDDED=y
+CONFIG_SLOB=y
+CONFIG_JUMP_LABEL=y
+# CONFIG_LBDAF is not set
CONFIG_PARTITION_ADVANCED=y
-# CONFIG_MSDOS_PARTITION is not set
+# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_CLPS711X=y
CONFIG_ARCH_AUTCPU12=y
CONFIG_ARCH_CDB89712=y
CONFIG_ARCH_EDB7211=y
CONFIG_ARCH_P720T=y
CONFIG_ARCH_FORTUNET=y
+CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
+# CONFIG_COREDUMP is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_IRDA=y
CONFIG_IRTTY_SIR=y
CONFIG_EP7211_DONGLE=y
+# CONFIG_WIRELESS is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_CDB89712=y
CONFIG_MTD_AUTCPU12=y
CONFIG_MTD_PLATRAM=y
-CONFIG_BLK_DEV_RAM=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_GPIO=y
CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_NET_VENDOR_AMD is not set
+# CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
CONFIG_CS89x0=y
+CONFIG_CS89x0_PLATFORM=y
# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_FUJITSU is not set
-# CONFIG_NET_VENDOR_HP is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_VT is not set
CONFIG_SERIAL_CLPS711X_CONSOLE=y
# CONFIG_HW_RANDOM is not set
+CONFIG_SPI=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
# CONFIG_HWMON is not set
CONFIG_FB=y
CONFIG_FB_CLPS711X=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_PLATFORM=y
# CONFIG_USB_SUPPORT is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_EXT2_FS=y
+CONFIG_CRAMFS=y
CONFIG_MINIX_FS=y
# CONFIG_NETWORK_FILESYSTEMS is not set
# CONFIG_FTRACE is not set
config ARCH_CDB89712
bool "CDB89712"
- select ISA
help
This is an evaluation board from Cirrus for the CS89712 processor.
The board includes 2 serial ports, Ethernet, IRDA, and expansion
bool "EDB7211"
select ARCH_SELECT_MEMORY_MODEL
select ARCH_SPARSEMEM_ENABLE
- select ISA
help
Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
evaluation board.
obj-n :=
obj- :=
-obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o
-obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o
-obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o
-obj-$(CONFIG_ARCH_EDB7211) += edb7211.o
-obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o
-obj-$(CONFIG_ARCH_P720T) += p720t.o
+obj-$(CONFIG_ARCH_AUTCPU12) += board-autcpu12.o
+obj-$(CONFIG_ARCH_CDB89712) += board-cdb89712.o
+obj-$(CONFIG_ARCH_CLEP7312) += board-clep7312.o
+obj-$(CONFIG_ARCH_EDB7211) += board-edb7211.o
+obj-$(CONFIG_ARCH_FORTUNET) += board-fortunet.o
+obj-$(CONFIG_ARCH_P720T) += board-p720t.o
# The standard locations for stuff on CLPS711x type processors
- zreladdr-y += 0xc0028000
params_phys-y := 0xc0000100
# Should probably have some agreement on these...
initrd_phys-$(CONFIG_ARCH_P720T) := 0xc0400000
+++ /dev/null
-/*
- * linux/arch/arm/mach-clps711x/autcpu12.c
- *
- * (c) 2001 Thomas Gleixner, autronix automation <gleixner@autronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/io.h>
-#include <linux/ioport.h>
-#include <linux/platform_device.h>
-
-#include <mach/hardware.h>
-#include <asm/sizes.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-
-#include <asm/mach/map.h>
-#include <mach/autcpu12.h>
-
-#include "common.h"
-
-static struct map_desc autcpu12_io_desc[] __initdata = {
- /* Memory-mapped extra io and CS8900A Ethernet chip */
- {
- .virtual = IO_ADDRESS(AUTCPU12_PHYS_CS8900A),
- .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A),
- .length = SZ_1M,
- .type = MT_DEVICE
- }
-};
-
-void __init autcpu12_map_io(void)
-{
- clps711x_map_io();
- iotable_init(autcpu12_io_desc, ARRAY_SIZE(autcpu12_io_desc));
-}
-
-static struct resource autcpu12_nvram_resource[] __initdata = {
- DEFINE_RES_MEM_NAMED(AUTCPU12_PHYS_NVRAM, SZ_128K, "SRAM"),
-};
-
-static struct platform_device autcpu12_nvram_pdev __initdata = {
- .name = "autcpu12_nvram",
- .id = -1,
- .resource = autcpu12_nvram_resource,
- .num_resources = ARRAY_SIZE(autcpu12_nvram_resource),
-};
-
-static void __init autcpu12_init(void)
-{
- platform_device_register(&autcpu12_nvram_pdev);
-}
-
-MACHINE_START(AUTCPU12, "autronix autcpu12")
- /* Maintainer: Thomas Gleixner */
- .atag_offset = 0x20000,
- .init_machine = autcpu12_init,
- .map_io = autcpu12_map_io,
- .init_irq = clps711x_init_irq,
- .timer = &clps711x_timer,
- .restart = clps711x_restart,
-MACHINE_END
-
--- /dev/null
+/*
+ * linux/arch/arm/mach-clps711x/autcpu12.c
+ *
+ * (c) 2001 Thomas Gleixner, autronix automation <gleixner@autronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand-gpio.h>
+#include <linux/platform_device.h>
+#include <linux/basic_mmio_gpio.h>
+
+#include <mach/hardware.h>
+#include <asm/sizes.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+
+#include <asm/mach/map.h>
+#include <mach/autcpu12.h>
+
+#include "common.h"
+
+#define AUTCPU12_CS8900_BASE (CS2_PHYS_BASE + 0x300)
+#define AUTCPU12_CS8900_IRQ (IRQ_EINT3)
+
+#define AUTCPU12_SMC_BASE (CS1_PHYS_BASE + 0x06000000)
+#define AUTCPU12_SMC_SEL_BASE (AUTCPU12_SMC_BASE + 0x10)
+
+#define AUTCPU12_MMGPIO_BASE (CLPS711X_NR_GPIO)
+#define AUTCPU12_SMC_NCE (AUTCPU12_MMGPIO_BASE + 0) /* Bit 0 */
+#define AUTCPU12_SMC_RDY CLPS711X_GPIO(1, 2)
+#define AUTCPU12_SMC_ALE CLPS711X_GPIO(1, 3)
+#define AUTCPU12_SMC_CLE CLPS711X_GPIO(1, 3)
+
+static struct resource autcpu12_cs8900_resource[] __initdata = {
+ DEFINE_RES_MEM(AUTCPU12_CS8900_BASE, SZ_1K),
+ DEFINE_RES_IRQ(AUTCPU12_CS8900_IRQ),
+};
+
+static struct resource autcpu12_nvram_resource[] __initdata = {
+ DEFINE_RES_MEM_NAMED(AUTCPU12_PHYS_NVRAM, SZ_128K, "SRAM"),
+};
+
+static struct platform_device autcpu12_nvram_pdev __initdata = {
+ .name = "autcpu12_nvram",
+ .id = -1,
+ .resource = autcpu12_nvram_resource,
+ .num_resources = ARRAY_SIZE(autcpu12_nvram_resource),
+};
+
+static struct resource autcpu12_nand_resource[] __initdata = {
+ DEFINE_RES_MEM(AUTCPU12_SMC_BASE, SZ_16),
+};
+
+static struct mtd_partition autcpu12_nand_parts[] __initdata = {
+ {
+ .name = "Flash partition 1",
+ .offset = 0,
+ .size = SZ_8M,
+ },
+ {
+ .name = "Flash partition 2",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static void __init autcpu12_adjust_parts(struct gpio_nand_platdata *pdata,
+ size_t sz)
+{
+ switch (sz) {
+ case SZ_16M:
+ case SZ_32M:
+ break;
+ case SZ_64M:
+ case SZ_128M:
+ pdata->parts[0].size = SZ_16M;
+ break;
+ default:
+ pr_warn("Unsupported SmartMedia device size %u\n", sz);
+ break;
+ }
+}
+
+static struct gpio_nand_platdata autcpu12_nand_pdata __initdata = {
+ .gpio_rdy = AUTCPU12_SMC_RDY,
+ .gpio_nce = AUTCPU12_SMC_NCE,
+ .gpio_ale = AUTCPU12_SMC_ALE,
+ .gpio_cle = AUTCPU12_SMC_CLE,
+ .gpio_nwp = -1,
+ .chip_delay = 20,
+ .parts = autcpu12_nand_parts,
+ .num_parts = ARRAY_SIZE(autcpu12_nand_parts),
+ .adjust_parts = autcpu12_adjust_parts,
+};
+
+static struct platform_device autcpu12_nand_pdev __initdata = {
+ .name = "gpio-nand",
+ .id = -1,
+ .resource = autcpu12_nand_resource,
+ .num_resources = ARRAY_SIZE(autcpu12_nand_resource),
+ .dev = {
+ .platform_data = &autcpu12_nand_pdata,
+ },
+};
+
+static struct resource autcpu12_mmgpio_resource[] __initdata = {
+ DEFINE_RES_MEM_NAMED(AUTCPU12_SMC_SEL_BASE, SZ_1, "dat"),
+};
+
+static struct bgpio_pdata autcpu12_mmgpio_pdata __initdata = {
+ .base = AUTCPU12_MMGPIO_BASE,
+ .ngpio = 8,
+};
+
+static struct platform_device autcpu12_mmgpio_pdev __initdata = {
+ .name = "basic-mmio-gpio",
+ .id = -1,
+ .resource = autcpu12_mmgpio_resource,
+ .num_resources = ARRAY_SIZE(autcpu12_mmgpio_resource),
+ .dev = {
+ .platform_data = &autcpu12_mmgpio_pdata,
+ },
+};
+
+static void __init autcpu12_init(void)
+{
+ platform_device_register_simple("video-clps711x", 0, NULL, 0);
+ platform_device_register_simple("cs89x0", 0, autcpu12_cs8900_resource,
+ ARRAY_SIZE(autcpu12_cs8900_resource));
+ platform_device_register(&autcpu12_mmgpio_pdev);
+ platform_device_register(&autcpu12_nvram_pdev);
+}
+
+static void __init autcpu12_init_late(void)
+{
+ if (IS_ENABLED(MTD_NAND_GPIO) && IS_ENABLED(GPIO_GENERIC_PLATFORM)) {
+ /* We are need both drivers to handle NAND */
+ platform_device_register(&autcpu12_nand_pdev);
+ }
+}
+
+MACHINE_START(AUTCPU12, "autronix autcpu12")
+ /* Maintainer: Thomas Gleixner */
+ .atag_offset = 0x20000,
+ .nr_irqs = CLPS711X_NR_IRQS,
+ .map_io = clps711x_map_io,
+ .init_irq = clps711x_init_irq,
+ .timer = &clps711x_timer,
+ .init_machine = autcpu12_init,
+ .init_late = autcpu12_init_late,
+ .handle_irq = clps711x_handle_irq,
+ .restart = clps711x_restart,
+MACHINE_END
+
--- /dev/null
+/*
+ * linux/arch/arm/mach-clps711x/cdb89712.c
+ *
+ * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/plat-ram.h>
+#include <linux/mtd/partitions.h>
+
+#include <mach/hardware.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include "common.h"
+
+#define CDB89712_CS8900_BASE (CS2_PHYS_BASE + 0x300)
+#define CDB89712_CS8900_IRQ (IRQ_EINT3)
+
+static struct resource cdb89712_cs8900_resource[] __initdata = {
+ DEFINE_RES_MEM(CDB89712_CS8900_BASE, SZ_1K),
+ DEFINE_RES_IRQ(CDB89712_CS8900_IRQ),
+};
+
+static struct mtd_partition cdb89712_flash_partitions[] __initdata = {
+ {
+ .name = "Flash",
+ .offset = 0,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data cdb89712_flash_pdata __initdata = {
+ .width = 4,
+ .probe_type = "map_rom",
+ .parts = cdb89712_flash_partitions,
+ .nr_parts = ARRAY_SIZE(cdb89712_flash_partitions),
+};
+
+static struct resource cdb89712_flash_resources[] __initdata = {
+ DEFINE_RES_MEM(CS0_PHYS_BASE, SZ_8M),
+};
+
+static struct platform_device cdb89712_flash_pdev __initdata = {
+ .name = "physmap-flash",
+ .id = 0,
+ .resource = cdb89712_flash_resources,
+ .num_resources = ARRAY_SIZE(cdb89712_flash_resources),
+ .dev = {
+ .platform_data = &cdb89712_flash_pdata,
+ },
+};
+
+static struct mtd_partition cdb89712_bootrom_partitions[] __initdata = {
+ {
+ .name = "BootROM",
+ .offset = 0,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data cdb89712_bootrom_pdata __initdata = {
+ .width = 4,
+ .probe_type = "map_rom",
+ .parts = cdb89712_bootrom_partitions,
+ .nr_parts = ARRAY_SIZE(cdb89712_bootrom_partitions),
+};
+
+static struct resource cdb89712_bootrom_resources[] __initdata = {
+ DEFINE_RES_NAMED(CS7_PHYS_BASE, SZ_128, "BOOTROM", IORESOURCE_MEM |
+ IORESOURCE_CACHEABLE | IORESOURCE_READONLY),
+};
+
+static struct platform_device cdb89712_bootrom_pdev __initdata = {
+ .name = "physmap-flash",
+ .id = 1,
+ .resource = cdb89712_bootrom_resources,
+ .num_resources = ARRAY_SIZE(cdb89712_bootrom_resources),
+ .dev = {
+ .platform_data = &cdb89712_bootrom_pdata,
+ },
+};
+
+static struct platdata_mtd_ram cdb89712_sram_pdata __initdata = {
+ .bankwidth = 4,
+};
+
+static struct resource cdb89712_sram_resources[] __initdata = {
+ DEFINE_RES_MEM(CLPS711X_SRAM_BASE, CLPS711X_SRAM_SIZE),
+};
+
+static struct platform_device cdb89712_sram_pdev __initdata = {
+ .name = "mtd-ram",
+ .id = 0,
+ .resource = cdb89712_sram_resources,
+ .num_resources = ARRAY_SIZE(cdb89712_sram_resources),
+ .dev = {
+ .platform_data = &cdb89712_sram_pdata,
+ },
+};
+
+static void __init cdb89712_init(void)
+{
+ platform_device_register(&cdb89712_flash_pdev);
+ platform_device_register(&cdb89712_bootrom_pdev);
+ platform_device_register(&cdb89712_sram_pdev);
+ platform_device_register_simple("cs89x0", 0, cdb89712_cs8900_resource,
+ ARRAY_SIZE(cdb89712_cs8900_resource));
+}
+
+MACHINE_START(CDB89712, "Cirrus-CDB89712")
+ /* Maintainer: Ray Lehtiniemi */
+ .atag_offset = 0x100,
+ .nr_irqs = CLPS711X_NR_IRQS,
+ .map_io = clps711x_map_io,
+ .init_irq = clps711x_init_irq,
+ .timer = &clps711x_timer,
+ .init_machine = cdb89712_init,
+ .handle_irq = clps711x_handle_irq,
+ .restart = clps711x_restart,
+MACHINE_END
mi->bank[0].size = 0x01000000;
}
-
MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
/* Maintainer: Nobody */
.atag_offset = 0x0100,
+ .nr_irqs = CLPS711X_NR_IRQS,
.fixup = fixup_clep7312,
.map_io = clps711x_map_io,
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
+ .handle_irq = clps711x_handle_irq,
.restart = clps711x_restart,
MACHINE_END
-
--- /dev/null
+/*
+ * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/memblock.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/backlight.h>
+#include <linux/platform_device.h>
+
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/partitions.h>
+
+#include <asm/setup.h>
+#include <asm/mach/map.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+
+#include <video/platform_lcd.h>
+
+#include <mach/hardware.h>
+
+#include "common.h"
+
+#define VIDEORAM_SIZE SZ_128K
+
+#define EDB7211_LCD_DC_DC_EN CLPS711X_GPIO(3, 1)
+#define EDB7211_LCDEN CLPS711X_GPIO(3, 2)
+#define EDB7211_LCDBL CLPS711X_GPIO(3, 3)
+
+#define EDB7211_FLASH0_BASE (CS0_PHYS_BASE)
+#define EDB7211_FLASH1_BASE (CS1_PHYS_BASE)
+#define EDB7211_CS8900_BASE (CS2_PHYS_BASE + 0x300)
+#define EDB7211_CS8900_IRQ (IRQ_EINT3)
+
+static struct resource edb7211_cs8900_resource[] __initdata = {
+ DEFINE_RES_MEM(EDB7211_CS8900_BASE, SZ_1K),
+ DEFINE_RES_IRQ(EDB7211_CS8900_IRQ),
+};
+
+static struct mtd_partition edb7211_flash_partitions[] __initdata = {
+ {
+ .name = "Flash",
+ .offset = 0,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data edb7211_flash_pdata __initdata = {
+ .width = 4,
+ .parts = edb7211_flash_partitions,
+ .nr_parts = ARRAY_SIZE(edb7211_flash_partitions),
+};
+
+static struct resource edb7211_flash_resources[] __initdata = {
+ DEFINE_RES_MEM(EDB7211_FLASH0_BASE, SZ_8M),
+ DEFINE_RES_MEM(EDB7211_FLASH1_BASE, SZ_8M),
+};
+
+static struct platform_device edb7211_flash_pdev __initdata = {
+ .name = "physmap-flash",
+ .id = 0,
+ .resource = edb7211_flash_resources,
+ .num_resources = ARRAY_SIZE(edb7211_flash_resources),
+ .dev = {
+ .platform_data = &edb7211_flash_pdata,
+ },
+};
+
+static void edb7211_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
+{
+ if (power) {
+ gpio_set_value(EDB7211_LCDEN, 1);
+ udelay(100);
+ gpio_set_value(EDB7211_LCD_DC_DC_EN, 1);
+ } else {
+ gpio_set_value(EDB7211_LCD_DC_DC_EN, 0);
+ udelay(100);
+ gpio_set_value(EDB7211_LCDEN, 0);
+ }
+}
+
+static struct plat_lcd_data edb7211_lcd_power_pdata = {
+ .set_power = edb7211_lcd_power_set,
+};
+
+static void edb7211_lcd_backlight_set_intensity(int intensity)
+{
+ gpio_set_value(EDB7211_LCDBL, intensity);
+}
+
+static struct generic_bl_info edb7211_lcd_backlight_pdata = {
+ .name = "lcd-backlight.0",
+ .default_intensity = 0x01,
+ .max_intensity = 0x01,
+ .set_bl_intensity = edb7211_lcd_backlight_set_intensity,
+};
+
+static struct gpio edb7211_gpios[] __initconst = {
+ { EDB7211_LCD_DC_DC_EN, GPIOF_OUT_INIT_LOW, "LCD DC-DC" },
+ { EDB7211_LCDEN, GPIOF_OUT_INIT_LOW, "LCD POWER" },
+ { EDB7211_LCDBL, GPIOF_OUT_INIT_LOW, "LCD BACKLIGHT" },
+};
+
+static struct map_desc edb7211_io_desc[] __initdata = {
+ { /* Memory-mapped extra keyboard row */
+ .virtual = IO_ADDRESS(EP7211_PHYS_EXTKBD),
+ .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD),
+ .length = SZ_1M,
+ .type = MT_DEVICE,
+ },
+};
+
+void __init edb7211_map_io(void)
+{
+ clps711x_map_io();
+ iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc));
+}
+
+/* Reserve screen memory region at the start of main system memory. */
+static void __init edb7211_reserve(void)
+{
+ memblock_reserve(PHYS_OFFSET, VIDEORAM_SIZE);
+}
+
+static void __init
+fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
+{
+ /*
+ * Bank start addresses are not present in the information
+ * passed in from the boot loader. We could potentially
+ * detect them, but instead we hard-code them.
+ *
+ * Banks sizes _are_ present in the param block, but we're
+ * not using that information yet.
+ */
+ mi->bank[0].start = 0xc0000000;
+ mi->bank[0].size = SZ_8M;
+ mi->bank[1].start = 0xc1000000;
+ mi->bank[1].size = SZ_8M;
+ mi->nr_banks = 2;
+}
+
+static void __init edb7211_init(void)
+{
+ gpio_request_array(edb7211_gpios, ARRAY_SIZE(edb7211_gpios));
+
+ platform_device_register(&edb7211_flash_pdev);
+ platform_device_register_data(&platform_bus, "platform-lcd", 0,
+ &edb7211_lcd_power_pdata,
+ sizeof(edb7211_lcd_power_pdata));
+ platform_device_register_data(&platform_bus, "generic-bl", 0,
+ &edb7211_lcd_backlight_pdata,
+ sizeof(edb7211_lcd_backlight_pdata));
+ platform_device_register_simple("video-clps711x", 0, NULL, 0);
+ platform_device_register_simple("cs89x0", 0, edb7211_cs8900_resource,
+ ARRAY_SIZE(edb7211_cs8900_resource));
+}
+
+MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
+ /* Maintainer: Jon McClintock */
+ .atag_offset = VIDEORAM_SIZE + 0x100,
+ .nr_irqs = CLPS711X_NR_IRQS,
+ .fixup = fixup_edb7211,
+ .reserve = edb7211_reserve,
+ .map_io = edb7211_map_io,
+ .init_irq = clps711x_init_irq,
+ .timer = &clps711x_timer,
+ .init_machine = edb7211_init,
+ .handle_irq = clps711x_handle_irq,
+ .restart = clps711x_restart,
+MACHINE_END
MACHINE_START(FORTUNET, "ARM-FortuNet")
/* Maintainer: FortuNet Inc. */
+ .nr_irqs = CLPS711X_NR_IRQS,
.fixup = fortunet_fixup,
.map_io = clps711x_map_io,
.init_irq = clps711x_init_irq,
.timer = &clps711x_timer,
+ .handle_irq = clps711x_handle_irq,
.restart = clps711x_restart,
MACHINE_END
--- /dev/null
+/*
+ * linux/arch/arm/mach-clps711x/p720t.c
+ *
+ * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/leds.h>
+#include <linux/sizes.h>
+#include <linux/backlight.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand-gpio.h>
+
+#include <mach/hardware.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/syspld.h>
+
+#include <video/platform_lcd.h>
+
+#include "common.h"
+
+#define P720T_USERLED CLPS711X_GPIO(3, 0)
+#define P720T_NAND_CLE CLPS711X_GPIO(4, 0)
+#define P720T_NAND_ALE CLPS711X_GPIO(4, 1)
+#define P720T_NAND_NCE CLPS711X_GPIO(4, 2)
+
+#define P720T_NAND_BASE (CLPS711X_SDRAM1_BASE)
+
+static struct resource p720t_nand_resource[] __initdata = {
+ DEFINE_RES_MEM(P720T_NAND_BASE, SZ_4),
+};
+
+static struct mtd_partition p720t_nand_parts[] __initdata = {
+ {
+ .name = "Flash partition 1",
+ .offset = 0,
+ .size = SZ_2M,
+ },
+ {
+ .name = "Flash partition 2",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct gpio_nand_platdata p720t_nand_pdata __initdata = {
+ .gpio_rdy = -1,
+ .gpio_nce = P720T_NAND_NCE,
+ .gpio_ale = P720T_NAND_ALE,
+ .gpio_cle = P720T_NAND_CLE,
+ .gpio_nwp = -1,
+ .chip_delay = 15,
+ .parts = p720t_nand_parts,
+ .num_parts = ARRAY_SIZE(p720t_nand_parts),
+};
+
+static struct platform_device p720t_nand_pdev __initdata = {
+ .name = "gpio-nand",
+ .id = -1,
+ .resource = p720t_nand_resource,
+ .num_resources = ARRAY_SIZE(p720t_nand_resource),
+ .dev = {
+ .platform_data = &p720t_nand_pdata,
+ },
+};
+
+static void p720t_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
+{
+ if (power) {
+ PLD_LCDEN = PLD_LCDEN_EN;
+ PLD_PWR |= PLD_S4_ON | PLD_S2_ON | PLD_S1_ON;
+ } else {
+ PLD_PWR &= ~(PLD_S4_ON | PLD_S2_ON | PLD_S1_ON);
+ PLD_LCDEN = 0;
+ }
+}
+
+static struct plat_lcd_data p720t_lcd_power_pdata = {
+ .set_power = p720t_lcd_power_set,
+};
+
+static void p720t_lcd_backlight_set_intensity(int intensity)
+{
+ if (intensity)
+ PLD_PWR |= PLD_S3_ON;
+ else
+ PLD_PWR = 0;
+}
+
+static struct generic_bl_info p720t_lcd_backlight_pdata = {
+ .name = "lcd-backlight.0",
+ .default_intensity = 0x01,
+ .max_intensity = 0x01,
+ .set_bl_intensity = p720t_lcd_backlight_set_intensity,
+};
+
+/*
+ * Map the P720T system PLD. It occupies two address spaces:
+ * 0x10000000 and 0x10400000. We map both regions as one.
+ */
+static struct map_desc p720t_io_desc[] __initdata = {
+ {
+ .virtual = SYSPLD_VIRT_BASE,
+ .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE),
+ .length = SZ_8M,
+ .type = MT_DEVICE,
+ },
+};
+
+static void __init
+fixup_p720t(struct tag *tag, char **cmdline, struct meminfo *mi)
+{
+ /*
+ * Our bootloader doesn't setup any tags (yet).
+ */
+ if (tag->hdr.tag != ATAG_CORE) {
+ tag->hdr.tag = ATAG_CORE;
+ tag->hdr.size = tag_size(tag_core);
+ tag->u.core.flags = 0;
+ tag->u.core.pagesize = PAGE_SIZE;
+ tag->u.core.rootdev = 0x0100;
+
+ tag = tag_next(tag);
+ tag->hdr.tag = ATAG_MEM;
+ tag->hdr.size = tag_size(tag_mem32);
+ tag->u.mem.size = 4096;
+ tag->u.mem.start = PHYS_OFFSET;
+
+ tag = tag_next(tag);
+ tag->hdr.tag = ATAG_NONE;
+ tag->hdr.size = 0;
+ }
+}
+
+static void __init p720t_map_io(void)
+{
+ clps711x_map_io();
+ iotable_init(p720t_io_desc, ARRAY_SIZE(p720t_io_desc));
+}
+
+static void __init p720t_init_early(void)
+{
+ /*
+ * Power down as much as possible in case we don't
+ * have the drivers loaded.
+ */
+ PLD_LCDEN = 0;
+ PLD_PWR &= ~(PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON);
+
+ PLD_KBD = 0;
+ PLD_IO = 0;
+ PLD_IRDA = 0;
+ PLD_CODEC = 0;
+ PLD_TCH = 0;
+ PLD_SPI = 0;
+ if (!IS_ENABLED(CONFIG_DEBUG_LL)) {
+ PLD_COM2 = 0;
+ PLD_COM1 = 0;
+ }
+}
+
+static struct gpio_led p720t_gpio_leds[] = {
+ {
+ .name = "User LED",
+ .default_trigger = "heartbeat",
+ .gpio = P720T_USERLED,
+ },
+};
+
+static struct gpio_led_platform_data p720t_gpio_led_pdata __initdata = {
+ .leds = p720t_gpio_leds,
+ .num_leds = ARRAY_SIZE(p720t_gpio_leds),
+};
+
+static void __init p720t_init(void)
+{
+ platform_device_register(&p720t_nand_pdev);
+ platform_device_register_data(&platform_bus, "platform-lcd", 0,
+ &p720t_lcd_power_pdata,
+ sizeof(p720t_lcd_power_pdata));
+ platform_device_register_data(&platform_bus, "generic-bl", 0,
+ &p720t_lcd_backlight_pdata,
+ sizeof(p720t_lcd_backlight_pdata));
+ platform_device_register_simple("video-clps711x", 0, NULL, 0);
+}
+
+static void __init p720t_init_late(void)
+{
+ platform_device_register_data(&platform_bus, "leds-gpio", 0,
+ &p720t_gpio_led_pdata,
+ sizeof(p720t_gpio_led_pdata));
+}
+
+MACHINE_START(P720T, "ARM-Prospector720T")
+ /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
+ .atag_offset = 0x100,
+ .nr_irqs = CLPS711X_NR_IRQS,
+ .fixup = fixup_p720t,
+ .map_io = p720t_map_io,
+ .init_early = p720t_init_early,
+ .init_irq = clps711x_init_irq,
+ .timer = &clps711x_timer,
+ .init_machine = p720t_init,
+ .init_late = p720t_init_late,
+ .handle_irq = clps711x_handle_irq,
+ .restart = clps711x_restart,
+MACHINE_END
+++ /dev/null
-/*
- * linux/arch/arm/mach-clps711x/cdb89712.c
- *
- * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include "common.h"
-
-/*
- * Map the CS89712 Ethernet port. That should be moved to the
- * ethernet driver, perhaps.
- */
-static struct map_desc cdb89712_io_desc[] __initdata = {
- {
- .virtual = IO_ADDRESS(ETHER_PHYS_BASE),
- .pfn = __phys_to_pfn(ETHER_PHYS_BASE),
- .length = ETHER_SIZE,
- .type = MT_DEVICE
- }
-};
-
-static void __init cdb89712_map_io(void)
-{
- clps711x_map_io();
- iotable_init(cdb89712_io_desc, ARRAY_SIZE(cdb89712_io_desc));
-}
-
-MACHINE_START(CDB89712, "Cirrus-CDB89712")
- /* Maintainer: Ray Lehtiniemi */
- .atag_offset = 0x100,
- .map_io = cdb89712_map_io,
- .init_irq = clps711x_init_irq,
- .timer = &clps711x_timer,
- .restart = clps711x_restart,
-MACHINE_END
#include <linux/clockchips.h>
#include <linux/clk-provider.h>
+#include <asm/exception.h>
+#include <asm/mach/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <asm/system_misc.h>
clps_writel(intmr1, INTMR1);
}
-static void int1_ack(struct irq_data *d)
-{
-}
-
static void int1_eoi(struct irq_data *d)
{
switch (d->irq) {
}
static struct irq_chip int1_chip = {
- .name = "Interrupt Vector 1 ",
- .irq_ack = int1_ack,
+ .name = "Interrupt Vector 1",
.irq_eoi = int1_eoi,
.irq_mask = int1_mask,
.irq_unmask = int1_unmask,
clps_writel(intmr2, INTMR2);
}
-static void int2_ack(struct irq_data *d)
-{
-}
-
static void int2_eoi(struct irq_data *d)
{
switch (d->irq) {
}
static struct irq_chip int2_chip = {
- .name = "Interrupt Vector 2 ",
- .irq_ack = int2_ack,
+ .name = "Interrupt Vector 2",
.irq_eoi = int2_eoi,
.irq_mask = int2_mask,
.irq_unmask = int2_unmask,
};
-struct clps711x_irqdesc {
+static void int3_mask(struct irq_data *d)
+{
+ u32 intmr3;
+
+ intmr3 = clps_readl(INTMR3);
+ intmr3 &= ~(1 << (d->irq - 32));
+ clps_writel(intmr3, INTMR3);
+}
+
+static void int3_unmask(struct irq_data *d)
+{
+ u32 intmr3;
+
+ intmr3 = clps_readl(INTMR3);
+ intmr3 |= 1 << (d->irq - 32);
+ clps_writel(intmr3, INTMR3);
+}
+
+static struct irq_chip int3_chip = {
+ .name = "Interrupt Vector 3",
+ .irq_mask = int3_mask,
+ .irq_unmask = int3_unmask,
+};
+
+static struct {
int nr;
struct irq_chip *chip;
irq_flow_handler_t handle;
-};
-
-static struct clps711x_irqdesc clps711x_irqdescs[] __initdata = {
+} clps711x_irqdescs[] __initdata = {
{ IRQ_CSINT, &int1_chip, handle_fasteoi_irq, },
{ IRQ_EINT1, &int1_chip, handle_level_irq, },
{ IRQ_EINT2, &int1_chip, handle_level_irq, },
set_irq_flags(clps711x_irqdescs[i].nr,
IRQF_VALID | IRQF_PROBE);
}
+
+ if (IS_ENABLED(CONFIG_FIQ)) {
+ init_FIQ(0);
+ irq_set_chip_and_handler(IRQ_DAIINT, &int3_chip,
+ handle_bad_irq);
+ set_irq_flags(IRQ_DAIINT,
+ IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
+ }
+}
+
+inline u32 fls16(u32 x)
+{
+ u32 r = 15;
+
+ if (!(x & 0xff00)) {
+ x <<= 8;
+ r -= 8;
+ }
+ if (!(x & 0xf000)) {
+ x <<= 4;
+ r -= 4;
+ }
+ if (!(x & 0xc000)) {
+ x <<= 2;
+ r -= 2;
+ }
+ if (!(x & 0x8000))
+ r--;
+
+ return r;
+}
+
+asmlinkage void __exception_irq_entry clps711x_handle_irq(struct pt_regs *regs)
+{
+ u32 irqstat;
+ void __iomem *base = CLPS711X_VIRT_BASE;
+
+ irqstat = readl_relaxed(base + INTSR1) & readl_relaxed(base + INTMR1);
+ if (irqstat) {
+ handle_IRQ(fls16(irqstat), regs);
+ return;
+ }
+
+ irqstat = readl_relaxed(base + INTSR2) & readl_relaxed(base + INTMR2);
+ if (likely(irqstat))
+ handle_IRQ(fls16(irqstat) + 16, regs);
}
static void clps711x_clockevent_set_mode(enum clock_event_mode mode,
* Common bits.
*/
+#define CLPS711X_NR_IRQS (33)
+#define CLPS711X_NR_GPIO (4 * 8 + 3)
+#define CLPS711X_GPIO(prt, bit) ((prt) * 8 + (bit))
+
struct sys_timer;
extern void clps711x_map_io(void);
extern void clps711x_init_irq(void);
-extern struct sys_timer clps711x_timer;
+extern void clps711x_handle_irq(struct pt_regs *regs);
extern void clps711x_restart(char mode, const char *cmd);
+extern struct sys_timer clps711x_timer;
+++ /dev/null
-/*
- * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/init.h>
-#include <linux/memblock.h>
-#include <linux/types.h>
-
-#include <asm/setup.h>
-#include <asm/mach/map.h>
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include <mach/hardware.h>
-
-#include "common.h"
-
-#define VIDEORAM_SIZE SZ_128K
-
-static struct map_desc edb7211_io_desc[] __initdata = {
- { /* Memory-mapped extra keyboard row */
- .virtual = IO_ADDRESS(EP7211_PHYS_EXTKBD),
- .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD),
- .length = SZ_1M,
- .type = MT_DEVICE,
- }, { /* CS8900A Ethernet chip */
- .virtual = IO_ADDRESS(EP7211_PHYS_CS8900A),
- .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A),
- .length = SZ_1M,
- .type = MT_DEVICE,
- }, { /* Flash bank 0 */
- .virtual = IO_ADDRESS(EP7211_PHYS_FLASH1),
- .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1),
- .length = SZ_8M,
- .type = MT_DEVICE,
- }, { /* Flash bank 1 */
- .virtual = IO_ADDRESS(EP7211_PHYS_FLASH2),
- .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2),
- .length = SZ_8M,
- .type = MT_DEVICE,
- },
-};
-
-void __init edb7211_map_io(void)
-{
- clps711x_map_io();
- iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc));
-}
-
-/* Reserve screen memory region at the start of main system memory. */
-static void __init edb7211_reserve(void)
-{
- memblock_reserve(PHYS_OFFSET, VIDEORAM_SIZE);
-}
-
-static void __init
-fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
-{
- /*
- * Bank start addresses are not present in the information
- * passed in from the boot loader. We could potentially
- * detect them, but instead we hard-code them.
- *
- * Banks sizes _are_ present in the param block, but we're
- * not using that information yet.
- */
- mi->bank[0].start = 0xc0000000;
- mi->bank[0].size = SZ_8M;
- mi->bank[1].start = 0xc1000000;
- mi->bank[1].size = SZ_8M;
- mi->nr_banks = 2;
-}
-
-MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
- /* Maintainer: Jon McClintock */
- .atag_offset = VIDEORAM_SIZE + 0x100,
- .fixup = fixup_edb7211,
- .map_io = edb7211_map_io,
- .reserve = edb7211_reserve,
- .init_irq = clps711x_init_irq,
- .timer = &clps711x_timer,
- .restart = clps711x_restart,
-MACHINE_END
#ifndef __ASM_ARCH_AUTCPU12_H
#define __ASM_ARCH_AUTCPU12_H
-/* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */
-#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE
-
/*
* The flash bank is wired to chip select 0
*/
#define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */
-#define AUTCPU12_PHYS_SMC CS1_PHYS_BASE +0x06000000 /* physical */
-
#define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */
#define AUTCPU12_PHYS_TOUCH CS1_PHYS_BASE +0x0A000000 /* physical */
#define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */
-/*
-* defines for smartmedia card access
-*/
-#define AUTCPU12_SMC_RDY (1<<2)
-#define AUTCPU12_SMC_ALE (1<<3)
-#define AUTCPU12_SMC_CLE (1<<4)
-#define AUTCPU12_SMC_PORT_OFFSET PBDR
-#define AUTCPU12_SMC_SELECT_OFFSET 0x10
/*
* defines for lcd contrast
*/
#define MEMCFG_WAITSTATE_2_0 (14 << 2)
#define MEMCFG_WAITSTATE_1_0 (15 << 2)
+/* INTSR1 Interrupts */
+#define IRQ_CSINT (4)
+#define IRQ_EINT1 (5)
+#define IRQ_EINT2 (6)
+#define IRQ_EINT3 (7)
+#define IRQ_TC1OI (8)
+#define IRQ_TC2OI (9)
+#define IRQ_RTCMI (10)
+#define IRQ_TINT (11)
+#define IRQ_UTXINT1 (12)
+#define IRQ_URXINT1 (13)
+#define IRQ_UMSINT (14)
+#define IRQ_SSEOTI (15)
+
+/* INTSR2 Interrupts */
+#define IRQ_KBDINT (16 + 0)
+#define IRQ_SS2RX (16 + 1)
+#define IRQ_SS2TX (16 + 2)
+#define IRQ_UTXINT2 (16 + 12)
+#define IRQ_URXINT2 (16 + 13)
+
+/* INTSR3 Interrupts */
+#define IRQ_DAIINT (32 + 0)
+
#endif /* __MACH_CLPS711X_H */
+++ /dev/null
-/*
- * arch/arm/mach-clps711x/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for CLPS711X-based platforms
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <mach/hardware.h>
-
- .macro get_irqnr_preamble, base, tmp
- .endm
-
-#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1)
-#error INTSR stride != INTMR stride
-#endif
-
- .macro get_irqnr_and_base, irqnr, stat, base, mask
- mov \base, #CLPS711X_VIRT_BASE
- ldr \stat, [\base, #INTSR1]
- ldr \mask, [\base, #INTMR1]
- mov \irqnr, #4
- mov \mask, \mask, lsl #16
- and \stat, \stat, \mask, lsr #16
- movs \stat, \stat, lsr #4
- bne 1001f
-
- add \base, \base, #INTSR2 - INTSR1
- ldr \stat, [\base, #INTSR1]
- ldr \mask, [\base, #INTMR1]
- mov \irqnr, #16
- mov \mask, \mask, lsl #16
- and \stat, \stat, \mask, lsr #16
-
-1001: tst \stat, #255
- addeq \irqnr, \irqnr, #8
- moveq \stat, \stat, lsr #8
- tst \stat, #15
- addeq \irqnr, \irqnr, #4
- moveq \stat, \stat, lsr #4
- tst \stat, #3
- addeq \irqnr, \irqnr, #2
- moveq \stat, \stat, lsr #2
- tst \stat, #1
- addeq \irqnr, \irqnr, #1
- moveq \stat, \stat, lsr #1
- tst \stat, #1 @ bit 0 should be set
- .endm
-
-
#define CS7_PHYS_BASE (0x00000000)
#endif
-#if defined (CONFIG_ARCH_CDB89712)
-
-#define ETHER_PHYS_BASE CS2_PHYS_BASE
-#define ETHER_SIZE 0x1000
-
-#endif
+#define CLPS711X_SRAM_BASE CS6_PHYS_BASE
+#define CLPS711X_SRAM_SIZE (48 * 1024)
+#define CLPS711X_SDRAM0_BASE (0xc0000000)
+#define CLPS711X_SDRAM1_BASE (0xd0000000)
#if defined (CONFIG_ARCH_EDB7211)
/* The extra 8 lines of the keyboard matrix are wired to chip select 3 */
#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE
-/* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */
-#define EP7211_PHYS_CS8900A CS2_PHYS_BASE
-
-/* The two flash banks are wired to chip selects 0 and 1 */
-#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE
-#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE
-
#endif /* CONFIG_ARCH_EDB7211 */
-/*
- * Relevant bits in port D, which controls power to the various parts of
- * the LCD on the EDB7211.
- */
-#define EDB_PD1_LCD_DC_DC_EN (1<<1)
-#define EDB_PD2_LCDEN (1<<2)
-#define EDB_PD3_LCDBL (1<<3)
-
#endif
+++ /dev/null
-/*
- * arch/arm/mach-clps711x/include/mach/irqs.h
- *
- * Copyright (C) 2000 Deep Blue Solutions Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-/*
- * Interrupts from INTSR1
- */
-#define IRQ_CSINT 4
-#define IRQ_EINT1 5
-#define IRQ_EINT2 6
-#define IRQ_EINT3 7
-#define IRQ_TC1OI 8
-#define IRQ_TC2OI 9
-#define IRQ_RTCMI 10
-#define IRQ_TINT 11
-#define IRQ_UTXINT1 12
-#define IRQ_URXINT1 13
-#define IRQ_UMSINT 14
-#define IRQ_SSEOTI 15
-
-/*
- * Interrupts from INTSR2
- */
-#define IRQ_KBDINT (16+0) /* bit 0 */
-#define IRQ_SS2RX (16+1) /* bit 1 */
-#define IRQ_SS2TX (16+2) /* bit 2 */
-#define IRQ_UTXINT2 (16+12) /* bit 12 */
-#define IRQ_URXINT2 (16+13) /* bit 13 */
-
-#define NR_IRQS 30
+++ /dev/null
-/*
- * linux/arch/arm/mach-clps711x/p720t.c
- *
- * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/io.h>
-#include <linux/slab.h>
-#include <linux/leds.h>
-
-#include <mach/hardware.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/setup.h>
-#include <asm/sizes.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/syspld.h>
-
-#include "common.h"
-
-/*
- * Map the P720T system PLD. It occupies two address spaces:
- * 0x10000000 and 0x10400000. We map both regions as one.
- */
-static struct map_desc p720t_io_desc[] __initdata = {
- {
- .virtual = SYSPLD_VIRT_BASE,
- .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE),
- .length = SZ_8M,
- .type = MT_DEVICE,
- },
-};
-
-static void __init
-fixup_p720t(struct tag *tag, char **cmdline, struct meminfo *mi)
-{
- /*
- * Our bootloader doesn't setup any tags (yet).
- */
- if (tag->hdr.tag != ATAG_CORE) {
- tag->hdr.tag = ATAG_CORE;
- tag->hdr.size = tag_size(tag_core);
- tag->u.core.flags = 0;
- tag->u.core.pagesize = PAGE_SIZE;
- tag->u.core.rootdev = 0x0100;
-
- tag = tag_next(tag);
- tag->hdr.tag = ATAG_MEM;
- tag->hdr.size = tag_size(tag_mem32);
- tag->u.mem.size = 4096;
- tag->u.mem.start = PHYS_OFFSET;
-
- tag = tag_next(tag);
- tag->hdr.tag = ATAG_NONE;
- tag->hdr.size = 0;
- }
-}
-
-static void __init p720t_map_io(void)
-{
- clps711x_map_io();
- iotable_init(p720t_io_desc, ARRAY_SIZE(p720t_io_desc));
-}
-
-static void __init p720t_init_early(void)
-{
- /*
- * Power down as much as possible in case we don't
- * have the drivers loaded.
- */
- PLD_LCDEN = 0;
- PLD_PWR &= ~(PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON);
-
- PLD_KBD = 0;
- PLD_IO = 0;
- PLD_IRDA = 0;
- PLD_CODEC = 0;
- PLD_TCH = 0;
- PLD_SPI = 0;
- if (!IS_ENABLED(CONFIG_DEBUG_LL)) {
- PLD_COM2 = 0;
- PLD_COM1 = 0;
- }
-}
-
-/*
- * LED controled by CPLD
- */
-#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
-static void p720t_led_set(struct led_classdev *cdev,
- enum led_brightness b)
-{
- u8 reg = clps_readb(PDDR);
-
- if (b != LED_OFF)
- reg |= 0x1;
- else
- reg &= ~0x1;
-
- clps_writeb(reg, PDDR);
-}
-
-static enum led_brightness p720t_led_get(struct led_classdev *cdev)
-{
- u8 reg = clps_readb(PDDR);
-
- return (reg & 0x1) ? LED_FULL : LED_OFF;
-}
-
-static int __init p720t_leds_init(void)
-{
-
- struct led_classdev *cdev;
- int ret;
-
- if (!machine_is_p720t())
- return -ENODEV;
-
- cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
- if (!cdev)
- return -ENOMEM;
-
- cdev->name = "p720t:0";
- cdev->brightness_set = p720t_led_set;
- cdev->brightness_get = p720t_led_get;
- cdev->default_trigger = "heartbeat";
-
- ret = led_classdev_register(NULL, cdev);
- if (ret < 0) {
- kfree(cdev);
- return ret;
- }
-
- return 0;
-}
-
-/*
- * Since we may have triggers on any subsystem, defer registration
- * until after subsystem_init.
- */
-fs_initcall(p720t_leds_init);
-#endif
-
-MACHINE_START(P720T, "ARM-Prospector720T")
- /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
- .atag_offset = 0x100,
- .fixup = fixup_p720t,
- .init_early = p720t_init_early,
- .map_io = p720t_map_io,
- .init_irq = clps711x_init_irq,
- .timer = &clps711x_timer,
- .restart = clps711x_restart,
-MACHINE_END
This enables access to the flash chips on the Hitachi SolutionEngine and
similar boards. Say 'Y' if you are building a kernel for such a board.
-config MTD_CDB89712
- tristate "Cirrus CDB89712 evaluation board mappings"
- depends on MTD_CFI && ARCH_CDB89712
- help
- This enables access to the flash or ROM chips on the CDB89712 board.
- If you have such a board, say 'Y'.
-
config MTD_SA1100
tristate "CFI Flash device mapped on StrongARM SA11x0"
depends on MTD_CFI && ARCH_SA1100
endif
# Chip mappings
-obj-$(CONFIG_MTD_CDB89712) += cdb89712.o
obj-$(CONFIG_MTD_CFI_FLAGADM) += cfi_flagadm.o
obj-$(CONFIG_MTD_DC21285) += dc21285.o
obj-$(CONFIG_MTD_DILNETPC) += dilnetpc.o
+++ /dev/null
-/*
- * Flash on Cirrus CDB89712
- *
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <asm/io.h>
-#include <mach/hardware.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/partitions.h>
-
-/* dynamic ioremap() areas */
-#define FLASH_START 0x00000000
-#define FLASH_SIZE 0x800000
-#define FLASH_WIDTH 4
-
-#define SRAM_START 0x60000000
-#define SRAM_SIZE 0xc000
-#define SRAM_WIDTH 4
-
-#define BOOTROM_START 0x70000000
-#define BOOTROM_SIZE 0x80
-#define BOOTROM_WIDTH 4
-
-
-static struct mtd_info *flash_mtd;
-
-struct map_info cdb89712_flash_map = {
- .name = "flash",
- .size = FLASH_SIZE,
- .bankwidth = FLASH_WIDTH,
- .phys = FLASH_START,
-};
-
-struct resource cdb89712_flash_resource = {
- .name = "Flash",
- .start = FLASH_START,
- .end = FLASH_START + FLASH_SIZE - 1,
- .flags = IORESOURCE_IO | IORESOURCE_BUSY,
-};
-
-static int __init init_cdb89712_flash (void)
-{
- int err;
-
- if (request_resource (&ioport_resource, &cdb89712_flash_resource)) {
- printk(KERN_NOTICE "Failed to reserve Cdb89712 FLASH space\n");
- err = -EBUSY;
- goto out;
- }
-
- cdb89712_flash_map.virt = ioremap(FLASH_START, FLASH_SIZE);
- if (!cdb89712_flash_map.virt) {
- printk(KERN_NOTICE "Failed to ioremap Cdb89712 FLASH space\n");
- err = -EIO;
- goto out_resource;
- }
- simple_map_init(&cdb89712_flash_map);
- flash_mtd = do_map_probe("cfi_probe", &cdb89712_flash_map);
- if (!flash_mtd) {
- flash_mtd = do_map_probe("map_rom", &cdb89712_flash_map);
- if (flash_mtd)
- flash_mtd->erasesize = 0x10000;
- }
- if (!flash_mtd) {
- printk("FLASH probe failed\n");
- err = -ENXIO;
- goto out_ioremap;
- }
-
- flash_mtd->owner = THIS_MODULE;
-
- if (mtd_device_register(flash_mtd, NULL, 0)) {
- printk("FLASH device addition failed\n");
- err = -ENOMEM;
- goto out_probe;
- }
-
- return 0;
-
-out_probe:
- map_destroy(flash_mtd);
- flash_mtd = 0;
-out_ioremap:
- iounmap((void *)cdb89712_flash_map.virt);
-out_resource:
- release_resource (&cdb89712_flash_resource);
-out:
- return err;
-}
-
-
-
-
-
-static struct mtd_info *sram_mtd;
-
-struct map_info cdb89712_sram_map = {
- .name = "SRAM",
- .size = SRAM_SIZE,
- .bankwidth = SRAM_WIDTH,
- .phys = SRAM_START,
-};
-
-struct resource cdb89712_sram_resource = {
- .name = "SRAM",
- .start = SRAM_START,
- .end = SRAM_START + SRAM_SIZE - 1,
- .flags = IORESOURCE_IO | IORESOURCE_BUSY,
-};
-
-static int __init init_cdb89712_sram (void)
-{
- int err;
-
- if (request_resource (&ioport_resource, &cdb89712_sram_resource)) {
- printk(KERN_NOTICE "Failed to reserve Cdb89712 SRAM space\n");
- err = -EBUSY;
- goto out;
- }
-
- cdb89712_sram_map.virt = ioremap(SRAM_START, SRAM_SIZE);
- if (!cdb89712_sram_map.virt) {
- printk(KERN_NOTICE "Failed to ioremap Cdb89712 SRAM space\n");
- err = -EIO;
- goto out_resource;
- }
- simple_map_init(&cdb89712_sram_map);
- sram_mtd = do_map_probe("map_ram", &cdb89712_sram_map);
- if (!sram_mtd) {
- printk("SRAM probe failed\n");
- err = -ENXIO;
- goto out_ioremap;
- }
-
- sram_mtd->owner = THIS_MODULE;
- sram_mtd->erasesize = 16;
-
- if (mtd_device_register(sram_mtd, NULL, 0)) {
- printk("SRAM device addition failed\n");
- err = -ENOMEM;
- goto out_probe;
- }
-
- return 0;
-
-out_probe:
- map_destroy(sram_mtd);
- sram_mtd = 0;
-out_ioremap:
- iounmap((void *)cdb89712_sram_map.virt);
-out_resource:
- release_resource (&cdb89712_sram_resource);
-out:
- return err;
-}
-
-
-
-
-
-
-
-static struct mtd_info *bootrom_mtd;
-
-struct map_info cdb89712_bootrom_map = {
- .name = "BootROM",
- .size = BOOTROM_SIZE,
- .bankwidth = BOOTROM_WIDTH,
- .phys = BOOTROM_START,
-};
-
-struct resource cdb89712_bootrom_resource = {
- .name = "BootROM",
- .start = BOOTROM_START,
- .end = BOOTROM_START + BOOTROM_SIZE - 1,
- .flags = IORESOURCE_IO | IORESOURCE_BUSY,
-};
-
-static int __init init_cdb89712_bootrom (void)
-{
- int err;
-
- if (request_resource (&ioport_resource, &cdb89712_bootrom_resource)) {
- printk(KERN_NOTICE "Failed to reserve Cdb89712 BOOTROM space\n");
- err = -EBUSY;
- goto out;
- }
-
- cdb89712_bootrom_map.virt = ioremap(BOOTROM_START, BOOTROM_SIZE);
- if (!cdb89712_bootrom_map.virt) {
- printk(KERN_NOTICE "Failed to ioremap Cdb89712 BootROM space\n");
- err = -EIO;
- goto out_resource;
- }
- simple_map_init(&cdb89712_bootrom_map);
- bootrom_mtd = do_map_probe("map_rom", &cdb89712_bootrom_map);
- if (!bootrom_mtd) {
- printk("BootROM probe failed\n");
- err = -ENXIO;
- goto out_ioremap;
- }
-
- bootrom_mtd->owner = THIS_MODULE;
- bootrom_mtd->erasesize = 0x10000;
-
- if (mtd_device_register(bootrom_mtd, NULL, 0)) {
- printk("BootROM device addition failed\n");
- err = -ENOMEM;
- goto out_probe;
- }
-
- return 0;
-
-out_probe:
- map_destroy(bootrom_mtd);
- bootrom_mtd = 0;
-out_ioremap:
- iounmap((void *)cdb89712_bootrom_map.virt);
-out_resource:
- release_resource (&cdb89712_bootrom_resource);
-out:
- return err;
-}
-
-
-
-
-
-static int __init init_cdb89712_maps(void)
-{
-
- printk(KERN_INFO "Cirrus CDB89712 MTD mappings:\n Flash 0x%x at 0x%x\n SRAM 0x%x at 0x%x\n BootROM 0x%x at 0x%x\n",
- FLASH_SIZE, FLASH_START, SRAM_SIZE, SRAM_START, BOOTROM_SIZE, BOOTROM_START);
-
- init_cdb89712_flash();
- init_cdb89712_sram();
- init_cdb89712_bootrom();
-
- return 0;
-}
-
-
-static void __exit cleanup_cdb89712_maps(void)
-{
- if (sram_mtd) {
- mtd_device_unregister(sram_mtd);
- map_destroy(sram_mtd);
- iounmap((void *)cdb89712_sram_map.virt);
- release_resource (&cdb89712_sram_resource);
- }
-
- if (flash_mtd) {
- mtd_device_unregister(flash_mtd);
- map_destroy(flash_mtd);
- iounmap((void *)cdb89712_flash_map.virt);
- release_resource (&cdb89712_flash_resource);
- }
-
- if (bootrom_mtd) {
- mtd_device_unregister(bootrom_mtd);
- map_destroy(bootrom_mtd);
- iounmap((void *)cdb89712_bootrom_map.virt);
- release_resource (&cdb89712_bootrom_resource);
- }
-}
-
-module_init(init_cdb89712_maps);
-module_exit(cleanup_cdb89712_maps);
-
-MODULE_AUTHOR("Ray L");
-MODULE_DESCRIPTION("ARM CDB89712 map driver");
-MODULE_LICENSE("GPL");
NAND chips (page size 256 byte, erase size 4-8KiB). The IDs
of these chips were reused by later, larger chips.
-config MTD_NAND_AUTCPU12
- tristate "SmartMediaCard on autronix autcpu12 board"
- depends on ARCH_AUTCPU12
- help
- This enables the driver for the autronix autcpu12 board to
- access the SmartMediaCard.
-
config MTD_NAND_DENALI
depends on PCI
tristate "Support Denali NAND controller on Intel Moorestown"
help
This enables a GPIO based NAND flash driver.
-config MTD_NAND_SPIA
- tristate "NAND Flash device on SPIA board"
- depends on ARCH_P720T
- help
- If you had to ask, you don't have one. Say 'N'.
-
config MTD_NAND_AMS_DELTA
tristate "NAND Flash device on Amstrad E3"
depends on MACH_AMS_DELTA
obj-$(CONFIG_MTD_SM_COMMON) += sm_common.o
obj-$(CONFIG_MTD_NAND_CAFE) += cafe_nand.o
-obj-$(CONFIG_MTD_NAND_SPIA) += spia.o
obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o
-obj-$(CONFIG_MTD_NAND_AUTCPU12) += autcpu12.o
obj-$(CONFIG_MTD_NAND_DENALI) += denali.o
obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o
+++ /dev/null
-/*
- * drivers/mtd/autcpu12.c
- *
- * Copyright (c) 2002 Thomas Gleixner <tgxl@linutronix.de>
- *
- * Derived from drivers/mtd/spia.c
- * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Overview:
- * This is a device driver for the NAND flash device found on the
- * autronix autcpu12 board, which is a SmartMediaCard. It supports
- * 16MiB, 32MiB and 64MiB cards.
- *
- *
- * 02-12-2002 TG Cleanup of module params
- *
- * 02-20-2002 TG adjusted for different rd/wr address support
- * added support for read device ready/busy line
- * added page_cache
- *
- * 10-06-2002 TG 128K card support added
- */
-
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/partitions.h>
-#include <asm/io.h>
-#include <mach/hardware.h>
-#include <asm/sizes.h>
-#include <mach/autcpu12.h>
-
-/*
- * MTD structure for AUTCPU12 board
- */
-static struct mtd_info *autcpu12_mtd = NULL;
-static void __iomem *autcpu12_fio_base;
-
-/*
- * Define partitions for flash devices
- */
-static struct mtd_partition partition_info16k[] = {
- { .name = "AUTCPU12 flash partition 1",
- .offset = 0,
- .size = 8 * SZ_1M },
- { .name = "AUTCPU12 flash partition 2",
- .offset = 8 * SZ_1M,
- .size = 8 * SZ_1M },
-};
-
-static struct mtd_partition partition_info32k[] = {
- { .name = "AUTCPU12 flash partition 1",
- .offset = 0,
- .size = 8 * SZ_1M },
- { .name = "AUTCPU12 flash partition 2",
- .offset = 8 * SZ_1M,
- .size = 24 * SZ_1M },
-};
-
-static struct mtd_partition partition_info64k[] = {
- { .name = "AUTCPU12 flash partition 1",
- .offset = 0,
- .size = 16 * SZ_1M },
- { .name = "AUTCPU12 flash partition 2",
- .offset = 16 * SZ_1M,
- .size = 48 * SZ_1M },
-};
-
-static struct mtd_partition partition_info128k[] = {
- { .name = "AUTCPU12 flash partition 1",
- .offset = 0,
- .size = 16 * SZ_1M },
- { .name = "AUTCPU12 flash partition 2",
- .offset = 16 * SZ_1M,
- .size = 112 * SZ_1M },
-};
-
-#define NUM_PARTITIONS16K 2
-#define NUM_PARTITIONS32K 2
-#define NUM_PARTITIONS64K 2
-#define NUM_PARTITIONS128K 2
-/*
- * hardware specific access to control-lines
- *
- * ALE bit 4 autcpu12_pedr
- * CLE bit 5 autcpu12_pedr
- * NCE bit 0 fio_ctrl
- *
- */
-static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd,
- unsigned int ctrl)
-{
- struct nand_chip *chip = mtd->priv;
-
- if (ctrl & NAND_CTRL_CHANGE) {
- void __iomem *addr;
- unsigned char bits;
-
- bits = clps_readb(AUTCPU12_SMC_PORT_OFFSET) & ~0x30;
- bits |= (ctrl & NAND_CLE) << 4;
- bits |= (ctrl & NAND_ALE) << 2;
- clps_writeb(bits, AUTCPU12_SMC_PORT_OFFSET);
-
- addr = autcpu12_fio_base + AUTCPU12_SMC_SELECT_OFFSET;
- writeb((readb(addr) & ~0x1) | (ctrl & NAND_NCE), addr);
- }
-
- if (cmd != NAND_CMD_NONE)
- writeb(cmd, chip->IO_ADDR_W);
-}
-
-/*
- * read device ready pin
- */
-int autcpu12_device_ready(struct mtd_info *mtd)
-{
- return clps_readb(AUTCPU12_SMC_PORT_OFFSET) & AUTCPU12_SMC_RDY;
-}
-
-/*
- * Main initialization routine
- */
-static int __init autcpu12_init(void)
-{
- struct nand_chip *this;
- int err = 0;
-
- /* Allocate memory for MTD device structure and private data */
- autcpu12_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip),
- GFP_KERNEL);
- if (!autcpu12_mtd) {
- printk("Unable to allocate AUTCPU12 NAND MTD device structure.\n");
- err = -ENOMEM;
- goto out;
- }
-
- /* map physical address */
- autcpu12_fio_base = ioremap(AUTCPU12_PHYS_SMC, SZ_1K);
- if (!autcpu12_fio_base) {
- printk("Ioremap autcpu12 SmartMedia Card failed\n");
- err = -EIO;
- goto out_mtd;
- }
-
- /* Get pointer to private data */
- this = (struct nand_chip *)(&autcpu12_mtd[1]);
-
- /* Initialize structures */
- memset(autcpu12_mtd, 0, sizeof(struct mtd_info));
- memset(this, 0, sizeof(struct nand_chip));
-
- /* Link the private data with the MTD structure */
- autcpu12_mtd->priv = this;
- autcpu12_mtd->owner = THIS_MODULE;
-
- /* Set address of NAND IO lines */
- this->IO_ADDR_R = autcpu12_fio_base;
- this->IO_ADDR_W = autcpu12_fio_base;
- this->cmd_ctrl = autcpu12_hwcontrol;
- this->dev_ready = autcpu12_device_ready;
- /* 20 us command delay time */
- this->chip_delay = 20;
- this->ecc.mode = NAND_ECC_SOFT;
-
- /* Enable the following for a flash based bad block table */
- /*
- this->bbt_options = NAND_BBT_USE_FLASH;
- */
- this->bbt_options = NAND_BBT_USE_FLASH;
-
- /* Scan to find existence of the device */
- if (nand_scan(autcpu12_mtd, 1)) {
- err = -ENXIO;
- goto out_ior;
- }
-
- /* Register the partitions */
- switch (autcpu12_mtd->size) {
- case SZ_16M:
- mtd_device_register(autcpu12_mtd, partition_info16k,
- NUM_PARTITIONS16K);
- break;
- case SZ_32M:
- mtd_device_register(autcpu12_mtd, partition_info32k,
- NUM_PARTITIONS32K);
- break;
- case SZ_64M:
- mtd_device_register(autcpu12_mtd, partition_info64k,
- NUM_PARTITIONS64K);
- break;
- case SZ_128M:
- mtd_device_register(autcpu12_mtd, partition_info128k,
- NUM_PARTITIONS128K);
- break;
- default:
- printk("Unsupported SmartMedia device\n");
- err = -ENXIO;
- goto out_ior;
- }
- goto out;
-
- out_ior:
- iounmap(autcpu12_fio_base);
- out_mtd:
- kfree(autcpu12_mtd);
- out:
- return err;
-}
-
-module_init(autcpu12_init);
-
-/*
- * Clean up routine
- */
-static void __exit autcpu12_cleanup(void)
-{
- /* Release resources, unregister device */
- nand_release(autcpu12_mtd);
-
- /* unmap physical address */
- iounmap(autcpu12_fio_base);
-
- /* Free the MTD device structure */
- kfree(autcpu12_mtd);
-}
-
-module_exit(autcpu12_cleanup);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
-MODULE_DESCRIPTION("Glue layer for SmartMediaCard on autronix autcpu12");
+++ /dev/null
-/*
- * drivers/mtd/nand/spia.c
- *
- * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
- *
- *
- * 10-29-2001 TG change to support hardwarespecific access
- * to controllines (due to change in nand.c)
- * page_cache added
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Overview:
- * This is a device driver for the NAND flash device found on the
- * SPIA board which utilizes the Toshiba TC58V64AFT part. This is
- * a 64Mibit (8MiB x 8 bits) NAND flash device.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/partitions.h>
-#include <asm/io.h>
-
-/*
- * MTD structure for SPIA board
- */
-static struct mtd_info *spia_mtd = NULL;
-
-/*
- * Values specific to the SPIA board (used with EP7212 processor)
- */
-#define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */
-#define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */
-#define SPIA_PEDR 0x0080 /*
- * IO offset to Port E data register
- * where the CLE, ALE and NCE pins
- * are wired to.
- */
-#define SPIA_PEDDR 0x00c0 /*
- * IO offset to Port E data direction
- * register so we can control the IO
- * lines.
- */
-
-/*
- * Module stuff
- */
-
-static int spia_io_base = SPIA_IO_BASE;
-static int spia_fio_base = SPIA_FIO_BASE;
-static int spia_pedr = SPIA_PEDR;
-static int spia_peddr = SPIA_PEDDR;
-
-module_param(spia_io_base, int, 0);
-module_param(spia_fio_base, int, 0);
-module_param(spia_pedr, int, 0);
-module_param(spia_peddr, int, 0);
-
-/*
- * Define partitions for flash device
- */
-static const struct mtd_partition partition_info[] = {
- {
- .name = "SPIA flash partition 1",
- .offset = 0,
- .size = 2 * 1024 * 1024},
- {
- .name = "SPIA flash partition 2",
- .offset = 2 * 1024 * 1024,
- .size = 6 * 1024 * 1024}
-};
-
-#define NUM_PARTITIONS 2
-
-/*
- * hardware specific access to control-lines
- *
- * ctrl:
- * NAND_CNE: bit 0 -> bit 2
- * NAND_CLE: bit 1 -> bit 0
- * NAND_ALE: bit 2 -> bit 1
- */
-static void spia_hwcontrol(struct mtd_info *mtd, int cmd)
-{
- struct nand_chip *chip = mtd->priv;
-
- if (ctrl & NAND_CTRL_CHANGE) {
- void __iomem *addr = spia_io_base + spia_pedr;
- unsigned char bits;
-
- bits = (ctrl & NAND_CNE) << 2;
- bits |= (ctrl & NAND_CLE | NAND_ALE) >> 1;
- writeb((readb(addr) & ~0x7) | bits, addr);
- }
-
- if (cmd != NAND_CMD_NONE)
- writeb(cmd, chip->IO_ADDR_W);
-}
-
-/*
- * Main initialization routine
- */
-static int __init spia_init(void)
-{
- struct nand_chip *this;
-
- /* Allocate memory for MTD device structure and private data */
- spia_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
- if (!spia_mtd) {
- printk("Unable to allocate SPIA NAND MTD device structure.\n");
- return -ENOMEM;
- }
-
- /* Get pointer to private data */
- this = (struct nand_chip *)(&spia_mtd[1]);
-
- /* Initialize structures */
- memset(spia_mtd, 0, sizeof(struct mtd_info));
- memset(this, 0, sizeof(struct nand_chip));
-
- /* Link the private data with the MTD structure */
- spia_mtd->priv = this;
- spia_mtd->owner = THIS_MODULE;
-
- /*
- * Set GPIO Port E control register so that the pins are configured
- * to be outputs for controlling the NAND flash.
- */
- (*(volatile unsigned char *)(spia_io_base + spia_peddr)) = 0x07;
-
- /* Set address of NAND IO lines */
- this->IO_ADDR_R = (void __iomem *)spia_fio_base;
- this->IO_ADDR_W = (void __iomem *)spia_fio_base;
- /* Set address of hardware control function */
- this->cmd_ctrl = spia_hwcontrol;
- /* 15 us command delay time */
- this->chip_delay = 15;
-
- /* Scan to find existence of the device */
- if (nand_scan(spia_mtd, 1)) {
- kfree(spia_mtd);
- return -ENXIO;
- }
-
- /* Register the partitions */
- mtd_device_register(spia_mtd, partition_info, NUM_PARTITIONS);
-
- /* Return happy */
- return 0;
-}
-
-module_init(spia_init);
-
-/*
- * Clean up routine
- */
-static void __exit spia_cleanup(void)
-{
- /* Release resources, unregister device */
- nand_release(spia_mtd);
-
- /* Free the MTD device structure */
- kfree(spia_mtd);
-}
-
-module_exit(spia_cleanup);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com");
-MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on SPIA board");
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/kernel.h>
-#include <linux/seq_file.h>
#include <linux/slab.h>
#include <linux/fb.h>
#include <linux/init.h>
-#include <linux/proc_fs.h>
#include <linux/delay.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <linux/uaccess.h>
-#include <mach/syspld.h>
-
struct fb_info *cfb;
#define CMAP_MAX_SIZE 16
static int clps7111fb_blank(int blank, struct fb_info *info)
{
- if (blank) {
- if (machine_is_edb7211()) {
- /* Turn off the LCD backlight. */
- clps_writeb(clps_readb(PDDR) & ~EDB_PD3_LCDBL, PDDR);
-
- /* Power off the LCD DC-DC converter. */
- clps_writeb(clps_readb(PDDR) & ~EDB_PD1_LCD_DC_DC_EN, PDDR);
-
- /* Delay for a little while (half a second). */
- udelay(100);
-
- /* Power off the LCD panel. */
- clps_writeb(clps_readb(PDDR) & ~EDB_PD2_LCDEN, PDDR);
-
- /* Power off the LCD controller. */
- clps_writel(clps_readl(SYSCON1) & ~SYSCON1_LCDEN,
- SYSCON1);
- }
- } else {
- if (machine_is_edb7211()) {
- /* Power up the LCD controller. */
- clps_writel(clps_readl(SYSCON1) | SYSCON1_LCDEN,
- SYSCON1);
-
- /* Power up the LCD panel. */
- clps_writeb(clps_readb(PDDR) | EDB_PD2_LCDEN, PDDR);
-
- /* Delay for a little while. */
- udelay(100);
+ /* Enable/Disable LCD controller. */
+ if (blank)
+ clps_writel(clps_readl(SYSCON1) & ~SYSCON1_LCDEN, SYSCON1);
+ else
+ clps_writel(clps_readl(SYSCON1) | SYSCON1_LCDEN, SYSCON1);
- /* Power up the LCD DC-DC converter. */
- clps_writeb(clps_readb(PDDR) | EDB_PD1_LCD_DC_DC_EN,
- PDDR);
-
- /* Turn on the LCD backlight. */
- clps_writeb(clps_readb(PDDR) | EDB_PD3_LCDBL, PDDR);
- }
- }
return 0;
}
.fb_imageblit = cfb_imageblit,
};
-static int backlight_proc_show(struct seq_file *m, void *v)
-{
- if (machine_is_edb7211()) {
- seq_printf(m, "%d\n",
- (clps_readb(PDDR) & EDB_PD3_LCDBL) ? 1 : 0);
- }
-
- return 0;
-}
-
-static int backlight_proc_open(struct inode *inode, struct file *file)
-{
- return single_open(file, backlight_proc_show, NULL);
-}
-
-static ssize_t backlight_proc_write(struct file *file, const char *buffer,
- size_t count, loff_t *pos)
-{
- unsigned char char_value;
- int value;
-
- if (count < 1) {
- return -EINVAL;
- }
-
- if (copy_from_user(&char_value, buffer, 1))
- return -EFAULT;
-
- value = char_value - '0';
-
- if (machine_is_edb7211()) {
- unsigned char port_d;
-
- port_d = clps_readb(PDDR);
-
- if (value) {
- port_d |= EDB_PD3_LCDBL;
- } else {
- port_d &= ~EDB_PD3_LCDBL;
- }
-
- clps_writeb(port_d, PDDR);
- }
-
- return count;
-}
-
-static const struct file_operations backlight_proc_fops = {
- .owner = THIS_MODULE,
- .open = backlight_proc_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
- .write = backlight_proc_write,
-};
-
-static void __init clps711x_guess_lcd_params(struct fb_info *info)
+static void __devinit clps711x_guess_lcd_params(struct fb_info *info)
{
unsigned int lcdcon, syscon, size;
unsigned long phys_base = PAGE_OFFSET;
info->fix.type = FB_TYPE_PACKED_PIXELS;
}
-int __init clps711xfb_init(void)
+static int __devinit clps711x_fb_probe(struct platform_device *pdev)
{
int err = -ENOMEM;
fb_alloc_cmap(&cfb->cmap, CMAP_MAX_SIZE, 0);
- if (!proc_create("backlight", 0444, NULL, &backlight_proc_fops)) {
- printk("Couldn't create the /proc entry for the backlight.\n");
- return -EINVAL;
- }
-
- /*
- * Power up the LCD
- */
- if (machine_is_p720t()) {
- PLD_LCDEN = PLD_LCDEN_EN;
- PLD_PWR |= (PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON);
- }
-
- if (machine_is_edb7211()) {
- /* Power up the LCD panel. */
- clps_writeb(clps_readb(PDDR) | EDB_PD2_LCDEN, PDDR);
-
- /* Delay for a little while. */
- udelay(100);
-
- /* Power up the LCD DC-DC converter. */
- clps_writeb(clps_readb(PDDR) | EDB_PD1_LCD_DC_DC_EN, PDDR);
-
- /* Turn on the LCD backlight. */
- clps_writeb(clps_readb(PDDR) | EDB_PD3_LCDBL, PDDR);
- }
-
err = register_framebuffer(cfb);
out: return err;
}
-static void __exit clps711xfb_exit(void)
+static int __devexit clps711x_fb_remove(struct platform_device *pdev)
{
unregister_framebuffer(cfb);
kfree(cfb);
- /*
- * Power down the LCD
- */
- if (machine_is_p720t()) {
- PLD_LCDEN = 0;
- PLD_PWR &= ~(PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON);
- }
+ return 0;
}
-module_init(clps711xfb_init);
-module_exit(clps711xfb_exit);
+static struct platform_driver clps711x_fb_driver = {
+ .driver = {
+ .name = "video-clps711x",
+ .owner = THIS_MODULE,
+ },
+ .probe = clps711x_fb_probe,
+ .remove = __devexit_p(clps711x_fb_remove),
+};
+module_platform_driver(clps711x_fb_driver);
MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
-MODULE_DESCRIPTION("CLPS711x framebuffer driver");
+MODULE_DESCRIPTION("CLPS711X framebuffer driver");
MODULE_LICENSE("GPL");
projects / can-eth-gw-linux.git / commitdiff