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ARM: zynq: dts: split up device tree
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1 /*
2  * This file contains common code that is intended to be used across
3  * boards so that it's not replicated.
4  *
5  *  Copyright (C) 2011 Xilinx
6  *
7  * This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  */
16
17 #include <linux/init.h>
18 #include <linux/kernel.h>
19 #include <linux/cpumask.h>
20 #include <linux/platform_device.h>
21 #include <linux/clk.h>
22 #include <linux/of_irq.h>
23 #include <linux/of_platform.h>
24 #include <linux/of.h>
25
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/time.h>
29 #include <asm/mach-types.h>
30 #include <asm/page.h>
31 #include <asm/hardware/gic.h>
32 #include <asm/hardware/cache-l2x0.h>
33
34 #include <mach/zynq_soc.h>
35 #include "common.h"
36
37 static struct of_device_id zynq_of_bus_ids[] __initdata = {
38         { .compatible = "simple-bus", },
39         {}
40 };
41
42 /**
43  * xilinx_init_machine() - System specific initialization, intended to be
44  *                         called from board specific initialization.
45  */
46 static void __init xilinx_init_machine(void)
47 {
48         /*
49          * 64KB way size, 8-way associativity, parity disabled
50          */
51         l2x0_of_init(0x02060000, 0xF0F0FFFF);
52
53         of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
54 }
55
56 static struct of_device_id irq_match[] __initdata = {
57         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
58         { }
59 };
60
61 /**
62  * xilinx_irq_init() - Interrupt controller initialization for the GIC.
63  */
64 static void __init xilinx_irq_init(void)
65 {
66         of_irq_init(irq_match);
67 }
68
69 /* The minimum devices needed to be mapped before the VM system is up and
70  * running include the GIC, UART and Timer Counter.
71  */
72
73 static struct map_desc io_desc[] __initdata = {
74         {
75                 .virtual        = TTC0_VIRT,
76                 .pfn            = __phys_to_pfn(TTC0_PHYS),
77                 .length         = TTC0_SIZE,
78                 .type           = MT_DEVICE,
79         }, {
80                 .virtual        = SCU_PERIPH_VIRT,
81                 .pfn            = __phys_to_pfn(SCU_PERIPH_PHYS),
82                 .length         = SCU_PERIPH_SIZE,
83                 .type           = MT_DEVICE,
84         },
85
86 #ifdef CONFIG_DEBUG_LL
87         {
88                 .virtual        = LL_UART_VADDR,
89                 .pfn            = __phys_to_pfn(LL_UART_PADDR),
90                 .length         = UART_SIZE,
91                 .type           = MT_DEVICE,
92         },
93 #endif
94
95 };
96
97 static void __init xilinx_zynq_timer_init(void)
98 {
99         xttcpss_timer_init();
100 }
101
102 /*
103  * Instantiate and initialize the system timer structure
104  */
105 static struct sys_timer xttcpss_sys_timer = {
106         .init           = xilinx_zynq_timer_init,
107 };
108
109 /**
110  * xilinx_map_io() - Create memory mappings needed for early I/O.
111  */
112 static void __init xilinx_map_io(void)
113 {
114         iotable_init(io_desc, ARRAY_SIZE(io_desc));
115 }
116
117 static const char *xilinx_dt_match[] = {
118         "xlnx,zynq-zc702",
119         "xlnx,zynq-7000",
120         NULL
121 };
122
123 MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
124         .map_io         = xilinx_map_io,
125         .init_irq       = xilinx_irq_init,
126         .handle_irq     = gic_handle_irq,
127         .init_machine   = xilinx_init_machine,
128         .timer          = &xttcpss_sys_timer,
129         .dt_compat      = xilinx_dt_match,
130 MACHINE_END