2 * linux/arch/arm/mach-omap2/clock.c
4 * Copyright (C) 2005-2008 Texas Instruments, Inc.
5 * Copyright (C) 2004-2010 Nokia Corporation
8 * Richard Woodruff <r-woodruff2@ti.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
17 #include <linux/kernel.h>
18 #include <linux/export.h>
19 #include <linux/list.h>
20 #include <linux/errno.h>
21 #include <linux/err.h>
22 #include <linux/delay.h>
23 #include <linux/clk.h>
25 #include <linux/bitops.h>
29 #include <plat/prcm.h>
31 #include <trace/events/power.h>
34 #include "clockdomain.h"
39 #include "cm-regbits-24xx.h"
40 #include "cm-regbits-34xx.h"
44 * MAX_MODULE_ENABLE_WAIT: maximum of number of microseconds to wait
45 * for a module to indicate that it is no longer in idle
47 #define MAX_MODULE_ENABLE_WAIT 100000
52 * clkdm_control: if true, then when a clock is enabled in the
53 * hardware, its clockdomain will first be enabled; and when a clock
54 * is disabled in the hardware, its clockdomain will be disabled
57 static bool clkdm_control = true;
59 static LIST_HEAD(clocks);
60 static DEFINE_MUTEX(clocks_mutex);
61 static DEFINE_SPINLOCK(clockfw_lock);
64 * OMAP2+ specific clock functions
67 /* Private functions */
71 * _wait_idlest_generic - wait for a module to leave the idle state
72 * @reg: virtual address of module IDLEST register
73 * @mask: value to mask against to determine if the module is active
74 * @idlest: idle state indicator (0 or 1) for the clock
75 * @name: name of the clock (for printk)
77 * Wait for a module to leave idle, where its idle-status register is
78 * not inside the CM module. Returns 1 if the module left idle
79 * promptly, or 0 if the module did not leave idle before the timeout
80 * elapsed. XXX Deprecated - should be moved into drivers for the
81 * individual IP block that the IDLEST register exists in.
83 static int _wait_idlest_generic(void __iomem *reg, u32 mask, u8 idlest,
88 ena = (idlest) ? 0 : mask;
90 omap_test_timeout(((__raw_readl(reg) & mask) == ena),
91 MAX_MODULE_ENABLE_WAIT, i);
93 if (i < MAX_MODULE_ENABLE_WAIT)
94 pr_debug("omap clock: module associated with clock %s ready after %d loops\n",
97 pr_err("omap clock: module associated with clock %s didn't enable in %d tries\n",
98 name, MAX_MODULE_ENABLE_WAIT);
100 return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0;
104 * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE
105 * @clk: struct clk * belonging to the module
107 * If the necessary clocks for the OMAP hardware IP block that
108 * corresponds to clock @clk are enabled, then wait for the module to
109 * indicate readiness (i.e., to leave IDLE). This code does not
110 * belong in the clock code and will be moved in the medium term to
111 * module-dependent code. No return value.
113 static void _omap2_module_wait_ready(struct clk *clk)
115 void __iomem *companion_reg, *idlest_reg;
116 u8 other_bit, idlest_bit, idlest_val, idlest_reg_id;
120 /* Not all modules have multiple clocks that their IDLEST depends on */
121 if (clk->ops->find_companion) {
122 clk->ops->find_companion(clk, &companion_reg, &other_bit);
123 if (!(__raw_readl(companion_reg) & (1 << other_bit)))
127 clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val);
129 r = cm_split_idlest_reg(idlest_reg, &prcm_mod, &idlest_reg_id);
131 /* IDLEST register not in the CM module */
132 _wait_idlest_generic(idlest_reg, (1 << idlest_bit), idlest_val,
135 cm_wait_module_ready(prcm_mod, idlest_reg_id, idlest_bit);
139 /* Public functions */
142 * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk
143 * @clk: OMAP clock struct ptr to use
145 * Convert a clockdomain name stored in a struct clk 'clk' into a
146 * clockdomain pointer, and save it into the struct clk. Intended to be
147 * called during clk_register(). No return value.
149 void omap2_init_clk_clkdm(struct clk *clk)
151 struct clockdomain *clkdm;
152 const char *clk_name;
154 if (!clk->clkdm_name)
157 clk_name = __clk_get_name(clk);
159 clkdm = clkdm_lookup(clk->clkdm_name);
161 pr_debug("clock: associated clk %s to clkdm %s\n",
162 clk_name, clk->clkdm_name);
165 pr_debug("clock: could not associate clk %s to clkdm %s\n",
166 clk_name, clk->clkdm_name);
171 * omap2_clk_disable_clkdm_control - disable clkdm control on clk enable/disable
173 * Prevent the OMAP clock code from calling into the clockdomain code
174 * when a hardware clock in that clockdomain is enabled or disabled.
175 * Intended to be called at init time from omap*_clk_init(). No
178 void __init omap2_clk_disable_clkdm_control(void)
180 clkdm_control = false;
184 * omap2_clk_dflt_find_companion - find companion clock to @clk
185 * @clk: struct clk * to find the companion clock of
186 * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
187 * @other_bit: u8 ** to return the companion clock bit shift in
189 * Note: We don't need special code here for INVERT_ENABLE for the
190 * time being since INVERT_ENABLE only applies to clocks enabled by
193 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's
194 * just a matter of XORing the bits.
196 * Some clocks don't have companion clocks. For example, modules with
197 * only an interface clock (such as MAILBOXES) don't have a companion
198 * clock. Right now, this code relies on the hardware exporting a bit
199 * in the correct companion register that indicates that the
200 * nonexistent 'companion clock' is active. Future patches will
201 * associate this type of code with per-module data structures to
202 * avoid this issue, and remove the casts. No return value.
204 void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg,
210 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes
211 * it's just a matter of XORing the bits.
213 r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN));
215 *other_reg = (__force void __iomem *)r;
216 *other_bit = clk->enable_bit;
220 * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk
221 * @clk: struct clk * to find IDLEST info for
222 * @idlest_reg: void __iomem ** to return the CM_IDLEST va in
223 * @idlest_bit: u8 * to return the CM_IDLEST bit shift in
224 * @idlest_val: u8 * to return the idle status indicator
226 * Return the CM_IDLEST register address and bit shift corresponding
227 * to the module that "owns" this clock. This default code assumes
228 * that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that
229 * the IDLEST register address ID corresponds to the CM_*CLKEN
230 * register address ID (e.g., that CM_FCLKEN2 corresponds to
231 * CM_IDLEST2). This is not true for all modules. No return value.
233 void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg,
234 u8 *idlest_bit, u8 *idlest_val)
238 r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20);
239 *idlest_reg = (__force void __iomem *)r;
240 *idlest_bit = clk->enable_bit;
243 * 24xx uses 0 to indicate not ready, and 1 to indicate ready.
244 * 34xx reverses this, just to keep us on our toes
245 * AM35xx uses both, depending on the module.
247 if (cpu_is_omap24xx())
248 *idlest_val = OMAP24XX_CM_IDLEST_VAL;
249 else if (cpu_is_omap34xx())
250 *idlest_val = OMAP34XX_CM_IDLEST_VAL;
256 int omap2_dflt_clk_enable(struct clk *clk)
260 if (unlikely(clk->enable_reg == NULL)) {
261 pr_err("clock.c: Enable for %s without enable code\n",
263 return 0; /* REVISIT: -EINVAL */
266 v = __raw_readl(clk->enable_reg);
267 if (clk->flags & INVERT_ENABLE)
268 v &= ~(1 << clk->enable_bit);
270 v |= (1 << clk->enable_bit);
271 __raw_writel(v, clk->enable_reg);
272 v = __raw_readl(clk->enable_reg); /* OCP barrier */
274 if (clk->ops->find_idlest)
275 _omap2_module_wait_ready(clk);
280 void omap2_dflt_clk_disable(struct clk *clk)
284 if (!clk->enable_reg) {
286 * 'Independent' here refers to a clock which is not
287 * controlled by its parent.
289 pr_err("clock: clk_disable called on independent clock %s which has no enable_reg\n", clk->name);
293 v = __raw_readl(clk->enable_reg);
294 if (clk->flags & INVERT_ENABLE)
295 v |= (1 << clk->enable_bit);
297 v &= ~(1 << clk->enable_bit);
298 __raw_writel(v, clk->enable_reg);
299 /* No OCP barrier needed here since it is a disable operation */
302 const struct clkops clkops_omap2_dflt_wait = {
303 .enable = omap2_dflt_clk_enable,
304 .disable = omap2_dflt_clk_disable,
305 .find_companion = omap2_clk_dflt_find_companion,
306 .find_idlest = omap2_clk_dflt_find_idlest,
309 const struct clkops clkops_omap2_dflt = {
310 .enable = omap2_dflt_clk_enable,
311 .disable = omap2_dflt_clk_disable,
315 * omap2_clk_disable - disable a clock, if the system is not using it
316 * @clk: struct clk * to disable
318 * Decrements the usecount on struct clk @clk. If there are no users
319 * left, call the clkops-specific clock disable function to disable it
320 * in hardware. If the clock is part of a clockdomain (which they all
321 * should be), request that the clockdomain be disabled. (It too has
322 * a usecount, and so will not be disabled in the hardware until it no
323 * longer has any users.) If the clock has a parent clock (most of
324 * them do), then call ourselves, recursing on the parent clock. This
325 * can cause an entire branch of the clock tree to be powered off by
326 * simply disabling one clock. Intended to be called with the clockfw_lock
327 * spinlock held. No return value.
329 void omap2_clk_disable(struct clk *clk)
331 if (clk->usecount == 0) {
332 WARN(1, "clock: %s: omap2_clk_disable() called, but usecount already 0?", clk->name);
336 pr_debug("clock: %s: decrementing usecount\n", clk->name);
340 if (clk->usecount > 0)
343 pr_debug("clock: %s: disabling in hardware\n", clk->name);
345 if (clk->ops && clk->ops->disable) {
346 trace_clock_disable(clk->name, 0, smp_processor_id());
347 clk->ops->disable(clk);
350 if (clkdm_control && clk->clkdm)
351 clkdm_clk_disable(clk->clkdm, clk);
354 omap2_clk_disable(clk->parent);
358 * omap2_clk_enable - request that the system enable a clock
359 * @clk: struct clk * to enable
361 * Increments the usecount on struct clk @clk. If there were no users
362 * previously, then recurse up the clock tree, enabling all of the
363 * clock's parents and all of the parent clockdomains, and finally,
364 * enabling @clk's clockdomain, and @clk itself. Intended to be
365 * called with the clockfw_lock spinlock held. Returns 0 upon success
366 * or a negative error code upon failure.
368 int omap2_clk_enable(struct clk *clk)
372 pr_debug("clock: %s: incrementing usecount\n", clk->name);
376 if (clk->usecount > 1)
379 pr_debug("clock: %s: enabling in hardware\n", clk->name);
382 ret = omap2_clk_enable(clk->parent);
384 WARN(1, "clock: %s: could not enable parent %s: %d\n",
385 clk->name, clk->parent->name, ret);
390 if (clkdm_control && clk->clkdm) {
391 ret = clkdm_clk_enable(clk->clkdm, clk);
393 WARN(1, "clock: %s: could not enable clockdomain %s: %d\n",
394 clk->name, clk->clkdm->name, ret);
399 if (clk->ops && clk->ops->enable) {
400 trace_clock_enable(clk->name, 1, smp_processor_id());
401 ret = clk->ops->enable(clk);
403 WARN(1, "clock: %s: could not enable: %d\n",
412 if (clkdm_control && clk->clkdm)
413 clkdm_clk_disable(clk->clkdm, clk);
416 omap2_clk_disable(clk->parent);
423 /* Given a clock and a rate apply a clock specific rounding function */
424 long omap2_clk_round_rate(struct clk *clk, unsigned long rate)
427 return clk->round_rate(clk, rate);
432 /* Set the clock rate for a clock source */
433 int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
437 pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate);
439 /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */
441 trace_clock_set_rate(clk->name, rate, smp_processor_id());
442 ret = clk->set_rate(clk, rate);
448 int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
453 if (clk->parent == new_parent)
456 return omap2_clksel_set_parent(clk, new_parent);
460 * OMAP2+ clock reset and init functions
463 #ifdef CONFIG_OMAP_RESET_CLOCKS
464 void omap2_clk_disable_unused(struct clk *clk)
468 v = (clk->flags & INVERT_ENABLE) ? (1 << clk->enable_bit) : 0;
470 regval32 = __raw_readl(clk->enable_reg);
471 if ((regval32 & (1 << clk->enable_bit)) == v)
474 pr_debug("Disabling unused clock \"%s\"\n", clk->name);
475 if (cpu_is_omap34xx()) {
476 omap2_clk_enable(clk);
477 omap2_clk_disable(clk);
479 clk->ops->disable(clk);
481 if (clk->clkdm != NULL)
482 pwrdm_state_switch(clk->clkdm->pwrdm.ptr);
487 * omap2_clk_switch_mpurate_at_boot - switch ARM MPU rate by boot-time argument
488 * @mpurate_ck_name: clk name of the clock to change rate
490 * Change the ARM MPU clock rate to the rate specified on the command
491 * line, if one was specified. @mpurate_ck_name should be
492 * "virt_prcm_set" on OMAP2xxx and "dpll1_ck" on OMAP34xx/OMAP36xx.
493 * XXX Does not handle voltage scaling - on OMAP2xxx this is currently
494 * handled by the virt_prcm_set clock, but this should be handled by
495 * the OPP layer. XXX This is intended to be handled by the OPP layer
496 * code in the near future and should be removed from the clock code.
497 * Returns -EINVAL if 'mpurate' is zero or if clk_set_rate() rejects
498 * the rate, -ENOENT if the struct clk referred to by @mpurate_ck_name
499 * cannot be found, or 0 upon success.
501 int __init omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name)
503 struct clk *mpurate_ck;
509 mpurate_ck = clk_get(NULL, mpurate_ck_name);
510 if (WARN(IS_ERR(mpurate_ck), "Failed to get %s.\n", mpurate_ck_name))
513 r = clk_set_rate(mpurate_ck, mpurate);
514 if (IS_ERR_VALUE(r)) {
515 WARN(1, "clock: %s: unable to set MPU rate to %d: %d\n",
516 mpurate_ck->name, mpurate, r);
522 recalculate_root_clocks();
530 * omap2_clk_print_new_rates - print summary of current clock tree rates
531 * @hfclkin_ck_name: clk name for the off-chip HF oscillator
532 * @core_ck_name: clk name for the on-chip CORE_CLK
533 * @mpu_ck_name: clk name for the ARM MPU clock
535 * Prints a short message to the console with the HFCLKIN oscillator
536 * rate, the rate of the CORE clock, and the rate of the ARM MPU clock.
537 * Called by the boot-time MPU rate switching code. XXX This is intended
538 * to be handled by the OPP layer code in the near future and should be
539 * removed from the clock code. No return value.
541 void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name,
542 const char *core_ck_name,
543 const char *mpu_ck_name)
545 struct clk *hfclkin_ck, *core_ck, *mpu_ck;
546 unsigned long hfclkin_rate;
548 mpu_ck = clk_get(NULL, mpu_ck_name);
549 if (WARN(IS_ERR(mpu_ck), "clock: failed to get %s.\n", mpu_ck_name))
552 core_ck = clk_get(NULL, core_ck_name);
553 if (WARN(IS_ERR(core_ck), "clock: failed to get %s.\n", core_ck_name))
556 hfclkin_ck = clk_get(NULL, hfclkin_ck_name);
557 if (WARN(IS_ERR(hfclkin_ck), "Failed to get %s.\n", hfclkin_ck_name))
560 hfclkin_rate = clk_get_rate(hfclkin_ck);
562 pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
563 (hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10),
564 (clk_get_rate(core_ck) / 1000000),
565 (clk_get_rate(mpu_ck) / 1000000));
570 int clk_enable(struct clk *clk)
575 if (clk == NULL || IS_ERR(clk))
578 spin_lock_irqsave(&clockfw_lock, flags);
579 ret = omap2_clk_enable(clk);
580 spin_unlock_irqrestore(&clockfw_lock, flags);
584 EXPORT_SYMBOL(clk_enable);
586 void clk_disable(struct clk *clk)
590 if (clk == NULL || IS_ERR(clk))
593 spin_lock_irqsave(&clockfw_lock, flags);
594 if (clk->usecount == 0) {
595 pr_err("Trying disable clock %s with 0 usecount\n",
601 omap2_clk_disable(clk);
604 spin_unlock_irqrestore(&clockfw_lock, flags);
606 EXPORT_SYMBOL(clk_disable);
608 unsigned long clk_get_rate(struct clk *clk)
613 if (clk == NULL || IS_ERR(clk))
616 spin_lock_irqsave(&clockfw_lock, flags);
618 spin_unlock_irqrestore(&clockfw_lock, flags);
622 EXPORT_SYMBOL(clk_get_rate);
625 * Optional clock functions defined in include/linux/clk.h
628 long clk_round_rate(struct clk *clk, unsigned long rate)
633 if (clk == NULL || IS_ERR(clk))
636 spin_lock_irqsave(&clockfw_lock, flags);
637 ret = omap2_clk_round_rate(clk, rate);
638 spin_unlock_irqrestore(&clockfw_lock, flags);
642 EXPORT_SYMBOL(clk_round_rate);
644 int clk_set_rate(struct clk *clk, unsigned long rate)
649 if (clk == NULL || IS_ERR(clk))
652 spin_lock_irqsave(&clockfw_lock, flags);
653 ret = omap2_clk_set_rate(clk, rate);
656 spin_unlock_irqrestore(&clockfw_lock, flags);
660 EXPORT_SYMBOL(clk_set_rate);
662 int clk_set_parent(struct clk *clk, struct clk *parent)
667 if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent))
670 spin_lock_irqsave(&clockfw_lock, flags);
671 if (clk->usecount == 0) {
672 ret = omap2_clk_set_parent(clk, parent);
678 spin_unlock_irqrestore(&clockfw_lock, flags);
682 EXPORT_SYMBOL(clk_set_parent);
684 struct clk *clk_get_parent(struct clk *clk)
688 EXPORT_SYMBOL(clk_get_parent);
691 * OMAP specific clock functions shared between omap1 and omap2
694 int __initdata mpurate;
697 * By default we use the rate set by the bootloader.
698 * You can override this with mpurate= cmdline option.
700 static int __init omap_clk_setup(char *str)
702 get_option(&str, &mpurate);
712 __setup("mpurate=", omap_clk_setup);
714 /* Used for clocks that always have same value as the parent clock */
715 unsigned long followparent_recalc(struct clk *clk)
717 return clk->parent->rate;
721 * Used for clocks that have the same value as the parent clock,
722 * divided by some factor
724 unsigned long omap_fixed_divisor_recalc(struct clk *clk)
726 WARN_ON(!clk->fixed_div);
728 return clk->parent->rate / clk->fixed_div;
731 void clk_reparent(struct clk *child, struct clk *parent)
733 list_del_init(&child->sibling);
735 list_add(&child->sibling, &parent->children);
736 child->parent = parent;
738 /* now do the debugfs renaming to reattach the child
739 to the proper parent */
742 /* Propagate rate to children */
743 void propagate_rate(struct clk *tclk)
747 list_for_each_entry(clkp, &tclk->children, sibling) {
749 clkp->rate = clkp->recalc(clkp);
750 propagate_rate(clkp);
754 static LIST_HEAD(root_clks);
757 * recalculate_root_clocks - recalculate and propagate all root clocks
759 * Recalculates all root clocks (clocks with no parent), which if the
760 * clock's .recalc is set correctly, should also propagate their rates.
763 void recalculate_root_clocks(void)
767 list_for_each_entry(clkp, &root_clks, sibling) {
769 clkp->rate = clkp->recalc(clkp);
770 propagate_rate(clkp);
775 * clk_preinit - initialize any fields in the struct clk before clk init
776 * @clk: struct clk * to initialize
778 * Initialize any struct clk fields needed before normal clk initialization
779 * can run. No return value.
781 void clk_preinit(struct clk *clk)
783 INIT_LIST_HEAD(&clk->children);
786 int clk_register(struct clk *clk)
788 if (clk == NULL || IS_ERR(clk))
792 * trap out already registered clocks
794 if (clk->node.next || clk->node.prev)
797 mutex_lock(&clocks_mutex);
799 list_add(&clk->sibling, &clk->parent->children);
801 list_add(&clk->sibling, &root_clks);
803 list_add(&clk->node, &clocks);
806 mutex_unlock(&clocks_mutex);
810 EXPORT_SYMBOL(clk_register);
812 void clk_unregister(struct clk *clk)
814 if (clk == NULL || IS_ERR(clk))
817 mutex_lock(&clocks_mutex);
818 list_del(&clk->sibling);
819 list_del(&clk->node);
820 mutex_unlock(&clocks_mutex);
822 EXPORT_SYMBOL(clk_unregister);
824 void clk_enable_init_clocks(void)
828 list_for_each_entry(clkp, &clocks, node)
829 if (clkp->flags & ENABLE_ON_INIT)
834 * omap_clk_get_by_name - locate OMAP struct clk by its name
835 * @name: name of the struct clk to locate
837 * Locate an OMAP struct clk by its name. Assumes that struct clk
838 * names are unique. Returns NULL if not found or a pointer to the
839 * struct clk if found.
841 struct clk *omap_clk_get_by_name(const char *name)
844 struct clk *ret = NULL;
846 mutex_lock(&clocks_mutex);
848 list_for_each_entry(c, &clocks, node) {
849 if (!strcmp(c->name, name)) {
855 mutex_unlock(&clocks_mutex);
860 int omap_clk_enable_autoidle_all(void)
865 spin_lock_irqsave(&clockfw_lock, flags);
867 list_for_each_entry(c, &clocks, node)
868 if (c->ops->allow_idle)
869 c->ops->allow_idle(c);
871 spin_unlock_irqrestore(&clockfw_lock, flags);
876 int omap_clk_disable_autoidle_all(void)
881 spin_lock_irqsave(&clockfw_lock, flags);
883 list_for_each_entry(c, &clocks, node)
884 if (c->ops->deny_idle)
885 c->ops->deny_idle(c);
887 spin_unlock_irqrestore(&clockfw_lock, flags);
895 static int clkll_enable_null(struct clk *clk)
900 static void clkll_disable_null(struct clk *clk)
904 const struct clkops clkops_null = {
905 .enable = clkll_enable_null,
906 .disable = clkll_disable_null,
912 * Used for clock aliases that are needed on some OMAPs, but not others
914 struct clk dummy_ck = {
923 #ifdef CONFIG_OMAP_RESET_CLOCKS
925 * Disable any unused clocks left on by the bootloader
927 static int __init clk_disable_unused(void)
932 pr_info("clock: disabling unused clocks to save power\n");
934 spin_lock_irqsave(&clockfw_lock, flags);
935 list_for_each_entry(ck, &clocks, node) {
936 if (ck->ops == &clkops_null)
939 if (ck->usecount > 0 || !ck->enable_reg)
942 omap2_clk_disable_unused(ck);
944 spin_unlock_irqrestore(&clockfw_lock, flags);
948 late_initcall(clk_disable_unused);
949 late_initcall(omap_clk_enable_autoidle_all);
952 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
954 * debugfs support to trace clock tree hierarchy and attributes
957 #include <linux/debugfs.h>
958 #include <linux/seq_file.h>
960 static struct dentry *clk_debugfs_root;
962 static int clk_dbg_show_summary(struct seq_file *s, void *unused)
967 mutex_lock(&clocks_mutex);
968 seq_printf(s, "%-30s %-30s %-10s %s\n",
969 "clock-name", "parent-name", "rate", "use-count");
971 list_for_each_entry(c, &clocks, node) {
973 seq_printf(s, "%-30s %-30s %-10lu %d\n",
974 c->name, pa ? pa->name : "none", c->rate,
977 mutex_unlock(&clocks_mutex);
982 static int clk_dbg_open(struct inode *inode, struct file *file)
984 return single_open(file, clk_dbg_show_summary, inode->i_private);
987 static const struct file_operations debug_clock_fops = {
988 .open = clk_dbg_open,
991 .release = single_release,
994 static int clk_debugfs_register_one(struct clk *c)
998 struct clk *pa = c->parent;
1000 d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root);
1005 d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
1010 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
1015 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
1023 debugfs_remove_recursive(c->dent);
1027 static int clk_debugfs_register(struct clk *c)
1030 struct clk *pa = c->parent;
1032 if (pa && !pa->dent) {
1033 err = clk_debugfs_register(pa);
1039 err = clk_debugfs_register_one(c);
1046 static int __init clk_debugfs_init(void)
1052 d = debugfs_create_dir("clock", NULL);
1055 clk_debugfs_root = d;
1057 list_for_each_entry(c, &clocks, node) {
1058 err = clk_debugfs_register(c);
1063 d = debugfs_create_file("summary", S_IRUGO,
1064 d, NULL, &debug_clock_fops);
1070 debugfs_remove_recursive(clk_debugfs_root);
1073 late_initcall(clk_debugfs_init);
1075 #endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */