arch/arm/boot/dts/lpc32xx.dtsi

   1 /*
   2  * NXP LPC32xx SoC
   3  *
   4  * Copyright 2012 Roland Stigge <stigge@antcom.de>
   5  *
   6  * The code contained herein is licensed under the GNU General Public
   7  * License. You may obtain a copy of the GNU General Public License
   8  * Version 2 or later at the following locations:
   9  *
  10  * http://www.opensource.org/licenses/gpl-license.html
  11  * http://www.gnu.org/copyleft/gpl.html
  12  */
  13
  14 /include/ "skeleton.dtsi"
  15
  16 / {
  17         compatible = "nxp,lpc3220";
  18         interrupt-parent = <&mic>;
  19
  20         cpus {
  21                 cpu@0 {
  22                         compatible = "arm,arm926ejs";
  23                 };
  24         };
  25
  26         ahb {
  27                 #address-cells = <1>;
  28                 #size-cells = <1>;
  29                 compatible = "simple-bus";
  30                 ranges = <0x20000000 0x20000000 0x30000000>;
  31
  32                 /*
  33                  * Enable either SLC or MLC
  34                  */
  35                 slc: flash@20020000 {
  36                         compatible = "nxp,lpc3220-slc";
  37                         reg = <0x20020000 0x1000>;
  38                         status = "disabled";
  39                 };
  40
  41                 mlc: flash@200a8000 {
  42                         compatible = "nxp,lpc3220-mlc";
  43                         reg = <0x200a8000 0x11000>;
  44                         interrupts = <11 0>;
  45                         status = "disabled";
  46                 };
  47
  48                 dma@31000000 {
  49                         compatible = "arm,pl080", "arm,primecell";
  50                         reg = <0x31000000 0x1000>;
  51                         interrupts = <0x1c 0>;
  52                 };
  53
  54                 /*
  55                  * Enable either ohci or usbd (gadget)!
  56                  */
  57                 ohci@31020000 {
  58                         compatible = "nxp,ohci-nxp", "usb-ohci";
  59                         reg = <0x31020000 0x300>;
  60                         interrupts = <0x3b 0>;
  61                         status = "disabled";
  62                 };
  63
  64                 usbd@31020000 {
  65                         compatible = "nxp,lpc3220-udc";
  66                         reg = <0x31020000 0x300>;
  67                         interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>;
  68                         status = "disabled";
  69                 };
  70
  71                 clcd@31040000 {
  72                         compatible = "arm,pl110", "arm,primecell";
  73                         reg = <0x31040000 0x1000>;
  74                         interrupts = <0x0e 0>;
  75                         status = "disabled";
  76                 };
  77
  78                 mac: ethernet@31060000 {
  79                         compatible = "nxp,lpc-eth";
  80                         reg = <0x31060000 0x1000>;
  81                         interrupts = <0x1d 0>;
  82                 };
  83
  84                 apb {
  85                         #address-cells = <1>;
  86                         #size-cells = <1>;
  87                         compatible = "simple-bus";
  88                         ranges = <0x20000000 0x20000000 0x30000000>;
  89
  90                         ssp0: ssp@20084000 {
  91                                 compatible = "arm,pl022", "arm,primecell";
  92                                 reg = <0x20084000 0x1000>;
  93                                 interrupts = <0x14 0>;
  94                         };
  95
  96                         spi1: spi@20088000 {
  97                                 compatible = "nxp,lpc3220-spi";
  98                                 reg = <0x20088000 0x1000>;
  99                         };
 100
 101                         ssp1: ssp@2008c000 {
 102                                 compatible = "arm,pl022", "arm,primecell";
 103                                 reg = <0x2008c000 0x1000>;
 104                                 interrupts = <0x15 0>;
 105                         };
 106
 107                         spi2: spi@20090000 {
 108                                 compatible = "nxp,lpc3220-spi";
 109                                 reg = <0x20090000 0x1000>;
 110                         };
 111
 112                         i2s0: i2s@20094000 {
 113                                 compatible = "nxp,lpc3220-i2s";
 114                                 reg = <0x20094000 0x1000>;
 115                         };
 116
 117                         sd@20098000 {
 118                                 compatible = "arm,pl18x", "arm,primecell";
 119                                 reg = <0x20098000 0x1000>;
 120                                 interrupts = <0x0f 0>, <0x0d 0>;
 121                                 status = "disabled";
 122                         };
 123
 124                         i2s1: i2s@2009C000 {
 125                                 compatible = "nxp,lpc3220-i2s";
 126                                 reg = <0x2009C000 0x1000>;
 127                         };
 128
 129                         /* UART5 first since it is the default console, ttyS0 */
 130                         uart5: serial@40090000 {
 131                                 /* actually, ns16550a w/ 64 byte fifos! */
 132                                 compatible = "nxp,lpc3220-uart";
 133                                 reg = <0x40090000 0x1000>;
 134                                 interrupts = <9 0>;
 135                                 clock-frequency = <13000000>;
 136                                 reg-shift = <2>;
 137                                 status = "disabled";
 138                         };
 139
 140                         uart3: serial@40080000 {
 141                                 compatible = "nxp,lpc3220-uart";
 142                                 reg = <0x40080000 0x1000>;
 143                                 interrupts = <7 0>;
 144                                 clock-frequency = <13000000>;
 145                                 reg-shift = <2>;
 146                                 status = "disabled";
 147                         };
 148
 149                         uart4: serial@40088000 {
 150                                 compatible = "nxp,lpc3220-uart";
 151                                 reg = <0x40088000 0x1000>;
 152                                 interrupts = <8 0>;
 153                                 clock-frequency = <13000000>;
 154                                 reg-shift = <2>;
 155                                 status = "disabled";
 156                         };
 157
 158                         uart6: serial@40098000 {
 159                                 compatible = "nxp,lpc3220-uart";
 160                                 reg = <0x40098000 0x1000>;
 161                                 interrupts = <10 0>;
 162                                 clock-frequency = <13000000>;
 163                                 reg-shift = <2>;
 164                                 status = "disabled";
 165                         };
 166
 167                         i2c1: i2c@400A0000 {
 168                                 compatible = "nxp,pnx-i2c";
 169                                 reg = <0x400A0000 0x100>;
 170                                 interrupts = <0x33 0>;
 171                                 #address-cells = <1>;
 172                                 #size-cells = <0>;
 173                                 pnx,timeout = <0x64>;
 174                         };
 175
 176                         i2c2: i2c@400A8000 {
 177                                 compatible = "nxp,pnx-i2c";
 178                                 reg = <0x400A8000 0x100>;
 179                                 interrupts = <0x32 0>;
 180                                 #address-cells = <1>;
 181                                 #size-cells = <0>;
 182                                 pnx,timeout = <0x64>;
 183                         };
 184
 185                         mpwm: mpwm@400E8000 {
 186                                 compatible = "nxp,lpc3220-motor-pwm";
 187                                 reg = <0x400E8000 0x78>;
 188                                 status = "disabled";
 189                                 #pwm-cells = <2>;
 190                         };
 191
 192                         i2cusb: i2c@31020300 {
 193                                 compatible = "nxp,pnx-i2c";
 194                                 reg = <0x31020300 0x100>;
 195                                 interrupts = <0x3f 0>;
 196                                 #address-cells = <1>;
 197                                 #size-cells = <0>;
 198                                 pnx,timeout = <0x64>;
 199                         };
 200                 };
 201
 202                 fab {
 203                         #address-cells = <1>;
 204                         #size-cells = <1>;
 205                         compatible = "simple-bus";
 206                         ranges = <0x20000000 0x20000000 0x30000000>;
 207
 208                         /*
 209                          * MIC Interrupt controller includes:
 210                          *   MIC @40008000
 211                          *   SIC1 @4000C000
 212                          *   SIC2 @40010000
 213                          */
 214                         mic: interrupt-controller@40008000 {
 215                                 compatible = "nxp,lpc3220-mic";
 216                                 interrupt-controller;
 217                                 reg = <0x40008000 0xC000>;
 218                                 #interrupt-cells = <2>;
 219                         };
 220
 221                         uart1: serial@40014000 {
 222                                 compatible = "nxp,lpc3220-hsuart";
 223                                 reg = <0x40014000 0x1000>;
 224                                 interrupts = <26 0>;
 225                                 status = "disabled";
 226                         };
 227
 228                         uart2: serial@40018000 {
 229                                 compatible = "nxp,lpc3220-hsuart";
 230                                 reg = <0x40018000 0x1000>;
 231                                 interrupts = <25 0>;
 232                                 status = "disabled";
 233                         };
 234
 235                         uart7: serial@4001c000 {
 236                                 compatible = "nxp,lpc3220-hsuart";
 237                                 reg = <0x4001c000 0x1000>;
 238                                 interrupts = <24 0>;
 239                                 status = "disabled";
 240                         };
 241
 242                         rtc@40024000 {
 243                                 compatible = "nxp,lpc3220-rtc";
 244                                 reg = <0x40024000 0x1000>;
 245                                 interrupts = <0x34 0>;
 246                         };
 247
 248                         gpio: gpio@40028000 {
 249                                 compatible = "nxp,lpc3220-gpio";
 250                                 reg = <0x40028000 0x1000>;
 251                                 gpio-controller;
 252                                 #gpio-cells = <3>; /* bank, pin, flags */
 253                         };
 254
 255                         watchdog@4003C000 {
 256                                 compatible = "nxp,pnx4008-wdt";
 257                                 reg = <0x4003C000 0x1000>;
 258                         };
 259
 260                         /*
 261                          * TSC vs. ADC: Since those two share the same
 262                          * hardware, you need to choose from one of the
 263                          * following two and do 'status = "okay";' for one of
 264                          * them
 265                          */
 266
 267                         adc@40048000 {
 268                                 compatible = "nxp,lpc3220-adc";
 269                                 reg = <0x40048000 0x1000>;
 270                                 interrupts = <0x27 0>;
 271                                 status = "disabled";
 272                         };
 273
 274                         tsc@40048000 {
 275                                 compatible = "nxp,lpc3220-tsc";
 276                                 reg = <0x40048000 0x1000>;
 277                                 interrupts = <0x27 0>;
 278                                 status = "disabled";
 279                         };
 280
 281                         key@40050000 {
 282                                 compatible = "nxp,lpc3220-key";
 283                                 reg = <0x40050000 0x1000>;
 284                                 interrupts = <54 0>;
 285                                 status = "disabled";
 286                         };
 287
 288                         pwm: pwm@4005C000 {
 289                                 compatible = "nxp,lpc3220-pwm";
 290                                 reg = <0x4005C000 0x8>;
 291                                 status = "disabled";
 292                         };
 293                 };
 294         };
 295 };