4 * DSP-BIOS Bridge driver support functions for TI OMAP processors.
6 * Global CFG constants and types, shared between DSP API and Bridge driver.
8 * Copyright (C) 2005-2006 Texas Instruments, Inc.
10 * This package is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
16 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
23 #define CFG_MAXMEMREGISTERS 9
26 #define CFG_IRQSHARED 0x01 /* IRQ can be shared */
28 /* A platform-related device handle: */
32 * Host resource structure.
35 u32 num_mem_windows; /* Set to default */
36 /* This is the base.memory */
37 u32 mem_base[CFG_MAXMEMREGISTERS]; /* shm virtual address */
38 u32 mem_length[CFG_MAXMEMREGISTERS]; /* Length of the Base */
39 u32 mem_phys[CFG_MAXMEMREGISTERS]; /* shm Physical address */
40 u8 birq_registers; /* IRQ Number */
41 u8 birq_attrib; /* IRQ Attribute */
42 u32 offset_for_monitor; /* The Shared memory starts from
43 * mem_base + this offset */
45 * Info needed by NODE for allocating channels to communicate with RMS:
46 * chnl_offset: Offset of RMS channels. Lower channels are
48 * chnl_buf_size: Size of channel buffer to send to RMS
49 * num_chnls: Total number of channels
50 * (including reserved).
55 void __iomem *per_base;
56 void __iomem *per_pm_base;
57 void __iomem *core_pm_base;
58 void __iomem *dmmu_base;