sound/soc/omap/omap-mcpdm.c

   1 /*
   2  * omap-mcpdm.c  --  OMAP ALSA SoC DAI driver using McPDM port
   3  *
   4  * Copyright (C) 2009 - 2011 Texas Instruments
   5  *
   6  * Author: Misael Lopez Cruz <misael.lopez@ti.com>
   7  * Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
   8  *          Margarita Olaya <magi.olaya@ti.com>
   9  *          Peter Ujfalusi <peter.ujfalusi@ti.com>
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License
  13  * version 2 as published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  23  * 02110-1301 USA
  24  *
  25  */
  26
  27 #include <linux/init.h>
  28 #include <linux/module.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/err.h>
  32 #include <linux/io.h>
  33 #include <linux/irq.h>
  34 #include <linux/slab.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/of_device.h>
  37
  38 #include <sound/core.h>
  39 #include <sound/pcm.h>
  40 #include <sound/pcm_params.h>
  41 #include <sound/soc.h>
  42
  43 #include "omap-mcpdm.h"
  44 #include "omap-pcm.h"
  45
  46 #define OMAP44XX_MCPDM_L3_BASE          0x49032000
  47
  48 struct omap_mcpdm {
  49         struct device *dev;
  50         unsigned long phys_base;
  51         void __iomem *io_base;
  52         int irq;
  53
  54         struct mutex mutex;
  55
  56         /* channel data */
  57         u32 dn_channels;
  58         u32 up_channels;
  59
  60         /* McPDM FIFO thresholds */
  61         u32 dn_threshold;
  62         u32 up_threshold;
  63
  64         /* McPDM dn offsets for rx1, and 2 channels */
  65         u32 dn_rx_offset;
  66 };
  67
  68 /*
  69  * Stream DMA parameters
  70  */
  71 static struct omap_pcm_dma_data omap_mcpdm_dai_dma_params[] = {
  72         {
  73                 .name = "Audio playback",
  74         },
  75         {
  76                 .name = "Audio capture",
  77         },
  78 };
  79
  80 static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
  81 {
  82         __raw_writel(val, mcpdm->io_base + reg);
  83 }
  84
  85 static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
  86 {
  87         return __raw_readl(mcpdm->io_base + reg);
  88 }
  89
  90 #ifdef DEBUG
  91 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
  92 {
  93         dev_dbg(mcpdm->dev, "***********************\n");
  94         dev_dbg(mcpdm->dev, "IRQSTATUS_RAW:  0x%04x\n",
  95                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
  96         dev_dbg(mcpdm->dev, "IRQSTATUS:  0x%04x\n",
  97                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
  98         dev_dbg(mcpdm->dev, "IRQENABLE_SET:  0x%04x\n",
  99                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
 100         dev_dbg(mcpdm->dev, "IRQENABLE_CLR:  0x%04x\n",
 101                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
 102         dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
 103                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
 104         dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
 105                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
 106         dev_dbg(mcpdm->dev, "DMAENABLE_CLR:  0x%04x\n",
 107                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
 108         dev_dbg(mcpdm->dev, "DMAWAKEEN:  0x%04x\n",
 109                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
 110         dev_dbg(mcpdm->dev, "CTRL:  0x%04x\n",
 111                         omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
 112         dev_dbg(mcpdm->dev, "DN_DATA:  0x%04x\n",
 113                         omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
 114         dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
 115                         omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
 116         dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
 117                         omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
 118         dev_dbg(mcpdm->dev, "FIFO_CTRL_UP:  0x%04x\n",
 119                         omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
 120         dev_dbg(mcpdm->dev, "***********************\n");
 121 }
 122 #else
 123 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
 124 #endif
 125
 126 /*
 127  * Enables the transfer through the PDM interface to/from the Phoenix
 128  * codec by enabling the corresponding UP or DN channels.
 129  */
 130 static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
 131 {
 132         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 133
 134         ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 135         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 136
 137         ctrl |= mcpdm->dn_channels | mcpdm->up_channels;
 138         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 139
 140         ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 141         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 142 }
 143
 144 /*
 145  * Disables the transfer through the PDM interface to/from the Phoenix
 146  * codec by disabling the corresponding UP or DN channels.
 147  */
 148 static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
 149 {
 150         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 151
 152         ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 153         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 154
 155         ctrl &= ~(mcpdm->dn_channels | mcpdm->up_channels);
 156         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 157
 158         ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 159         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 160
 161 }
 162
 163 /*
 164  * Is the physical McPDM interface active.
 165  */
 166 static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
 167 {
 168         return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
 169                                         (MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK);
 170 }
 171
 172 /*
 173  * Configures McPDM uplink, and downlink for audio.
 174  * This function should be called before omap_mcpdm_start.
 175  */
 176 static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
 177 {
 178         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
 179                         MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
 180                         MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
 181
 182         /* Enable DN RX1/2 offset cancellation feature, if configured */
 183         if (mcpdm->dn_rx_offset) {
 184                 u32 dn_offset = mcpdm->dn_rx_offset;
 185
 186                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
 187                 dn_offset |= (MCPDM_DN_OFST_RX1_EN | MCPDM_DN_OFST_RX2_EN);
 188                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
 189         }
 190
 191         omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN, mcpdm->dn_threshold);
 192         omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP, mcpdm->up_threshold);
 193
 194         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
 195                         MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
 196 }
 197
 198 /*
 199  * Cleans McPDM uplink, and downlink configuration.
 200  * This function should be called when the stream is closed.
 201  */
 202 static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
 203 {
 204         /* Disable irq request generation for downlink */
 205         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
 206                         MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL);
 207
 208         /* Disable DMA request generation for downlink */
 209         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
 210
 211         /* Disable irq request generation for uplink */
 212         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
 213                         MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
 214
 215         /* Disable DMA request generation for uplink */
 216         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
 217
 218         /* Disable RX1/2 offset cancellation */
 219         if (mcpdm->dn_rx_offset)
 220                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, 0);
 221 }
 222
 223 static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
 224 {
 225         struct omap_mcpdm *mcpdm = dev_id;
 226         int irq_status;
 227
 228         irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
 229
 230         /* Acknowledge irq event */
 231         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
 232
 233         if (irq_status & MCPDM_DN_IRQ_FULL)
 234                 dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
 235
 236         if (irq_status & MCPDM_DN_IRQ_EMPTY)
 237                 dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
 238
 239         if (irq_status & MCPDM_DN_IRQ)
 240                 dev_dbg(mcpdm->dev, "DN (playback) write request\n");
 241
 242         if (irq_status & MCPDM_UP_IRQ_FULL)
 243                 dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
 244
 245         if (irq_status & MCPDM_UP_IRQ_EMPTY)
 246                 dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
 247
 248         if (irq_status & MCPDM_UP_IRQ)
 249                 dev_dbg(mcpdm->dev, "UP (capture) write request\n");
 250
 251         return IRQ_HANDLED;
 252 }
 253
 254 static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
 255                                   struct snd_soc_dai *dai)
 256 {
 257         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 258
 259         mutex_lock(&mcpdm->mutex);
 260
 261         if (!dai->active) {
 262                 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 263
 264                 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl | MCPDM_WD_EN);
 265                 omap_mcpdm_open_streams(mcpdm);
 266         }
 267         mutex_unlock(&mcpdm->mutex);
 268
 269         snd_soc_dai_set_dma_data(dai, substream,
 270                                  &omap_mcpdm_dai_dma_params[substream->stream]);
 271
 272         return 0;
 273 }
 274
 275 static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
 276                                   struct snd_soc_dai *dai)
 277 {
 278         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 279
 280         mutex_lock(&mcpdm->mutex);
 281
 282         if (!dai->active) {
 283                 if (omap_mcpdm_active(mcpdm)) {
 284                         omap_mcpdm_stop(mcpdm);
 285                         omap_mcpdm_close_streams(mcpdm);
 286                 }
 287         }
 288
 289         mutex_unlock(&mcpdm->mutex);
 290 }
 291
 292 static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
 293                                     struct snd_pcm_hw_params *params,
 294                                     struct snd_soc_dai *dai)
 295 {
 296         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 297         int stream = substream->stream;
 298         struct omap_pcm_dma_data *dma_data;
 299         int channels;
 300         int link_mask = 0;
 301
 302         channels = params_channels(params);
 303         switch (channels) {
 304         case 5:
 305                 if (stream == SNDRV_PCM_STREAM_CAPTURE)
 306                         /* up to 3 channels for capture */
 307                         return -EINVAL;
 308                 link_mask |= 1 << 4;
 309         case 4:
 310                 if (stream == SNDRV_PCM_STREAM_CAPTURE)
 311                         /* up to 3 channels for capture */
 312                         return -EINVAL;
 313                 link_mask |= 1 << 3;
 314         case 3:
 315                 link_mask |= 1 << 2;
 316         case 2:
 317                 link_mask |= 1 << 1;
 318         case 1:
 319                 link_mask |= 1 << 0;
 320                 break;
 321         default:
 322                 /* unsupported number of channels */
 323                 return -EINVAL;
 324         }
 325
 326         dma_data = snd_soc_dai_get_dma_data(dai, substream);
 327
 328         /* Configure McPDM channels, and DMA packet size */
 329         if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
 330                 mcpdm->dn_channels = link_mask << 3;
 331                 dma_data->packet_size =
 332                         (MCPDM_DN_THRES_MAX - mcpdm->dn_threshold) * channels;
 333         } else {
 334                 mcpdm->up_channels = link_mask << 0;
 335                 dma_data->packet_size = mcpdm->up_threshold * channels;
 336         }
 337
 338         return 0;
 339 }
 340
 341 static int omap_mcpdm_prepare(struct snd_pcm_substream *substream,
 342                                   struct snd_soc_dai *dai)
 343 {
 344         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 345
 346         if (!omap_mcpdm_active(mcpdm)) {
 347                 omap_mcpdm_start(mcpdm);
 348                 omap_mcpdm_reg_dump(mcpdm);
 349         }
 350
 351         return 0;
 352 }
 353
 354 static const struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
 355         .startup        = omap_mcpdm_dai_startup,
 356         .shutdown       = omap_mcpdm_dai_shutdown,
 357         .hw_params      = omap_mcpdm_dai_hw_params,
 358         .prepare        = omap_mcpdm_prepare,
 359 };
 360
 361 static int omap_mcpdm_probe(struct snd_soc_dai *dai)
 362 {
 363         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 364         int ret;
 365
 366         pm_runtime_enable(mcpdm->dev);
 367
 368         /* Disable lines while request is ongoing */
 369         pm_runtime_get_sync(mcpdm->dev);
 370         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
 371
 372         ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
 373                                 0, "McPDM", (void *)mcpdm);
 374
 375         pm_runtime_put_sync(mcpdm->dev);
 376
 377         if (ret) {
 378                 dev_err(mcpdm->dev, "Request for IRQ failed\n");
 379                 pm_runtime_disable(mcpdm->dev);
 380         }
 381
 382         /* Configure McPDM threshold values */
 383         mcpdm->dn_threshold = 2;
 384         mcpdm->up_threshold = MCPDM_UP_THRES_MAX - 3;
 385         return ret;
 386 }
 387
 388 static int omap_mcpdm_remove(struct snd_soc_dai *dai)
 389 {
 390         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 391
 392         free_irq(mcpdm->irq, (void *)mcpdm);
 393         pm_runtime_disable(mcpdm->dev);
 394
 395         return 0;
 396 }
 397
 398 #define OMAP_MCPDM_RATES        (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
 399 #define OMAP_MCPDM_FORMATS      SNDRV_PCM_FMTBIT_S32_LE
 400
 401 static struct snd_soc_dai_driver omap_mcpdm_dai = {
 402         .probe = omap_mcpdm_probe,
 403         .remove = omap_mcpdm_remove,
 404         .probe_order = SND_SOC_COMP_ORDER_LATE,
 405         .remove_order = SND_SOC_COMP_ORDER_EARLY,
 406         .playback = {
 407                 .channels_min = 1,
 408                 .channels_max = 5,
 409                 .rates = OMAP_MCPDM_RATES,
 410                 .formats = OMAP_MCPDM_FORMATS,
 411                 .sig_bits = 24,
 412         },
 413         .capture = {
 414                 .channels_min = 1,
 415                 .channels_max = 3,
 416                 .rates = OMAP_MCPDM_RATES,
 417                 .formats = OMAP_MCPDM_FORMATS,
 418                 .sig_bits = 24,
 419         },
 420         .ops = &omap_mcpdm_dai_ops,
 421 };
 422
 423 void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd,
 424                                     u8 rx1, u8 rx2)
 425 {
 426         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
 427
 428         mcpdm->dn_rx_offset = MCPDM_DNOFST_RX1(rx1) | MCPDM_DNOFST_RX2(rx2);
 429 }
 430 EXPORT_SYMBOL_GPL(omap_mcpdm_configure_dn_offsets);
 431
 432 static __devinit int asoc_mcpdm_probe(struct platform_device *pdev)
 433 {
 434         struct omap_mcpdm *mcpdm;
 435         struct resource *res;
 436
 437         mcpdm = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcpdm), GFP_KERNEL);
 438         if (!mcpdm)
 439                 return -ENOMEM;
 440
 441         platform_set_drvdata(pdev, mcpdm);
 442
 443         mutex_init(&mcpdm->mutex);
 444
 445         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
 446         if (res == NULL)
 447                 return -ENOMEM;
 448
 449         omap_mcpdm_dai_dma_params[0].port_addr = res->start + MCPDM_REG_DN_DATA;
 450         omap_mcpdm_dai_dma_params[1].port_addr = res->start + MCPDM_REG_UP_DATA;
 451
 452         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 453         if (res == NULL)
 454                 return -ENOMEM;
 455
 456         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "dn_link");
 457         if (!res)
 458                 return -ENODEV;
 459
 460         omap_mcpdm_dai_dma_params[0].dma_req = res->start;
 461
 462         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "up_link");
 463         if (!res)
 464                 return -ENODEV;
 465
 466         omap_mcpdm_dai_dma_params[1].dma_req = res->start;
 467
 468         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
 469         if (res == NULL)
 470                 return -ENOMEM;
 471
 472         if (!devm_request_mem_region(&pdev->dev, res->start,
 473                                      resource_size(res), "McPDM"))
 474                 return -EBUSY;
 475
 476         mcpdm->io_base = devm_ioremap(&pdev->dev, res->start,
 477                                       resource_size(res));
 478         if (!mcpdm->io_base)
 479                 return -ENOMEM;
 480
 481         mcpdm->irq = platform_get_irq(pdev, 0);
 482         if (mcpdm->irq < 0)
 483                 return mcpdm->irq;
 484
 485         mcpdm->dev = &pdev->dev;
 486
 487         return snd_soc_register_dai(&pdev->dev, &omap_mcpdm_dai);
 488 }
 489
 490 static int __devexit asoc_mcpdm_remove(struct platform_device *pdev)
 491 {
 492         snd_soc_unregister_dai(&pdev->dev);
 493         return 0;
 494 }
 495
 496 static const struct of_device_id omap_mcpdm_of_match[] = {
 497         { .compatible = "ti,omap4-mcpdm", },
 498         { }
 499 };
 500 MODULE_DEVICE_TABLE(of, omap_mcpdm_of_match);
 501
 502 static struct platform_driver asoc_mcpdm_driver = {
 503         .driver = {
 504                 .name   = "omap-mcpdm",
 505                 .owner  = THIS_MODULE,
 506                 .of_match_table = omap_mcpdm_of_match,
 507         },
 508
 509         .probe  = asoc_mcpdm_probe,
 510         .remove = __devexit_p(asoc_mcpdm_remove),
 511 };
 512
 513 module_platform_driver(asoc_mcpdm_driver);
 514
 515 MODULE_ALIAS("platform:omap-mcpdm");
 516 MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
 517 MODULE_DESCRIPTION("OMAP PDM SoC Interface");
 518 MODULE_LICENSE("GPL");