drivers/video/omap2/dss/dss_features.h

   1 /*
   2  * linux/drivers/video/omap2/dss/dss_features.h
   3  *
   4  * Copyright (C) 2010 Texas Instruments
   5  * Author: Archit Taneja <archit@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #ifndef __OMAP2_DSS_FEATURES_H
  21 #define __OMAP2_DSS_FEATURES_H
  22
  23 #if defined(CONFIG_OMAP4_DSS_HDMI)
  24 #include "ti_hdmi.h"
  25 #endif
  26
  27 #define MAX_DSS_MANAGERS        4
  28 #define MAX_DSS_OVERLAYS        4
  29 #define MAX_DSS_LCD_MANAGERS    3
  30 #define MAX_NUM_DSI             2
  31
  32 /* DSS has feature id */
  33 enum dss_feat_id {
  34         FEAT_LCDENABLEPOL,
  35         FEAT_LCDENABLESIGNAL,
  36         FEAT_PCKFREEENABLE,
  37         FEAT_FUNCGATED,
  38         FEAT_MGR_LCD2,
  39         FEAT_MGR_LCD3,
  40         FEAT_LINEBUFFERSPLIT,
  41         FEAT_ROWREPEATENABLE,
  42         FEAT_RESIZECONF,
  43         /* Independent core clk divider */
  44         FEAT_CORE_CLK_DIV,
  45         FEAT_LCD_CLK_SRC,
  46         /* DSI-PLL power command 0x3 is not working */
  47         FEAT_DSI_PLL_PWR_BUG,
  48         FEAT_DSI_PLL_FREQSEL,
  49         FEAT_DSI_DCS_CMD_CONFIG_VC,
  50         FEAT_DSI_VC_OCP_WIDTH,
  51         FEAT_DSI_REVERSE_TXCLKESC,
  52         FEAT_DSI_GNQ,
  53         FEAT_DPI_USES_VDDS_DSI,
  54         FEAT_HDMI_CTS_SWMODE,
  55         FEAT_HDMI_AUDIO_USE_MCLK,
  56         FEAT_HANDLE_UV_SEPARATE,
  57         FEAT_ATTR2,
  58         FEAT_VENC_REQUIRES_TV_DAC_CLK,
  59         FEAT_CPR,
  60         FEAT_PRELOAD,
  61         FEAT_FIR_COEF_V,
  62         FEAT_ALPHA_FIXED_ZORDER,
  63         FEAT_ALPHA_FREE_ZORDER,
  64         FEAT_FIFO_MERGE,
  65         /* An unknown HW bug causing the normal FIFO thresholds not to work */
  66         FEAT_OMAP3_DSI_FIFO_BUG,
  67         FEAT_BURST_2D,
  68         FEAT_DSI_PLL_SELFREQDCO,
  69         FEAT_DSI_PLL_REFSEL,
  70         FEAT_DSI_PHY_DCC,
  71 };
  72
  73 /* DSS register field id */
  74 enum dss_feat_reg_field {
  75         FEAT_REG_FIRHINC,
  76         FEAT_REG_FIRVINC,
  77         FEAT_REG_FIFOHIGHTHRESHOLD,
  78         FEAT_REG_FIFOLOWTHRESHOLD,
  79         FEAT_REG_FIFOSIZE,
  80         FEAT_REG_HORIZONTALACCU,
  81         FEAT_REG_VERTICALACCU,
  82         FEAT_REG_DISPC_CLK_SWITCH,
  83         FEAT_REG_DSIPLL_REGN,
  84         FEAT_REG_DSIPLL_REGM,
  85         FEAT_REG_DSIPLL_REGM_DISPC,
  86         FEAT_REG_DSIPLL_REGM_DSI,
  87 };
  88
  89 enum dss_range_param {
  90         FEAT_PARAM_DSS_FCK,
  91         FEAT_PARAM_DSS_PCD,
  92         FEAT_PARAM_DSIPLL_REGN,
  93         FEAT_PARAM_DSIPLL_REGM,
  94         FEAT_PARAM_DSIPLL_REGM_DISPC,
  95         FEAT_PARAM_DSIPLL_REGM_DSI,
  96         FEAT_PARAM_DSIPLL_FINT,
  97         FEAT_PARAM_DSIPLL_LPDIV,
  98         FEAT_PARAM_DSI_FCK,
  99         FEAT_PARAM_DOWNSCALE,
 100         FEAT_PARAM_LINEWIDTH,
 101         FEAT_PARAM_MGR_WIDTH,
 102         FEAT_PARAM_MGR_HEIGHT,
 103 };
 104
 105 /* DSS Feature Functions */
 106 int dss_feat_get_num_mgrs(void);
 107 int dss_feat_get_num_ovls(void);
 108 int dss_feat_get_num_wbs(void);
 109 unsigned long dss_feat_get_param_min(enum dss_range_param param);
 110 unsigned long dss_feat_get_param_max(enum dss_range_param param);
 111 enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
 112 enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
 113 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
 114 enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane);
 115 bool dss_feat_color_mode_supported(enum omap_plane plane,
 116                 enum omap_color_mode color_mode);
 117 const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id);
 118
 119 u32 dss_feat_get_buffer_size_unit(void);        /* in bytes */
 120 u32 dss_feat_get_burst_size_unit(void);         /* in bytes */
 121
 122 bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type);
 123
 124 bool dss_has_feature(enum dss_feat_id id);
 125 void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
 126 void dss_features_init(enum omapdss_version version);
 127 #if defined(CONFIG_OMAP4_DSS_HDMI)
 128 void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data,
 129                 enum omapdss_version version);
 130 #endif
 131 #endif