4 - compatible: Must be "ti,omap2-timer" for OMAP2+ controllers.
5 - reg: Contains timer register address range (base address and
7 - interrupts: Contains the interrupt information for the timer. The
8 format is being dependent on which interrupt controller
10 - ti,hwmods: Name of the hwmod associated to the timer, "timer<X>",
11 where <X> is the instance number of the timer from the
15 - ti,timer-alwon: Indicates the timer is in an alway-on power domain.
16 - ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in
17 addition to the ARM CPU.
18 - ti,timer-pwm: Indicates the timer can generate a PWM output.
19 - ti,timer-secure: Indicates the timer is reserved on a secure OMAP device
20 and therefore cannot be used by the kernel.
24 timer12: timer@48304000 {
25 compatible = "ti,omap2-timer";
26 reg = <0x48304000 0x400>;