arch/arm/mach-imx/mach-imx6q.c

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/clk.h>
  14 #include <linux/clkdev.h>
  15 #include <linux/cpuidle.h>
  16 #include <linux/delay.h>
  17 #include <linux/export.h>
  18 #include <linux/init.h>
  19 #include <linux/io.h>
  20 #include <linux/irq.h>
  21 #include <linux/of.h>
  22 #include <linux/of_address.h>
  23 #include <linux/of_irq.h>
  24 #include <linux/of_platform.h>
  25 #include <linux/phy.h>
  26 #include <linux/regmap.h>
  27 #include <linux/micrel_phy.h>
  28 #include <linux/mfd/syscon.h>
  29 #include <asm/cpuidle.h>
  30 #include <asm/smp_twd.h>
  31 #include <asm/hardware/cache-l2x0.h>
  32 #include <asm/hardware/gic.h>
  33 #include <asm/mach/arch.h>
  34 #include <asm/mach/time.h>
  35 #include <asm/system_misc.h>
  36 #include <mach/common.h>
  37 #include <mach/cpuidle.h>
  38 #include <mach/hardware.h>
  39
  40
  41 void imx6q_restart(char mode, const char *cmd)
  42 {
  43         struct device_node *np;
  44         void __iomem *wdog_base;
  45
  46         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
  47         wdog_base = of_iomap(np, 0);
  48         if (!wdog_base)
  49                 goto soft;
  50
  51         imx_src_prepare_restart();
  52
  53         /* enable wdog */
  54         writew_relaxed(1 << 2, wdog_base);
  55         /* write twice to ensure the request will not get ignored */
  56         writew_relaxed(1 << 2, wdog_base);
  57
  58         /* wait for reset to assert ... */
  59         mdelay(500);
  60
  61         pr_err("Watchdog reset failed to assert reset\n");
  62
  63         /* delay to allow the serial port to show the message */
  64         mdelay(50);
  65
  66 soft:
  67         /* we'll take a jump through zero as a poor second */
  68         soft_restart(0);
  69 }
  70
  71 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
  72 static int ksz9021rn_phy_fixup(struct phy_device *phydev)
  73 {
  74         if (IS_BUILTIN(CONFIG_PHYLIB)) {
  75                 /* min rx data delay */
  76                 phy_write(phydev, 0x0b, 0x8105);
  77                 phy_write(phydev, 0x0c, 0x0000);
  78
  79                 /* max rx/tx clock delay, min rx/tx control delay */
  80                 phy_write(phydev, 0x0b, 0x8104);
  81                 phy_write(phydev, 0x0c, 0xf0f0);
  82                 phy_write(phydev, 0x0b, 0x104);
  83         }
  84
  85         return 0;
  86 }
  87
  88 static void __init imx6q_sabrelite_cko1_setup(void)
  89 {
  90         struct clk *cko1_sel, *ahb, *cko1;
  91         unsigned long rate;
  92
  93         cko1_sel = clk_get_sys(NULL, "cko1_sel");
  94         ahb = clk_get_sys(NULL, "ahb");
  95         cko1 = clk_get_sys(NULL, "cko1");
  96         if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
  97                 pr_err("cko1 setup failed!\n");
  98                 goto put_clk;
  99         }
 100         clk_set_parent(cko1_sel, ahb);
 101         rate = clk_round_rate(cko1, 16000000);
 102         clk_set_rate(cko1, rate);
 103 put_clk:
 104         if (!IS_ERR(cko1_sel))
 105                 clk_put(cko1_sel);
 106         if (!IS_ERR(ahb))
 107                 clk_put(ahb);
 108         if (!IS_ERR(cko1))
 109                 clk_put(cko1);
 110 }
 111
 112 static void __init imx6q_sabrelite_init(void)
 113 {
 114         if (IS_BUILTIN(CONFIG_PHYLIB))
 115                 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
 116                                 ksz9021rn_phy_fixup);
 117         imx6q_sabrelite_cko1_setup();
 118 }
 119
 120 static void __init imx6q_1588_init(void)
 121 {
 122         struct regmap *gpr;
 123
 124         gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
 125         if (!IS_ERR(gpr))
 126                 regmap_update_bits(gpr, 0x4, 1 << 21, 1 << 21);
 127         else
 128                 pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n");
 129
 130 }
 131 static void __init imx6q_usb_init(void)
 132 {
 133         struct regmap *anatop;
 134
 135 #define HW_ANADIG_USB1_CHRG_DETECT              0x000001b0
 136 #define HW_ANADIG_USB2_CHRG_DETECT              0x00000210
 137
 138 #define BM_ANADIG_USB_CHRG_DETECT_EN_B          0x00100000
 139 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B    0x00080000
 140
 141         anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
 142         if (!IS_ERR(anatop)) {
 143                 /*
 144                  * The external charger detector needs to be disabled,
 145                  * or the signal at DP will be poor
 146                  */
 147                 regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT,
 148                                 BM_ANADIG_USB_CHRG_DETECT_EN_B
 149                                 | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
 150                 regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT,
 151                                 BM_ANADIG_USB_CHRG_DETECT_EN_B |
 152                                 BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
 153         } else {
 154                 pr_warn("failed to find fsl,imx6q-anatop regmap\n");
 155         }
 156 }
 157
 158 static void __init imx6q_init_machine(void)
 159 {
 160         if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
 161                 imx6q_sabrelite_init();
 162
 163         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 164
 165         imx6q_pm_init();
 166         imx6q_usb_init();
 167         imx6q_1588_init();
 168 }
 169
 170 static struct cpuidle_driver imx6q_cpuidle_driver = {
 171         .name                   = "imx6q_cpuidle",
 172         .owner                  = THIS_MODULE,
 173         .en_core_tk_irqen       = 1,
 174         .states[0]              = ARM_CPUIDLE_WFI_STATE,
 175         .state_count            = 1,
 176 };
 177
 178 static void __init imx6q_init_late(void)
 179 {
 180         imx_cpuidle_init(&imx6q_cpuidle_driver);
 181 }
 182
 183 static void __init imx6q_map_io(void)
 184 {
 185         imx_lluart_map_io();
 186         imx_scu_map_io();
 187         imx6q_clock_map_io();
 188 }
 189
 190 static const struct of_device_id imx6q_irq_match[] __initconst = {
 191         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
 192         { /* sentinel */ }
 193 };
 194
 195 static void __init imx6q_init_irq(void)
 196 {
 197         l2x0_of_init(0, ~0UL);
 198         imx_src_init();
 199         imx_gpc_init();
 200         of_irq_init(imx6q_irq_match);
 201 }
 202
 203 static void __init imx6q_timer_init(void)
 204 {
 205         mx6q_clocks_init();
 206         twd_local_timer_of_register();
 207 }
 208
 209 static struct sys_timer imx6q_timer = {
 210         .init = imx6q_timer_init,
 211 };
 212
 213 static const char *imx6q_dt_compat[] __initdata = {
 214         "fsl,imx6q",
 215         NULL,
 216 };
 217
 218 DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
 219         .smp            = smp_ops(imx_smp_ops),
 220         .map_io         = imx6q_map_io,
 221         .init_irq       = imx6q_init_irq,
 222         .handle_irq     = imx6q_handle_irq,
 223         .timer          = &imx6q_timer,
 224         .init_machine   = imx6q_init_machine,
 225         .init_late      = imx6q_init_late,
 226         .dt_compat      = imx6q_dt_compat,
 227         .restart        = imx6q_restart,
 228 MACHINE_END