drivers/video/omap2/dss/dss_features.c

   1 /*
   2  * linux/drivers/video/omap2/dss/dss_features.c
   3  *
   4  * Copyright (C) 2010 Texas Instruments
   5  * Author: Archit Taneja <archit@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/kernel.h>
  21 #include <linux/types.h>
  22 #include <linux/err.h>
  23 #include <linux/slab.h>
  24
  25 #include <video/omapdss.h>
  26
  27 #include "dss.h"
  28 #include "dss_features.h"
  29
  30 /* Defines a generic omap register field */
  31 struct dss_reg_field {
  32         u8 start, end;
  33 };
  34
  35 struct dss_param_range {
  36         int min, max;
  37 };
  38
  39 struct omap_dss_features {
  40         const struct dss_reg_field *reg_fields;
  41         const int num_reg_fields;
  42
  43         const enum dss_feat_id *features;
  44         const int num_features;
  45
  46         const int num_mgrs;
  47         const int num_ovls;
  48         const int num_wbs;
  49         const enum omap_display_type *supported_displays;
  50         const enum omap_dss_output_id *supported_outputs;
  51         const enum omap_color_mode *supported_color_modes;
  52         const enum omap_overlay_caps *overlay_caps;
  53         const char * const *clksrc_names;
  54         const struct dss_param_range *dss_params;
  55
  56         const enum omap_dss_rotation_type supported_rotation_types;
  57
  58         const u32 buffer_size_unit;
  59         const u32 burst_size_unit;
  60 };
  61
  62 /* This struct is assigned to one of the below during initialization */
  63 static const struct omap_dss_features *omap_current_dss_features;
  64
  65 static const struct dss_reg_field omap2_dss_reg_fields[] = {
  66         [FEAT_REG_FIRHINC]                      = { 11, 0 },
  67         [FEAT_REG_FIRVINC]                      = { 27, 16 },
  68         [FEAT_REG_FIFOLOWTHRESHOLD]             = { 8, 0 },
  69         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 24, 16 },
  70         [FEAT_REG_FIFOSIZE]                     = { 8, 0 },
  71         [FEAT_REG_HORIZONTALACCU]               = { 9, 0 },
  72         [FEAT_REG_VERTICALACCU]                 = { 25, 16 },
  73         [FEAT_REG_DISPC_CLK_SWITCH]             = { 0, 0 },
  74         [FEAT_REG_DSIPLL_REGN]                  = { 0, 0 },
  75         [FEAT_REG_DSIPLL_REGM]                  = { 0, 0 },
  76         [FEAT_REG_DSIPLL_REGM_DISPC]            = { 0, 0 },
  77         [FEAT_REG_DSIPLL_REGM_DSI]              = { 0, 0 },
  78 };
  79
  80 static const struct dss_reg_field omap3_dss_reg_fields[] = {
  81         [FEAT_REG_FIRHINC]                      = { 12, 0 },
  82         [FEAT_REG_FIRVINC]                      = { 28, 16 },
  83         [FEAT_REG_FIFOLOWTHRESHOLD]             = { 11, 0 },
  84         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 27, 16 },
  85         [FEAT_REG_FIFOSIZE]                     = { 10, 0 },
  86         [FEAT_REG_HORIZONTALACCU]               = { 9, 0 },
  87         [FEAT_REG_VERTICALACCU]                 = { 25, 16 },
  88         [FEAT_REG_DISPC_CLK_SWITCH]             = { 0, 0 },
  89         [FEAT_REG_DSIPLL_REGN]                  = { 7, 1 },
  90         [FEAT_REG_DSIPLL_REGM]                  = { 18, 8 },
  91         [FEAT_REG_DSIPLL_REGM_DISPC]            = { 22, 19 },
  92         [FEAT_REG_DSIPLL_REGM_DSI]              = { 26, 23 },
  93 };
  94
  95 static const struct dss_reg_field omap4_dss_reg_fields[] = {
  96         [FEAT_REG_FIRHINC]                      = { 12, 0 },
  97         [FEAT_REG_FIRVINC]                      = { 28, 16 },
  98         [FEAT_REG_FIFOLOWTHRESHOLD]             = { 15, 0 },
  99         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 31, 16 },
 100         [FEAT_REG_FIFOSIZE]                     = { 15, 0 },
 101         [FEAT_REG_HORIZONTALACCU]               = { 10, 0 },
 102         [FEAT_REG_VERTICALACCU]                 = { 26, 16 },
 103         [FEAT_REG_DISPC_CLK_SWITCH]             = { 9, 8 },
 104         [FEAT_REG_DSIPLL_REGN]                  = { 8, 1 },
 105         [FEAT_REG_DSIPLL_REGM]                  = { 20, 9 },
 106         [FEAT_REG_DSIPLL_REGM_DISPC]            = { 25, 21 },
 107         [FEAT_REG_DSIPLL_REGM_DSI]              = { 30, 26 },
 108 };
 109
 110 static const struct dss_reg_field omap5_dss_reg_fields[] = {
 111         [FEAT_REG_FIRHINC]                      = { 12, 0 },
 112         [FEAT_REG_FIRVINC]                      = { 28, 16 },
 113         [FEAT_REG_FIFOLOWTHRESHOLD]             = { 15, 0 },
 114         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 31, 16 },
 115         [FEAT_REG_FIFOSIZE]                     = { 15, 0 },
 116         [FEAT_REG_HORIZONTALACCU]               = { 10, 0 },
 117         [FEAT_REG_VERTICALACCU]                 = { 26, 16 },
 118         [FEAT_REG_DISPC_CLK_SWITCH]             = { 9, 7 },
 119         [FEAT_REG_DSIPLL_REGN]                  = { 8, 1 },
 120         [FEAT_REG_DSIPLL_REGM]                  = { 20, 9 },
 121         [FEAT_REG_DSIPLL_REGM_DISPC]            = { 25, 21 },
 122         [FEAT_REG_DSIPLL_REGM_DSI]              = { 30, 26 },
 123 };
 124
 125 static const enum omap_display_type omap2_dss_supported_displays[] = {
 126         /* OMAP_DSS_CHANNEL_LCD */
 127         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
 128
 129         /* OMAP_DSS_CHANNEL_DIGIT */
 130         OMAP_DISPLAY_TYPE_VENC,
 131 };
 132
 133 static const enum omap_display_type omap3430_dss_supported_displays[] = {
 134         /* OMAP_DSS_CHANNEL_LCD */
 135         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
 136         OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
 137
 138         /* OMAP_DSS_CHANNEL_DIGIT */
 139         OMAP_DISPLAY_TYPE_VENC,
 140 };
 141
 142 static const enum omap_display_type omap3630_dss_supported_displays[] = {
 143         /* OMAP_DSS_CHANNEL_LCD */
 144         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
 145         OMAP_DISPLAY_TYPE_DSI,
 146
 147         /* OMAP_DSS_CHANNEL_DIGIT */
 148         OMAP_DISPLAY_TYPE_VENC,
 149 };
 150
 151 static const enum omap_display_type omap4_dss_supported_displays[] = {
 152         /* OMAP_DSS_CHANNEL_LCD */
 153         OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI,
 154
 155         /* OMAP_DSS_CHANNEL_DIGIT */
 156         OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI,
 157
 158         /* OMAP_DSS_CHANNEL_LCD2 */
 159         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
 160         OMAP_DISPLAY_TYPE_DSI,
 161 };
 162
 163 static const enum omap_display_type omap5_dss_supported_displays[] = {
 164         /* OMAP_DSS_CHANNEL_LCD */
 165         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
 166         OMAP_DISPLAY_TYPE_DSI,
 167
 168         /* OMAP_DSS_CHANNEL_DIGIT */
 169         OMAP_DISPLAY_TYPE_HDMI | OMAP_DISPLAY_TYPE_DPI,
 170
 171         /* OMAP_DSS_CHANNEL_LCD2 */
 172         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
 173         OMAP_DISPLAY_TYPE_DSI,
 174 };
 175
 176 static const enum omap_dss_output_id omap2_dss_supported_outputs[] = {
 177         /* OMAP_DSS_CHANNEL_LCD */
 178         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI,
 179
 180         /* OMAP_DSS_CHANNEL_DIGIT */
 181         OMAP_DSS_OUTPUT_VENC,
 182 };
 183
 184 static const enum omap_dss_output_id omap3430_dss_supported_outputs[] = {
 185         /* OMAP_DSS_CHANNEL_LCD */
 186         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
 187         OMAP_DSS_OUTPUT_SDI | OMAP_DSS_OUTPUT_DSI1,
 188
 189         /* OMAP_DSS_CHANNEL_DIGIT */
 190         OMAP_DSS_OUTPUT_VENC,
 191 };
 192
 193 static const enum omap_dss_output_id omap3630_dss_supported_outputs[] = {
 194         /* OMAP_DSS_CHANNEL_LCD */
 195         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
 196         OMAP_DSS_OUTPUT_DSI1,
 197
 198         /* OMAP_DSS_CHANNEL_DIGIT */
 199         OMAP_DSS_OUTPUT_VENC,
 200 };
 201
 202 static const enum omap_dss_output_id omap4_dss_supported_outputs[] = {
 203         /* OMAP_DSS_CHANNEL_LCD */
 204         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
 205         OMAP_DSS_OUTPUT_DSI1,
 206
 207         /* OMAP_DSS_CHANNEL_DIGIT */
 208         OMAP_DSS_OUTPUT_VENC | OMAP_DSS_OUTPUT_HDMI |
 209         OMAP_DSS_OUTPUT_DPI,
 210
 211         /* OMAP_DSS_CHANNEL_LCD2 */
 212         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
 213         OMAP_DSS_OUTPUT_DSI2,
 214 };
 215
 216 static const enum omap_dss_output_id omap5_dss_supported_outputs[] = {
 217         /* OMAP_DSS_CHANNEL_LCD */
 218         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
 219         OMAP_DSS_OUTPUT_DSI1 | OMAP_DSS_OUTPUT_DSI2,
 220
 221         /* OMAP_DSS_CHANNEL_DIGIT */
 222         OMAP_DSS_OUTPUT_HDMI | OMAP_DSS_OUTPUT_DPI,
 223
 224         /* OMAP_DSS_CHANNEL_LCD2 */
 225         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
 226         OMAP_DSS_OUTPUT_DSI1,
 227
 228         /* OMAP_DSS_CHANNEL_LCD3 */
 229         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
 230         OMAP_DSS_OUTPUT_DSI2,
 231 };
 232
 233 static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
 234         /* OMAP_DSS_GFX */
 235         OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
 236         OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
 237         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
 238         OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
 239
 240         /* OMAP_DSS_VIDEO1 */
 241         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
 242         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
 243         OMAP_DSS_COLOR_UYVY,
 244
 245         /* OMAP_DSS_VIDEO2 */
 246         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
 247         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
 248         OMAP_DSS_COLOR_UYVY,
 249 };
 250
 251 static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
 252         /* OMAP_DSS_GFX */
 253         OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
 254         OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
 255         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
 256         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
 257         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
 258         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
 259
 260         /* OMAP_DSS_VIDEO1 */
 261         OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
 262         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
 263         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
 264
 265         /* OMAP_DSS_VIDEO2 */
 266         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
 267         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
 268         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
 269         OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
 270         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
 271 };
 272
 273 static const enum omap_color_mode omap4_dss_supported_color_modes[] = {
 274         /* OMAP_DSS_GFX */
 275         OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
 276         OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
 277         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
 278         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
 279         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
 280         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
 281         OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 |
 282         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555,
 283
 284         /* OMAP_DSS_VIDEO1 */
 285         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
 286         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
 287         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
 288         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
 289         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
 290         OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
 291         OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
 292         OMAP_DSS_COLOR_RGBX32,
 293
 294        /* OMAP_DSS_VIDEO2 */
 295         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
 296         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
 297         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
 298         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
 299         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
 300         OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
 301         OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
 302         OMAP_DSS_COLOR_RGBX32,
 303
 304         /* OMAP_DSS_VIDEO3 */
 305         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
 306         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
 307         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
 308         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
 309         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
 310         OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
 311         OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
 312         OMAP_DSS_COLOR_RGBX32,
 313
 314         /* OMAP_DSS_WB */
 315         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
 316         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
 317         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
 318         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
 319         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
 320         OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
 321         OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
 322         OMAP_DSS_COLOR_RGBX32,
 323 };
 324
 325 static const enum omap_overlay_caps omap2_dss_overlay_caps[] = {
 326         /* OMAP_DSS_GFX */
 327         OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
 328
 329         /* OMAP_DSS_VIDEO1 */
 330         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
 331                 OMAP_DSS_OVL_CAP_REPLICATION,
 332
 333         /* OMAP_DSS_VIDEO2 */
 334         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
 335                 OMAP_DSS_OVL_CAP_REPLICATION,
 336 };
 337
 338 static const enum omap_overlay_caps omap3430_dss_overlay_caps[] = {
 339         /* OMAP_DSS_GFX */
 340         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_POS |
 341                 OMAP_DSS_OVL_CAP_REPLICATION,
 342
 343         /* OMAP_DSS_VIDEO1 */
 344         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
 345                 OMAP_DSS_OVL_CAP_REPLICATION,
 346
 347         /* OMAP_DSS_VIDEO2 */
 348         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
 349                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
 350 };
 351
 352 static const enum omap_overlay_caps omap3630_dss_overlay_caps[] = {
 353         /* OMAP_DSS_GFX */
 354         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
 355                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
 356
 357         /* OMAP_DSS_VIDEO1 */
 358         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
 359                 OMAP_DSS_OVL_CAP_REPLICATION,
 360
 361         /* OMAP_DSS_VIDEO2 */
 362         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
 363                 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_POS |
 364                 OMAP_DSS_OVL_CAP_REPLICATION,
 365 };
 366
 367 static const enum omap_overlay_caps omap4_dss_overlay_caps[] = {
 368         /* OMAP_DSS_GFX */
 369         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
 370                 OMAP_DSS_OVL_CAP_ZORDER | OMAP_DSS_OVL_CAP_POS |
 371                 OMAP_DSS_OVL_CAP_REPLICATION,
 372
 373         /* OMAP_DSS_VIDEO1 */
 374         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
 375                 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
 376                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
 377
 378         /* OMAP_DSS_VIDEO2 */
 379         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
 380                 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
 381                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
 382
 383         /* OMAP_DSS_VIDEO3 */
 384         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
 385                 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
 386                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
 387 };
 388
 389 static const char * const omap2_dss_clk_source_names[] = {
 390         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]  = "N/A",
 391         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]    = "N/A",
 392         [OMAP_DSS_CLK_SRC_FCK]                  = "DSS_FCLK1",
 393 };
 394
 395 static const char * const omap3_dss_clk_source_names[] = {
 396         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]  = "DSI1_PLL_FCLK",
 397         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]    = "DSI2_PLL_FCLK",
 398         [OMAP_DSS_CLK_SRC_FCK]                  = "DSS1_ALWON_FCLK",
 399 };
 400
 401 static const char * const omap4_dss_clk_source_names[] = {
 402         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]  = "PLL1_CLK1",
 403         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]    = "PLL1_CLK2",
 404         [OMAP_DSS_CLK_SRC_FCK]                  = "DSS_FCLK",
 405         [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1",
 406         [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI]   = "PLL2_CLK2",
 407 };
 408
 409 static const char * const omap5_dss_clk_source_names[] = {
 410         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]  = "DPLL_DSI1_A_CLK1",
 411         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]    = "DPLL_DSI1_A_CLK2",
 412         [OMAP_DSS_CLK_SRC_FCK]                  = "DSS_CLK",
 413         [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "DPLL_DSI1_C_CLK1",
 414         [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI]   = "DPLL_DSI1_C_CLK2",
 415 };
 416
 417 static const struct dss_param_range omap2_dss_param_range[] = {
 418         [FEAT_PARAM_DSS_FCK]                    = { 0, 173000000 },
 419         [FEAT_PARAM_DSS_PCD]                    = { 2, 255 },
 420         [FEAT_PARAM_DSIPLL_REGN]                = { 0, 0 },
 421         [FEAT_PARAM_DSIPLL_REGM]                = { 0, 0 },
 422         [FEAT_PARAM_DSIPLL_REGM_DISPC]          = { 0, 0 },
 423         [FEAT_PARAM_DSIPLL_REGM_DSI]            = { 0, 0 },
 424         [FEAT_PARAM_DSIPLL_FINT]                = { 0, 0 },
 425         [FEAT_PARAM_DSIPLL_LPDIV]               = { 0, 0 },
 426         [FEAT_PARAM_DOWNSCALE]                  = { 1, 2 },
 427         /*
 428          * Assuming the line width buffer to be 768 pixels as OMAP2 DISPC
 429          * scaler cannot scale a image with width more than 768.
 430          */
 431         [FEAT_PARAM_LINEWIDTH]                  = { 1, 768 },
 432         [FEAT_PARAM_MGR_WIDTH]                  = { 1, 2048 },
 433         [FEAT_PARAM_MGR_HEIGHT]                 = { 1, 2048 },
 434 };
 435
 436 static const struct dss_param_range omap3_dss_param_range[] = {
 437         [FEAT_PARAM_DSS_FCK]                    = { 0, 173000000 },
 438         [FEAT_PARAM_DSS_PCD]                    = { 1, 255 },
 439         [FEAT_PARAM_DSIPLL_REGN]                = { 0, (1 << 7) - 1 },
 440         [FEAT_PARAM_DSIPLL_REGM]                = { 0, (1 << 11) - 1 },
 441         [FEAT_PARAM_DSIPLL_REGM_DISPC]          = { 0, (1 << 4) - 1 },
 442         [FEAT_PARAM_DSIPLL_REGM_DSI]            = { 0, (1 << 4) - 1 },
 443         [FEAT_PARAM_DSIPLL_FINT]                = { 750000, 2100000 },
 444         [FEAT_PARAM_DSIPLL_LPDIV]               = { 1, (1 << 13) - 1},
 445         [FEAT_PARAM_DSI_FCK]                    = { 0, 173000000 },
 446         [FEAT_PARAM_DOWNSCALE]                  = { 1, 4 },
 447         [FEAT_PARAM_LINEWIDTH]                  = { 1, 1024 },
 448         [FEAT_PARAM_MGR_WIDTH]                  = { 1, 2048 },
 449         [FEAT_PARAM_MGR_HEIGHT]                 = { 1, 2048 },
 450 };
 451
 452 static const struct dss_param_range omap4_dss_param_range[] = {
 453         [FEAT_PARAM_DSS_FCK]                    = { 0, 186000000 },
 454         [FEAT_PARAM_DSS_PCD]                    = { 1, 255 },
 455         [FEAT_PARAM_DSIPLL_REGN]                = { 0, (1 << 8) - 1 },
 456         [FEAT_PARAM_DSIPLL_REGM]                = { 0, (1 << 12) - 1 },
 457         [FEAT_PARAM_DSIPLL_REGM_DISPC]          = { 0, (1 << 5) - 1 },
 458         [FEAT_PARAM_DSIPLL_REGM_DSI]            = { 0, (1 << 5) - 1 },
 459         [FEAT_PARAM_DSIPLL_FINT]                = { 500000, 2500000 },
 460         [FEAT_PARAM_DSIPLL_LPDIV]               = { 0, (1 << 13) - 1 },
 461         [FEAT_PARAM_DSI_FCK]                    = { 0, 170000000 },
 462         [FEAT_PARAM_DOWNSCALE]                  = { 1, 4 },
 463         [FEAT_PARAM_LINEWIDTH]                  = { 1, 2048 },
 464         [FEAT_PARAM_MGR_WIDTH]                  = { 1, 2048 },
 465         [FEAT_PARAM_MGR_HEIGHT]                 = { 1, 2048 },
 466 };
 467
 468 static const struct dss_param_range omap5_dss_param_range[] = {
 469         [FEAT_PARAM_DSS_FCK]                    = { 0, 200000000 },
 470         [FEAT_PARAM_DSS_PCD]                    = { 1, 255 },
 471         [FEAT_PARAM_DSIPLL_REGN]                = { 0, (1 << 8) - 1 },
 472         [FEAT_PARAM_DSIPLL_REGM]                = { 0, (1 << 12) - 1 },
 473         [FEAT_PARAM_DSIPLL_REGM_DISPC]          = { 0, (1 << 5) - 1 },
 474         [FEAT_PARAM_DSIPLL_REGM_DSI]            = { 0, (1 << 5) - 1 },
 475         [FEAT_PARAM_DSIPLL_FINT]                = { 500000, 2500000 },
 476         [FEAT_PARAM_DSIPLL_LPDIV]               = { 0, (1 << 13) - 1 },
 477         [FEAT_PARAM_DSI_FCK]                    = { 0, 170000000 },
 478         [FEAT_PARAM_DOWNSCALE]                  = { 1, 4 },
 479         [FEAT_PARAM_LINEWIDTH]                  = { 1, 2048 },
 480         [FEAT_PARAM_MGR_WIDTH]                  = { 1, 2048 },
 481         [FEAT_PARAM_MGR_HEIGHT]                 = { 1, 2048 },
 482 };
 483
 484 static const enum dss_feat_id omap2_dss_feat_list[] = {
 485         FEAT_LCDENABLEPOL,
 486         FEAT_LCDENABLESIGNAL,
 487         FEAT_PCKFREEENABLE,
 488         FEAT_FUNCGATED,
 489         FEAT_ROWREPEATENABLE,
 490         FEAT_RESIZECONF,
 491 };
 492
 493 static const enum dss_feat_id omap3430_dss_feat_list[] = {
 494         FEAT_LCDENABLEPOL,
 495         FEAT_LCDENABLESIGNAL,
 496         FEAT_PCKFREEENABLE,
 497         FEAT_FUNCGATED,
 498         FEAT_LINEBUFFERSPLIT,
 499         FEAT_ROWREPEATENABLE,
 500         FEAT_RESIZECONF,
 501         FEAT_DSI_PLL_FREQSEL,
 502         FEAT_DSI_REVERSE_TXCLKESC,
 503         FEAT_VENC_REQUIRES_TV_DAC_CLK,
 504         FEAT_CPR,
 505         FEAT_PRELOAD,
 506         FEAT_FIR_COEF_V,
 507         FEAT_ALPHA_FIXED_ZORDER,
 508         FEAT_FIFO_MERGE,
 509         FEAT_OMAP3_DSI_FIFO_BUG,
 510         FEAT_DPI_USES_VDDS_DSI,
 511 };
 512
 513 static const enum dss_feat_id am35xx_dss_feat_list[] = {
 514         FEAT_LCDENABLEPOL,
 515         FEAT_LCDENABLESIGNAL,
 516         FEAT_PCKFREEENABLE,
 517         FEAT_FUNCGATED,
 518         FEAT_LINEBUFFERSPLIT,
 519         FEAT_ROWREPEATENABLE,
 520         FEAT_RESIZECONF,
 521         FEAT_DSI_PLL_FREQSEL,
 522         FEAT_DSI_REVERSE_TXCLKESC,
 523         FEAT_VENC_REQUIRES_TV_DAC_CLK,
 524         FEAT_CPR,
 525         FEAT_PRELOAD,
 526         FEAT_FIR_COEF_V,
 527         FEAT_ALPHA_FIXED_ZORDER,
 528         FEAT_FIFO_MERGE,
 529         FEAT_OMAP3_DSI_FIFO_BUG,
 530 };
 531
 532 static const enum dss_feat_id omap3630_dss_feat_list[] = {
 533         FEAT_LCDENABLEPOL,
 534         FEAT_LCDENABLESIGNAL,
 535         FEAT_PCKFREEENABLE,
 536         FEAT_FUNCGATED,
 537         FEAT_LINEBUFFERSPLIT,
 538         FEAT_ROWREPEATENABLE,
 539         FEAT_RESIZECONF,
 540         FEAT_DSI_PLL_PWR_BUG,
 541         FEAT_DSI_PLL_FREQSEL,
 542         FEAT_CPR,
 543         FEAT_PRELOAD,
 544         FEAT_FIR_COEF_V,
 545         FEAT_ALPHA_FIXED_ZORDER,
 546         FEAT_FIFO_MERGE,
 547         FEAT_OMAP3_DSI_FIFO_BUG,
 548 };
 549
 550 static const enum dss_feat_id omap4430_es1_0_dss_feat_list[] = {
 551         FEAT_MGR_LCD2,
 552         FEAT_CORE_CLK_DIV,
 553         FEAT_LCD_CLK_SRC,
 554         FEAT_DSI_DCS_CMD_CONFIG_VC,
 555         FEAT_DSI_VC_OCP_WIDTH,
 556         FEAT_DSI_GNQ,
 557         FEAT_HANDLE_UV_SEPARATE,
 558         FEAT_ATTR2,
 559         FEAT_CPR,
 560         FEAT_PRELOAD,
 561         FEAT_FIR_COEF_V,
 562         FEAT_ALPHA_FREE_ZORDER,
 563         FEAT_FIFO_MERGE,
 564         FEAT_BURST_2D,
 565 };
 566
 567 static const enum dss_feat_id omap4430_es2_0_1_2_dss_feat_list[] = {
 568         FEAT_MGR_LCD2,
 569         FEAT_CORE_CLK_DIV,
 570         FEAT_LCD_CLK_SRC,
 571         FEAT_DSI_DCS_CMD_CONFIG_VC,
 572         FEAT_DSI_VC_OCP_WIDTH,
 573         FEAT_DSI_GNQ,
 574         FEAT_HDMI_CTS_SWMODE,
 575         FEAT_HANDLE_UV_SEPARATE,
 576         FEAT_ATTR2,
 577         FEAT_CPR,
 578         FEAT_PRELOAD,
 579         FEAT_FIR_COEF_V,
 580         FEAT_ALPHA_FREE_ZORDER,
 581         FEAT_FIFO_MERGE,
 582         FEAT_BURST_2D,
 583 };
 584
 585 static const enum dss_feat_id omap4_dss_feat_list[] = {
 586         FEAT_MGR_LCD2,
 587         FEAT_CORE_CLK_DIV,
 588         FEAT_LCD_CLK_SRC,
 589         FEAT_DSI_DCS_CMD_CONFIG_VC,
 590         FEAT_DSI_VC_OCP_WIDTH,
 591         FEAT_DSI_GNQ,
 592         FEAT_HDMI_CTS_SWMODE,
 593         FEAT_HDMI_AUDIO_USE_MCLK,
 594         FEAT_HANDLE_UV_SEPARATE,
 595         FEAT_ATTR2,
 596         FEAT_CPR,
 597         FEAT_PRELOAD,
 598         FEAT_FIR_COEF_V,
 599         FEAT_ALPHA_FREE_ZORDER,
 600         FEAT_FIFO_MERGE,
 601         FEAT_BURST_2D,
 602 };
 603
 604 static const enum dss_feat_id omap5_dss_feat_list[] = {
 605         FEAT_MGR_LCD2,
 606         FEAT_CORE_CLK_DIV,
 607         FEAT_LCD_CLK_SRC,
 608         FEAT_DSI_DCS_CMD_CONFIG_VC,
 609         FEAT_DSI_VC_OCP_WIDTH,
 610         FEAT_DSI_GNQ,
 611         FEAT_HDMI_CTS_SWMODE,
 612         FEAT_HDMI_AUDIO_USE_MCLK,
 613         FEAT_HANDLE_UV_SEPARATE,
 614         FEAT_ATTR2,
 615         FEAT_CPR,
 616         FEAT_PRELOAD,
 617         FEAT_FIR_COEF_V,
 618         FEAT_ALPHA_FREE_ZORDER,
 619         FEAT_FIFO_MERGE,
 620         FEAT_BURST_2D,
 621         FEAT_DSI_PLL_SELFREQDCO,
 622         FEAT_DSI_PLL_REFSEL,
 623         FEAT_DSI_PHY_DCC,
 624 };
 625
 626 /* OMAP2 DSS Features */
 627 static const struct omap_dss_features omap2_dss_features = {
 628         .reg_fields = omap2_dss_reg_fields,
 629         .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
 630
 631         .features = omap2_dss_feat_list,
 632         .num_features = ARRAY_SIZE(omap2_dss_feat_list),
 633
 634         .num_mgrs = 2,
 635         .num_ovls = 3,
 636         .supported_displays = omap2_dss_supported_displays,
 637         .supported_outputs = omap2_dss_supported_outputs,
 638         .supported_color_modes = omap2_dss_supported_color_modes,
 639         .overlay_caps = omap2_dss_overlay_caps,
 640         .clksrc_names = omap2_dss_clk_source_names,
 641         .dss_params = omap2_dss_param_range,
 642         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
 643         .buffer_size_unit = 1,
 644         .burst_size_unit = 8,
 645 };
 646
 647 /* OMAP3 DSS Features */
 648 static const struct omap_dss_features omap3430_dss_features = {
 649         .reg_fields = omap3_dss_reg_fields,
 650         .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
 651
 652         .features = omap3430_dss_feat_list,
 653         .num_features = ARRAY_SIZE(omap3430_dss_feat_list),
 654
 655         .num_mgrs = 2,
 656         .num_ovls = 3,
 657         .supported_displays = omap3430_dss_supported_displays,
 658         .supported_outputs = omap3430_dss_supported_outputs,
 659         .supported_color_modes = omap3_dss_supported_color_modes,
 660         .overlay_caps = omap3430_dss_overlay_caps,
 661         .clksrc_names = omap3_dss_clk_source_names,
 662         .dss_params = omap3_dss_param_range,
 663         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
 664         .buffer_size_unit = 1,
 665         .burst_size_unit = 8,
 666 };
 667
 668 /*
 669  * AM35xx DSS Features. This is basically OMAP3 DSS Features without the
 670  * vdds_dsi regulator.
 671  */
 672 static const struct omap_dss_features am35xx_dss_features = {
 673         .reg_fields = omap3_dss_reg_fields,
 674         .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
 675
 676         .features = am35xx_dss_feat_list,
 677         .num_features = ARRAY_SIZE(am35xx_dss_feat_list),
 678
 679         .num_mgrs = 2,
 680         .num_ovls = 3,
 681         .supported_displays = omap3430_dss_supported_displays,
 682         .supported_outputs = omap3430_dss_supported_outputs,
 683         .supported_color_modes = omap3_dss_supported_color_modes,
 684         .overlay_caps = omap3430_dss_overlay_caps,
 685         .clksrc_names = omap3_dss_clk_source_names,
 686         .dss_params = omap3_dss_param_range,
 687         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
 688         .buffer_size_unit = 1,
 689         .burst_size_unit = 8,
 690 };
 691
 692 static const struct omap_dss_features omap3630_dss_features = {
 693         .reg_fields = omap3_dss_reg_fields,
 694         .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
 695
 696         .features = omap3630_dss_feat_list,
 697         .num_features = ARRAY_SIZE(omap3630_dss_feat_list),
 698
 699         .num_mgrs = 2,
 700         .num_ovls = 3,
 701         .supported_displays = omap3630_dss_supported_displays,
 702         .supported_outputs = omap3630_dss_supported_outputs,
 703         .supported_color_modes = omap3_dss_supported_color_modes,
 704         .overlay_caps = omap3630_dss_overlay_caps,
 705         .clksrc_names = omap3_dss_clk_source_names,
 706         .dss_params = omap3_dss_param_range,
 707         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
 708         .buffer_size_unit = 1,
 709         .burst_size_unit = 8,
 710 };
 711
 712 /* OMAP4 DSS Features */
 713 /* For OMAP4430 ES 1.0 revision */
 714 static const struct omap_dss_features omap4430_es1_0_dss_features  = {
 715         .reg_fields = omap4_dss_reg_fields,
 716         .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
 717
 718         .features = omap4430_es1_0_dss_feat_list,
 719         .num_features = ARRAY_SIZE(omap4430_es1_0_dss_feat_list),
 720
 721         .num_mgrs = 3,
 722         .num_ovls = 4,
 723         .num_wbs = 1,
 724         .supported_displays = omap4_dss_supported_displays,
 725         .supported_outputs = omap4_dss_supported_outputs,
 726         .supported_color_modes = omap4_dss_supported_color_modes,
 727         .overlay_caps = omap4_dss_overlay_caps,
 728         .clksrc_names = omap4_dss_clk_source_names,
 729         .dss_params = omap4_dss_param_range,
 730         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
 731         .buffer_size_unit = 16,
 732         .burst_size_unit = 16,
 733 };
 734
 735 /* For OMAP4430 ES 2.0, 2.1 and 2.2 revisions */
 736 static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = {
 737         .reg_fields = omap4_dss_reg_fields,
 738         .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
 739
 740         .features = omap4430_es2_0_1_2_dss_feat_list,
 741         .num_features = ARRAY_SIZE(omap4430_es2_0_1_2_dss_feat_list),
 742
 743         .num_mgrs = 3,
 744         .num_ovls = 4,
 745         .num_wbs = 1,
 746         .supported_displays = omap4_dss_supported_displays,
 747         .supported_outputs = omap4_dss_supported_outputs,
 748         .supported_color_modes = omap4_dss_supported_color_modes,
 749         .overlay_caps = omap4_dss_overlay_caps,
 750         .clksrc_names = omap4_dss_clk_source_names,
 751         .dss_params = omap4_dss_param_range,
 752         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
 753         .buffer_size_unit = 16,
 754         .burst_size_unit = 16,
 755 };
 756
 757 /* For all the other OMAP4 versions */
 758 static const struct omap_dss_features omap4_dss_features = {
 759         .reg_fields = omap4_dss_reg_fields,
 760         .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
 761
 762         .features = omap4_dss_feat_list,
 763         .num_features = ARRAY_SIZE(omap4_dss_feat_list),
 764
 765         .num_mgrs = 3,
 766         .num_ovls = 4,
 767         .num_wbs = 1,
 768         .supported_displays = omap4_dss_supported_displays,
 769         .supported_outputs = omap4_dss_supported_outputs,
 770         .supported_color_modes = omap4_dss_supported_color_modes,
 771         .overlay_caps = omap4_dss_overlay_caps,
 772         .clksrc_names = omap4_dss_clk_source_names,
 773         .dss_params = omap4_dss_param_range,
 774         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
 775         .buffer_size_unit = 16,
 776         .burst_size_unit = 16,
 777 };
 778
 779 /* OMAP5 DSS Features */
 780 static const struct omap_dss_features omap5_dss_features = {
 781         .reg_fields = omap5_dss_reg_fields,
 782         .num_reg_fields = ARRAY_SIZE(omap5_dss_reg_fields),
 783
 784         .features = omap5_dss_feat_list,
 785         .num_features = ARRAY_SIZE(omap5_dss_feat_list),
 786
 787         .num_mgrs = 3,
 788         .num_ovls = 4,
 789         .supported_displays = omap5_dss_supported_displays,
 790         .supported_outputs = omap5_dss_supported_outputs,
 791         .supported_color_modes = omap4_dss_supported_color_modes,
 792         .overlay_caps = omap4_dss_overlay_caps,
 793         .clksrc_names = omap5_dss_clk_source_names,
 794         .dss_params = omap5_dss_param_range,
 795         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
 796         .buffer_size_unit = 16,
 797         .burst_size_unit = 16,
 798 };
 799
 800 #if defined(CONFIG_OMAP4_DSS_HDMI)
 801 /* HDMI OMAP4 Functions*/
 802 static const struct ti_hdmi_ip_ops omap4_hdmi_functions = {
 803
 804         .video_configure        =       ti_hdmi_4xxx_basic_configure,
 805         .phy_enable             =       ti_hdmi_4xxx_phy_enable,
 806         .phy_disable            =       ti_hdmi_4xxx_phy_disable,
 807         .read_edid              =       ti_hdmi_4xxx_read_edid,
 808         .detect                 =       ti_hdmi_4xxx_detect,
 809         .pll_enable             =       ti_hdmi_4xxx_pll_enable,
 810         .pll_disable            =       ti_hdmi_4xxx_pll_disable,
 811         .video_enable           =       ti_hdmi_4xxx_wp_video_start,
 812         .video_disable          =       ti_hdmi_4xxx_wp_video_stop,
 813         .dump_wrapper           =       ti_hdmi_4xxx_wp_dump,
 814         .dump_core              =       ti_hdmi_4xxx_core_dump,
 815         .dump_pll               =       ti_hdmi_4xxx_pll_dump,
 816         .dump_phy               =       ti_hdmi_4xxx_phy_dump,
 817 #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
 818         .audio_enable           =       ti_hdmi_4xxx_wp_audio_enable,
 819         .audio_disable          =       ti_hdmi_4xxx_wp_audio_disable,
 820         .audio_start            =       ti_hdmi_4xxx_audio_start,
 821         .audio_stop             =       ti_hdmi_4xxx_audio_stop,
 822         .audio_config           =       ti_hdmi_4xxx_audio_config,
 823 #endif
 824
 825 };
 826
 827 void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data,
 828                 enum omapdss_version version)
 829 {
 830         switch (version) {
 831         case OMAPDSS_VER_OMAP4430_ES1:
 832         case OMAPDSS_VER_OMAP4430_ES2:
 833         case OMAPDSS_VER_OMAP4:
 834                 ip_data->ops = &omap4_hdmi_functions;
 835                 break;
 836         default:
 837                 ip_data->ops = NULL;
 838         }
 839
 840         WARN_ON(ip_data->ops == NULL);
 841 }
 842 #endif
 843
 844 /* Functions returning values related to a DSS feature */
 845 int dss_feat_get_num_mgrs(void)
 846 {
 847         return omap_current_dss_features->num_mgrs;
 848 }
 849
 850 int dss_feat_get_num_ovls(void)
 851 {
 852         return omap_current_dss_features->num_ovls;
 853 }
 854
 855 int dss_feat_get_num_wbs(void)
 856 {
 857         return omap_current_dss_features->num_wbs;
 858 }
 859
 860 unsigned long dss_feat_get_param_min(enum dss_range_param param)
 861 {
 862         return omap_current_dss_features->dss_params[param].min;
 863 }
 864
 865 unsigned long dss_feat_get_param_max(enum dss_range_param param)
 866 {
 867         return omap_current_dss_features->dss_params[param].max;
 868 }
 869
 870 enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
 871 {
 872         return omap_current_dss_features->supported_displays[channel];
 873 }
 874
 875 enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel)
 876 {
 877         return omap_current_dss_features->supported_outputs[channel];
 878 }
 879
 880 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
 881 {
 882         return omap_current_dss_features->supported_color_modes[plane];
 883 }
 884
 885 enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane)
 886 {
 887         return omap_current_dss_features->overlay_caps[plane];
 888 }
 889
 890 bool dss_feat_color_mode_supported(enum omap_plane plane,
 891                 enum omap_color_mode color_mode)
 892 {
 893         return omap_current_dss_features->supported_color_modes[plane] &
 894                         color_mode;
 895 }
 896
 897 const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id)
 898 {
 899         return omap_current_dss_features->clksrc_names[id];
 900 }
 901
 902 u32 dss_feat_get_buffer_size_unit(void)
 903 {
 904         return omap_current_dss_features->buffer_size_unit;
 905 }
 906
 907 u32 dss_feat_get_burst_size_unit(void)
 908 {
 909         return omap_current_dss_features->burst_size_unit;
 910 }
 911
 912 /* DSS has_feature check */
 913 bool dss_has_feature(enum dss_feat_id id)
 914 {
 915         int i;
 916         const enum dss_feat_id *features = omap_current_dss_features->features;
 917         const int num_features = omap_current_dss_features->num_features;
 918
 919         for (i = 0; i < num_features; i++) {
 920                 if (features[i] == id)
 921                         return true;
 922         }
 923
 924         return false;
 925 }
 926
 927 void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
 928 {
 929         if (id >= omap_current_dss_features->num_reg_fields)
 930                 BUG();
 931
 932         *start = omap_current_dss_features->reg_fields[id].start;
 933         *end = omap_current_dss_features->reg_fields[id].end;
 934 }
 935
 936 bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)
 937 {
 938         return omap_current_dss_features->supported_rotation_types & rot_type;
 939 }
 940
 941 void dss_features_init(enum omapdss_version version)
 942 {
 943         switch (version) {
 944         case OMAPDSS_VER_OMAP24xx:
 945                 omap_current_dss_features = &omap2_dss_features;
 946                 break;
 947
 948         case OMAPDSS_VER_OMAP34xx_ES1:
 949         case OMAPDSS_VER_OMAP34xx_ES3:
 950                 omap_current_dss_features = &omap3430_dss_features;
 951                 break;
 952
 953         case OMAPDSS_VER_OMAP3630:
 954                 omap_current_dss_features = &omap3630_dss_features;
 955                 break;
 956
 957         case OMAPDSS_VER_OMAP4430_ES1:
 958                 omap_current_dss_features = &omap4430_es1_0_dss_features;
 959                 break;
 960
 961         case OMAPDSS_VER_OMAP4430_ES2:
 962                 omap_current_dss_features = &omap4430_es2_0_1_2_dss_features;
 963                 break;
 964
 965         case OMAPDSS_VER_OMAP4:
 966                 omap_current_dss_features = &omap4_dss_features;
 967                 break;
 968
 969         case OMAPDSS_VER_OMAP5:
 970                 omap_current_dss_features = &omap5_dss_features;
 971                 break;
 972
 973         case OMAPDSS_VER_AM35xx:
 974                 omap_current_dss_features = &am35xx_dss_features;
 975                 break;
 976
 977         default:
 978                 DSSWARN("Unsupported OMAP version");
 979                 break;
 980         }
 981 }