arch/arm/boot/dts/omap3.dtsi

   1 /*
   2  * Device Tree Source for OMAP3 SoC
   3  *
   4  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /include/ "skeleton.dtsi"
  12
  13 / {
  14         compatible = "ti,omap3430", "ti,omap3";
  15
  16         aliases {
  17                 serial0 = &uart1;
  18                 serial1 = &uart2;
  19                 serial2 = &uart3;
  20         };
  21
  22         cpus {
  23                 cpu@0 {
  24                         compatible = "arm,cortex-a8";
  25                 };
  26         };
  27
  28         /*
  29          * The soc node represents the soc top level view. It is uses for IPs
  30          * that are not memory mapped in the MPU view or for the MPU itself.
  31          */
  32         soc {
  33                 compatible = "ti,omap-infra";
  34                 mpu {
  35                         compatible = "ti,omap3-mpu";
  36                         ti,hwmods = "mpu";
  37                 };
  38
  39                 iva {
  40                         compatible = "ti,iva2.2";
  41                         ti,hwmods = "iva";
  42
  43                         dsp {
  44                                 compatible = "ti,omap3-c64";
  45                         };
  46                 };
  47         };
  48
  49         /*
  50          * XXX: Use a flat representation of the OMAP3 interconnect.
  51          * The real OMAP interconnect network is quite complex.
  52          * Since that will not bring real advantage to represent that in DT for
  53          * the moment, just use a fake OCP bus entry to represent the whole bus
  54          * hierarchy.
  55          */
  56         ocp {
  57                 compatible = "simple-bus";
  58                 #address-cells = <1>;
  59                 #size-cells = <1>;
  60                 ranges;
  61                 ti,hwmods = "l3_main";
  62
  63                 intc: interrupt-controller@48200000 {
  64                         compatible = "ti,omap2-intc";
  65                         interrupt-controller;
  66                         #interrupt-cells = <1>;
  67                         ti,intc-size = <96>;
  68                         reg = <0x48200000 0x1000>;
  69                 };
  70
  71                 omap3_pmx_core: pinmux@48002030 {
  72                         compatible = "ti,omap3-padconf", "pinctrl-single";
  73                         reg = <0x48002030 0x05cc>;
  74                         #address-cells = <1>;
  75                         #size-cells = <0>;
  76                         pinctrl-single,register-width = <16>;
  77                         pinctrl-single,function-mask = <0x7fff>;
  78                 };
  79
  80                 omap3_pmx_wkup: pinmux@0x48002a58 {
  81                         compatible = "ti,omap3-padconf", "pinctrl-single";
  82                         reg = <0x48002a58 0x5c>;
  83                         #address-cells = <1>;
  84                         #size-cells = <0>;
  85                         pinctrl-single,register-width = <16>;
  86                         pinctrl-single,function-mask = <0x7fff>;
  87                 };
  88
  89                 gpio1: gpio@48310000 {
  90                         compatible = "ti,omap3-gpio";
  91                         ti,hwmods = "gpio1";
  92                         gpio-controller;
  93                         #gpio-cells = <2>;
  94                         interrupt-controller;
  95                         #interrupt-cells = <1>;
  96                 };
  97
  98                 gpio2: gpio@49050000 {
  99                         compatible = "ti,omap3-gpio";
 100                         ti,hwmods = "gpio2";
 101                         gpio-controller;
 102                         #gpio-cells = <2>;
 103                         interrupt-controller;
 104                         #interrupt-cells = <1>;
 105                 };
 106
 107                 gpio3: gpio@49052000 {
 108                         compatible = "ti,omap3-gpio";
 109                         ti,hwmods = "gpio3";
 110                         gpio-controller;
 111                         #gpio-cells = <2>;
 112                         interrupt-controller;
 113                         #interrupt-cells = <1>;
 114                 };
 115
 116                 gpio4: gpio@49054000 {
 117                         compatible = "ti,omap3-gpio";
 118                         ti,hwmods = "gpio4";
 119                         gpio-controller;
 120                         #gpio-cells = <2>;
 121                         interrupt-controller;
 122                         #interrupt-cells = <1>;
 123                 };
 124
 125                 gpio5: gpio@49056000 {
 126                         compatible = "ti,omap3-gpio";
 127                         ti,hwmods = "gpio5";
 128                         gpio-controller;
 129                         #gpio-cells = <2>;
 130                         interrupt-controller;
 131                         #interrupt-cells = <1>;
 132                 };
 133
 134                 gpio6: gpio@49058000 {
 135                         compatible = "ti,omap3-gpio";
 136                         ti,hwmods = "gpio6";
 137                         gpio-controller;
 138                         #gpio-cells = <2>;
 139                         interrupt-controller;
 140                         #interrupt-cells = <1>;
 141                 };
 142
 143                 uart1: serial@4806a000 {
 144                         compatible = "ti,omap3-uart";
 145                         ti,hwmods = "uart1";
 146                         clock-frequency = <48000000>;
 147                 };
 148
 149                 uart2: serial@4806c000 {
 150                         compatible = "ti,omap3-uart";
 151                         ti,hwmods = "uart2";
 152                         clock-frequency = <48000000>;
 153                 };
 154
 155                 uart3: serial@49020000 {
 156                         compatible = "ti,omap3-uart";
 157                         ti,hwmods = "uart3";
 158                         clock-frequency = <48000000>;
 159                 };
 160
 161                 i2c1: i2c@48070000 {
 162                         compatible = "ti,omap3-i2c";
 163                         #address-cells = <1>;
 164                         #size-cells = <0>;
 165                         ti,hwmods = "i2c1";
 166                 };
 167
 168                 i2c2: i2c@48072000 {
 169                         compatible = "ti,omap3-i2c";
 170                         #address-cells = <1>;
 171                         #size-cells = <0>;
 172                         ti,hwmods = "i2c2";
 173                 };
 174
 175                 i2c3: i2c@48060000 {
 176                         compatible = "ti,omap3-i2c";
 177                         #address-cells = <1>;
 178                         #size-cells = <0>;
 179                         ti,hwmods = "i2c3";
 180                 };
 181
 182                 mcspi1: spi@48098000 {
 183                         compatible = "ti,omap2-mcspi";
 184                         #address-cells = <1>;
 185                         #size-cells = <0>;
 186                         ti,hwmods = "mcspi1";
 187                         ti,spi-num-cs = <4>;
 188                 };
 189
 190                 mcspi2: spi@4809a000 {
 191                         compatible = "ti,omap2-mcspi";
 192                         #address-cells = <1>;
 193                         #size-cells = <0>;
 194                         ti,hwmods = "mcspi2";
 195                         ti,spi-num-cs = <2>;
 196                 };
 197
 198                 mcspi3: spi@480b8000 {
 199                         compatible = "ti,omap2-mcspi";
 200                         #address-cells = <1>;
 201                         #size-cells = <0>;
 202                         ti,hwmods = "mcspi3";
 203                         ti,spi-num-cs = <2>;
 204                 };
 205
 206                 mcspi4: spi@480ba000 {
 207                         compatible = "ti,omap2-mcspi";
 208                         #address-cells = <1>;
 209                         #size-cells = <0>;
 210                         ti,hwmods = "mcspi4";
 211                         ti,spi-num-cs = <1>;
 212                 };
 213
 214                 mmc1: mmc@4809c000 {
 215                         compatible = "ti,omap3-hsmmc";
 216                         ti,hwmods = "mmc1";
 217                         ti,dual-volt;
 218                 };
 219
 220                 mmc2: mmc@480b4000 {
 221                         compatible = "ti,omap3-hsmmc";
 222                         ti,hwmods = "mmc2";
 223                 };
 224
 225                 mmc3: mmc@480ad000 {
 226                         compatible = "ti,omap3-hsmmc";
 227                         ti,hwmods = "mmc3";
 228                 };
 229
 230                 wdt2: wdt@48314000 {
 231                         compatible = "ti,omap3-wdt";
 232                         ti,hwmods = "wd_timer2";
 233                 };
 234
 235                 mcbsp1: mcbsp@48074000 {
 236                         compatible = "ti,omap3-mcbsp";
 237                         reg = <0x48074000 0xff>;
 238                         reg-names = "mpu";
 239                         interrupts = <16>, /* OCP compliant interrupt */
 240                                      <59>, /* TX interrupt */
 241                                      <60>; /* RX interrupt */
 242                         interrupt-names = "common", "tx", "rx";
 243                         interrupt-parent = <&intc>;
 244                         ti,buffer-size = <128>;
 245                         ti,hwmods = "mcbsp1";
 246                 };
 247
 248                 mcbsp2: mcbsp@49022000 {
 249                         compatible = "ti,omap3-mcbsp";
 250                         reg = <0x49022000 0xff>,
 251                               <0x49028000 0xff>;
 252                         reg-names = "mpu", "sidetone";
 253                         interrupts = <17>, /* OCP compliant interrupt */
 254                                      <62>, /* TX interrupt */
 255                                      <63>, /* RX interrupt */
 256                                      <4>;  /* Sidetone */
 257                         interrupt-names = "common", "tx", "rx", "sidetone";
 258                         interrupt-parent = <&intc>;
 259                         ti,buffer-size = <1280>;
 260                         ti,hwmods = "mcbsp2";
 261                 };
 262
 263                 mcbsp3: mcbsp@49024000 {
 264                         compatible = "ti,omap3-mcbsp";
 265                         reg = <0x49024000 0xff>,
 266                               <0x4902a000 0xff>;
 267                         reg-names = "mpu", "sidetone";
 268                         interrupts = <22>, /* OCP compliant interrupt */
 269                                      <89>, /* TX interrupt */
 270                                      <90>, /* RX interrupt */
 271                                      <5>;  /* Sidetone */
 272                         interrupt-names = "common", "tx", "rx", "sidetone";
 273                         interrupt-parent = <&intc>;
 274                         ti,buffer-size = <128>;
 275                         ti,hwmods = "mcbsp3";
 276                 };
 277
 278                 mcbsp4: mcbsp@49026000 {
 279                         compatible = "ti,omap3-mcbsp";
 280                         reg = <0x49026000 0xff>;
 281                         reg-names = "mpu";
 282                         interrupts = <23>, /* OCP compliant interrupt */
 283                                      <54>, /* TX interrupt */
 284                                      <55>; /* RX interrupt */
 285                         interrupt-names = "common", "tx", "rx";
 286                         interrupt-parent = <&intc>;
 287                         ti,buffer-size = <128>;
 288                         ti,hwmods = "mcbsp4";
 289                 };
 290
 291                 mcbsp5: mcbsp@48096000 {
 292                         compatible = "ti,omap3-mcbsp";
 293                         reg = <0x48096000 0xff>;
 294                         reg-names = "mpu";
 295                         interrupts = <27>, /* OCP compliant interrupt */
 296                                      <81>, /* TX interrupt */
 297                                      <82>; /* RX interrupt */
 298                         interrupt-names = "common", "tx", "rx";
 299                         interrupt-parent = <&intc>;
 300                         ti,buffer-size = <128>;
 301                         ti,hwmods = "mcbsp5";
 302                 };
 303         };
 304 };