drivers/gpu/drm/exynos/exynos_drm_fimd.c

   1 /* exynos_drm_fimd.c
   2  *
   3  * Copyright (C) 2011 Samsung Electronics Co.Ltd
   4  * Authors:
   5  *      Joonyoung Shim <jy0922.shim@samsung.com>
   6  *      Inki Dae <inki.dae@samsung.com>
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  */
  14 #include "drmP.h"
  15
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/clk.h>
  20 #include <linux/pm_runtime.h>
  21
  22 #include <drm/exynos_drm.h>
  23 #include <plat/regs-fb-v4.h>
  24
  25 #include "exynos_drm_drv.h"
  26 #include "exynos_drm_fbdev.h"
  27 #include "exynos_drm_crtc.h"
  28
  29 /*
  30  * FIMD is stand for Fully Interactive Mobile Display and
  31  * as a display controller, it transfers contents drawn on memory
  32  * to a LCD Panel through Display Interfaces such as RGB or
  33  * CPU Interface.
  34  */
  35
  36 /* position control register for hardware window 0, 2 ~ 4.*/
  37 #define VIDOSD_A(win)           (VIDOSD_BASE + 0x00 + (win) * 16)
  38 #define VIDOSD_B(win)           (VIDOSD_BASE + 0x04 + (win) * 16)
  39 /* size control register for hardware window 0. */
  40 #define VIDOSD_C_SIZE_W0        (VIDOSD_BASE + 0x08)
  41 /* alpha control register for hardware window 1 ~ 4. */
  42 #define VIDOSD_C(win)           (VIDOSD_BASE + 0x18 + (win) * 16)
  43 /* size control register for hardware window 1 ~ 4. */
  44 #define VIDOSD_D(win)           (VIDOSD_BASE + 0x0C + (win) * 16)
  45
  46 #define VIDWx_BUF_START(win, buf)       (VIDW_BUF_START(buf) + (win) * 8)
  47 #define VIDWx_BUF_END(win, buf)         (VIDW_BUF_END(buf) + (win) * 8)
  48 #define VIDWx_BUF_SIZE(win, buf)        (VIDW_BUF_SIZE(buf) + (win) * 4)
  49
  50 /* color key control register for hardware window 1 ~ 4. */
  51 #define WKEYCON0_BASE(x)                ((WKEYCON0 + 0x140) + (x * 8))
  52 /* color key value register for hardware window 1 ~ 4. */
  53 #define WKEYCON1_BASE(x)                ((WKEYCON1 + 0x140) + (x * 8))
  54
  55 /* FIMD has totally five hardware windows. */
  56 #define WINDOWS_NR      5
  57
  58 #define get_fimd_context(dev)   platform_get_drvdata(to_platform_device(dev))
  59
  60 struct fimd_win_data {
  61         unsigned int            offset_x;
  62         unsigned int            offset_y;
  63         unsigned int            ovl_width;
  64         unsigned int            ovl_height;
  65         unsigned int            fb_width;
  66         unsigned int            fb_height;
  67         unsigned int            bpp;
  68         dma_addr_t              dma_addr;
  69         void __iomem            *vaddr;
  70         unsigned int            buf_offsize;
  71         unsigned int            line_size;      /* bytes */
  72         bool                    enabled;
  73 };
  74
  75 struct fimd_context {
  76         struct exynos_drm_subdrv        subdrv;
  77         int                             irq;
  78         struct drm_crtc                 *crtc;
  79         struct clk                      *bus_clk;
  80         struct clk                      *lcd_clk;
  81         void __iomem                    *regs;
  82         struct fimd_win_data            win_data[WINDOWS_NR];
  83         unsigned int                    clkdiv;
  84         unsigned int                    default_win;
  85         unsigned long                   irq_flags;
  86         u32                             vidcon0;
  87         u32                             vidcon1;
  88         bool                            suspended;
  89         struct mutex                    lock;
  90
  91         struct exynos_drm_panel_info *panel;
  92 };
  93
  94 static bool fimd_display_is_connected(struct device *dev)
  95 {
  96         DRM_DEBUG_KMS("%s\n", __FILE__);
  97
  98         /* TODO. */
  99
 100         return true;
 101 }
 102
 103 static void *fimd_get_panel(struct device *dev)
 104 {
 105         struct fimd_context *ctx = get_fimd_context(dev);
 106
 107         DRM_DEBUG_KMS("%s\n", __FILE__);
 108
 109         return ctx->panel;
 110 }
 111
 112 static int fimd_check_timing(struct device *dev, void *timing)
 113 {
 114         DRM_DEBUG_KMS("%s\n", __FILE__);
 115
 116         /* TODO. */
 117
 118         return 0;
 119 }
 120
 121 static int fimd_display_power_on(struct device *dev, int mode)
 122 {
 123         DRM_DEBUG_KMS("%s\n", __FILE__);
 124
 125         /* TODO */
 126
 127         return 0;
 128 }
 129
 130 static struct exynos_drm_display_ops fimd_display_ops = {
 131         .type = EXYNOS_DISPLAY_TYPE_LCD,
 132         .is_connected = fimd_display_is_connected,
 133         .get_panel = fimd_get_panel,
 134         .check_timing = fimd_check_timing,
 135         .power_on = fimd_display_power_on,
 136 };
 137
 138 static void fimd_dpms(struct device *subdrv_dev, int mode)
 139 {
 140         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 141
 142         DRM_DEBUG_KMS("%s, %d\n", __FILE__, mode);
 143
 144         mutex_lock(&ctx->lock);
 145
 146         switch (mode) {
 147         case DRM_MODE_DPMS_ON:
 148                 /*
 149                  * enable fimd hardware only if suspended status.
 150                  *
 151                  * P.S. fimd_dpms function would be called at booting time so
 152                  * clk_enable could be called double time.
 153                  */
 154                 if (ctx->suspended)
 155                         pm_runtime_get_sync(subdrv_dev);
 156                 break;
 157         case DRM_MODE_DPMS_STANDBY:
 158         case DRM_MODE_DPMS_SUSPEND:
 159         case DRM_MODE_DPMS_OFF:
 160                 if (!ctx->suspended)
 161                         pm_runtime_put_sync(subdrv_dev);
 162                 break;
 163         default:
 164                 DRM_DEBUG_KMS("unspecified mode %d\n", mode);
 165                 break;
 166         }
 167
 168         mutex_unlock(&ctx->lock);
 169 }
 170
 171 static void fimd_apply(struct device *subdrv_dev)
 172 {
 173         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 174         struct exynos_drm_manager *mgr = ctx->subdrv.manager;
 175         struct exynos_drm_manager_ops *mgr_ops = mgr->ops;
 176         struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops;
 177         struct fimd_win_data *win_data;
 178         int i;
 179
 180         DRM_DEBUG_KMS("%s\n", __FILE__);
 181
 182         for (i = 0; i < WINDOWS_NR; i++) {
 183                 win_data = &ctx->win_data[i];
 184                 if (win_data->enabled && (ovl_ops && ovl_ops->commit))
 185                         ovl_ops->commit(subdrv_dev, i);
 186         }
 187
 188         if (mgr_ops && mgr_ops->commit)
 189                 mgr_ops->commit(subdrv_dev);
 190 }
 191
 192 static void fimd_commit(struct device *dev)
 193 {
 194         struct fimd_context *ctx = get_fimd_context(dev);
 195         struct exynos_drm_panel_info *panel = ctx->panel;
 196         struct fb_videomode *timing = &panel->timing;
 197         u32 val;
 198
 199         if (ctx->suspended)
 200                 return;
 201
 202         DRM_DEBUG_KMS("%s\n", __FILE__);
 203
 204         /* setup polarity values from machine code. */
 205         writel(ctx->vidcon1, ctx->regs + VIDCON1);
 206
 207         /* setup vertical timing values. */
 208         val = VIDTCON0_VBPD(timing->upper_margin - 1) |
 209                VIDTCON0_VFPD(timing->lower_margin - 1) |
 210                VIDTCON0_VSPW(timing->vsync_len - 1);
 211         writel(val, ctx->regs + VIDTCON0);
 212
 213         /* setup horizontal timing values.  */
 214         val = VIDTCON1_HBPD(timing->left_margin - 1) |
 215                VIDTCON1_HFPD(timing->right_margin - 1) |
 216                VIDTCON1_HSPW(timing->hsync_len - 1);
 217         writel(val, ctx->regs + VIDTCON1);
 218
 219         /* setup horizontal and vertical display size. */
 220         val = VIDTCON2_LINEVAL(timing->yres - 1) |
 221                VIDTCON2_HOZVAL(timing->xres - 1);
 222         writel(val, ctx->regs + VIDTCON2);
 223
 224         /* setup clock source, clock divider, enable dma. */
 225         val = ctx->vidcon0;
 226         val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
 227
 228         if (ctx->clkdiv > 1)
 229                 val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR;
 230         else
 231                 val &= ~VIDCON0_CLKDIR; /* 1:1 clock */
 232
 233         /*
 234          * fields of register with prefix '_F' would be updated
 235          * at vsync(same as dma start)
 236          */
 237         val |= VIDCON0_ENVID | VIDCON0_ENVID_F;
 238         writel(val, ctx->regs + VIDCON0);
 239 }
 240
 241 static int fimd_enable_vblank(struct device *dev)
 242 {
 243         struct fimd_context *ctx = get_fimd_context(dev);
 244         u32 val;
 245
 246         DRM_DEBUG_KMS("%s\n", __FILE__);
 247
 248         if (ctx->suspended)
 249                 return -EPERM;
 250
 251         if (!test_and_set_bit(0, &ctx->irq_flags)) {
 252                 val = readl(ctx->regs + VIDINTCON0);
 253
 254                 val |= VIDINTCON0_INT_ENABLE;
 255                 val |= VIDINTCON0_INT_FRAME;
 256
 257                 val &= ~VIDINTCON0_FRAMESEL0_MASK;
 258                 val |= VIDINTCON0_FRAMESEL0_VSYNC;
 259                 val &= ~VIDINTCON0_FRAMESEL1_MASK;
 260                 val |= VIDINTCON0_FRAMESEL1_NONE;
 261
 262                 writel(val, ctx->regs + VIDINTCON0);
 263         }
 264
 265         return 0;
 266 }
 267
 268 static void fimd_disable_vblank(struct device *dev)
 269 {
 270         struct fimd_context *ctx = get_fimd_context(dev);
 271         u32 val;
 272
 273         DRM_DEBUG_KMS("%s\n", __FILE__);
 274
 275         if (ctx->suspended)
 276                 return;
 277
 278         if (test_and_clear_bit(0, &ctx->irq_flags)) {
 279                 val = readl(ctx->regs + VIDINTCON0);
 280
 281                 val &= ~VIDINTCON0_INT_FRAME;
 282                 val &= ~VIDINTCON0_INT_ENABLE;
 283
 284                 writel(val, ctx->regs + VIDINTCON0);
 285         }
 286 }
 287
 288 static struct exynos_drm_manager_ops fimd_manager_ops = {
 289         .dpms = fimd_dpms,
 290         .apply = fimd_apply,
 291         .commit = fimd_commit,
 292         .enable_vblank = fimd_enable_vblank,
 293         .disable_vblank = fimd_disable_vblank,
 294 };
 295
 296 static void fimd_win_mode_set(struct device *dev,
 297                               struct exynos_drm_overlay *overlay)
 298 {
 299         struct fimd_context *ctx = get_fimd_context(dev);
 300         struct fimd_win_data *win_data;
 301         int win;
 302         unsigned long offset;
 303
 304         DRM_DEBUG_KMS("%s\n", __FILE__);
 305
 306         if (!overlay) {
 307                 dev_err(dev, "overlay is NULL\n");
 308                 return;
 309         }
 310
 311         win = overlay->zpos;
 312         if (win == DEFAULT_ZPOS)
 313                 win = ctx->default_win;
 314
 315         if (win < 0 || win > WINDOWS_NR)
 316                 return;
 317
 318         offset = overlay->fb_x * (overlay->bpp >> 3);
 319         offset += overlay->fb_y * overlay->pitch;
 320
 321         DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch);
 322
 323         win_data = &ctx->win_data[win];
 324
 325         win_data->offset_x = overlay->crtc_x;
 326         win_data->offset_y = overlay->crtc_y;
 327         win_data->ovl_width = overlay->crtc_width;
 328         win_data->ovl_height = overlay->crtc_height;
 329         win_data->fb_width = overlay->fb_width;
 330         win_data->fb_height = overlay->fb_height;
 331         win_data->dma_addr = overlay->dma_addr[0] + offset;
 332         win_data->vaddr = overlay->vaddr[0] + offset;
 333         win_data->bpp = overlay->bpp;
 334         win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) *
 335                                 (overlay->bpp >> 3);
 336         win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3);
 337
 338         DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n",
 339                         win_data->offset_x, win_data->offset_y);
 340         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 341                         win_data->ovl_width, win_data->ovl_height);
 342         DRM_DEBUG_KMS("paddr = 0x%lx, vaddr = 0x%lx\n",
 343                         (unsigned long)win_data->dma_addr,
 344                         (unsigned long)win_data->vaddr);
 345         DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n",
 346                         overlay->fb_width, overlay->crtc_width);
 347 }
 348
 349 static void fimd_win_set_pixfmt(struct device *dev, unsigned int win)
 350 {
 351         struct fimd_context *ctx = get_fimd_context(dev);
 352         struct fimd_win_data *win_data = &ctx->win_data[win];
 353         unsigned long val;
 354
 355         DRM_DEBUG_KMS("%s\n", __FILE__);
 356
 357         val = WINCONx_ENWIN;
 358
 359         switch (win_data->bpp) {
 360         case 1:
 361                 val |= WINCON0_BPPMODE_1BPP;
 362                 val |= WINCONx_BITSWP;
 363                 val |= WINCONx_BURSTLEN_4WORD;
 364                 break;
 365         case 2:
 366                 val |= WINCON0_BPPMODE_2BPP;
 367                 val |= WINCONx_BITSWP;
 368                 val |= WINCONx_BURSTLEN_8WORD;
 369                 break;
 370         case 4:
 371                 val |= WINCON0_BPPMODE_4BPP;
 372                 val |= WINCONx_BITSWP;
 373                 val |= WINCONx_BURSTLEN_8WORD;
 374                 break;
 375         case 8:
 376                 val |= WINCON0_BPPMODE_8BPP_PALETTE;
 377                 val |= WINCONx_BURSTLEN_8WORD;
 378                 val |= WINCONx_BYTSWP;
 379                 break;
 380         case 16:
 381                 val |= WINCON0_BPPMODE_16BPP_565;
 382                 val |= WINCONx_HAWSWP;
 383                 val |= WINCONx_BURSTLEN_16WORD;
 384                 break;
 385         case 24:
 386                 val |= WINCON0_BPPMODE_24BPP_888;
 387                 val |= WINCONx_WSWP;
 388                 val |= WINCONx_BURSTLEN_16WORD;
 389                 break;
 390         case 32:
 391                 val |= WINCON1_BPPMODE_28BPP_A4888
 392                         | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
 393                 val |= WINCONx_WSWP;
 394                 val |= WINCONx_BURSTLEN_16WORD;
 395                 break;
 396         default:
 397                 DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n");
 398
 399                 val |= WINCON0_BPPMODE_24BPP_888;
 400                 val |= WINCONx_WSWP;
 401                 val |= WINCONx_BURSTLEN_16WORD;
 402                 break;
 403         }
 404
 405         DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp);
 406
 407         writel(val, ctx->regs + WINCON(win));
 408 }
 409
 410 static void fimd_win_set_colkey(struct device *dev, unsigned int win)
 411 {
 412         struct fimd_context *ctx = get_fimd_context(dev);
 413         unsigned int keycon0 = 0, keycon1 = 0;
 414
 415         DRM_DEBUG_KMS("%s\n", __FILE__);
 416
 417         keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F |
 418                         WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
 419
 420         keycon1 = WxKEYCON1_COLVAL(0xffffffff);
 421
 422         writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
 423         writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
 424 }
 425
 426 static void fimd_win_commit(struct device *dev, int zpos)
 427 {
 428         struct fimd_context *ctx = get_fimd_context(dev);
 429         struct fimd_win_data *win_data;
 430         int win = zpos;
 431         unsigned long val, alpha, size;
 432
 433         DRM_DEBUG_KMS("%s\n", __FILE__);
 434
 435         if (ctx->suspended)
 436                 return;
 437
 438         if (win == DEFAULT_ZPOS)
 439                 win = ctx->default_win;
 440
 441         if (win < 0 || win > WINDOWS_NR)
 442                 return;
 443
 444         win_data = &ctx->win_data[win];
 445
 446         /*
 447          * SHADOWCON register is used for enabling timing.
 448          *
 449          * for example, once only width value of a register is set,
 450          * if the dma is started then fimd hardware could malfunction so
 451          * with protect window setting, the register fields with prefix '_F'
 452          * wouldn't be updated at vsync also but updated once unprotect window
 453          * is set.
 454          */
 455
 456         /* protect windows */
 457         val = readl(ctx->regs + SHADOWCON);
 458         val |= SHADOWCON_WINx_PROTECT(win);
 459         writel(val, ctx->regs + SHADOWCON);
 460
 461         /* buffer start address */
 462         val = (unsigned long)win_data->dma_addr;
 463         writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
 464
 465         /* buffer end address */
 466         size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3);
 467         val = (unsigned long)(win_data->dma_addr + size);
 468         writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
 469
 470         DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n",
 471                         (unsigned long)win_data->dma_addr, val, size);
 472         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 473                         win_data->ovl_width, win_data->ovl_height);
 474
 475         /* buffer size */
 476         val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) |
 477                 VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size);
 478         writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));
 479
 480         /* OSD position */
 481         val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) |
 482                 VIDOSDxA_TOPLEFT_Y(win_data->offset_y);
 483         writel(val, ctx->regs + VIDOSD_A(win));
 484
 485         val = VIDOSDxB_BOTRIGHT_X(win_data->offset_x +
 486                                         win_data->ovl_width - 1) |
 487                 VIDOSDxB_BOTRIGHT_Y(win_data->offset_y +
 488                                         win_data->ovl_height - 1);
 489         writel(val, ctx->regs + VIDOSD_B(win));
 490
 491         DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
 492                         win_data->offset_x, win_data->offset_y,
 493                         win_data->offset_x + win_data->ovl_width - 1,
 494                         win_data->offset_y + win_data->ovl_height - 1);
 495
 496         /* hardware window 0 doesn't support alpha channel. */
 497         if (win != 0) {
 498                 /* OSD alpha */
 499                 alpha = VIDISD14C_ALPHA1_R(0xf) |
 500                         VIDISD14C_ALPHA1_G(0xf) |
 501                         VIDISD14C_ALPHA1_B(0xf);
 502
 503                 writel(alpha, ctx->regs + VIDOSD_C(win));
 504         }
 505
 506         /* OSD size */
 507         if (win != 3 && win != 4) {
 508                 u32 offset = VIDOSD_D(win);
 509                 if (win == 0)
 510                         offset = VIDOSD_C_SIZE_W0;
 511                 val = win_data->ovl_width * win_data->ovl_height;
 512                 writel(val, ctx->regs + offset);
 513
 514                 DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
 515         }
 516
 517         fimd_win_set_pixfmt(dev, win);
 518
 519         /* hardware window 0 doesn't support color key. */
 520         if (win != 0)
 521                 fimd_win_set_colkey(dev, win);
 522
 523         /* wincon */
 524         val = readl(ctx->regs + WINCON(win));
 525         val |= WINCONx_ENWIN;
 526         writel(val, ctx->regs + WINCON(win));
 527
 528         /* Enable DMA channel and unprotect windows */
 529         val = readl(ctx->regs + SHADOWCON);
 530         val |= SHADOWCON_CHx_ENABLE(win);
 531         val &= ~SHADOWCON_WINx_PROTECT(win);
 532         writel(val, ctx->regs + SHADOWCON);
 533
 534         win_data->enabled = true;
 535 }
 536
 537 static void fimd_win_disable(struct device *dev, int zpos)
 538 {
 539         struct fimd_context *ctx = get_fimd_context(dev);
 540         struct fimd_win_data *win_data;
 541         int win = zpos;
 542         u32 val;
 543
 544         DRM_DEBUG_KMS("%s\n", __FILE__);
 545
 546         if (win == DEFAULT_ZPOS)
 547                 win = ctx->default_win;
 548
 549         if (win < 0 || win > WINDOWS_NR)
 550                 return;
 551
 552         win_data = &ctx->win_data[win];
 553
 554         /* protect windows */
 555         val = readl(ctx->regs + SHADOWCON);
 556         val |= SHADOWCON_WINx_PROTECT(win);
 557         writel(val, ctx->regs + SHADOWCON);
 558
 559         /* wincon */
 560         val = readl(ctx->regs + WINCON(win));
 561         val &= ~WINCONx_ENWIN;
 562         writel(val, ctx->regs + WINCON(win));
 563
 564         /* unprotect windows */
 565         val = readl(ctx->regs + SHADOWCON);
 566         val &= ~SHADOWCON_CHx_ENABLE(win);
 567         val &= ~SHADOWCON_WINx_PROTECT(win);
 568         writel(val, ctx->regs + SHADOWCON);
 569
 570         win_data->enabled = false;
 571 }
 572
 573 static struct exynos_drm_overlay_ops fimd_overlay_ops = {
 574         .mode_set = fimd_win_mode_set,
 575         .commit = fimd_win_commit,
 576         .disable = fimd_win_disable,
 577 };
 578
 579 static struct exynos_drm_manager fimd_manager = {
 580         .pipe           = -1,
 581         .ops            = &fimd_manager_ops,
 582         .overlay_ops    = &fimd_overlay_ops,
 583         .display_ops    = &fimd_display_ops,
 584 };
 585
 586 static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc)
 587 {
 588         struct exynos_drm_private *dev_priv = drm_dev->dev_private;
 589         struct drm_pending_vblank_event *e, *t;
 590         struct timeval now;
 591         unsigned long flags;
 592         bool is_checked = false;
 593
 594         spin_lock_irqsave(&drm_dev->event_lock, flags);
 595
 596         list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
 597                         base.link) {
 598                 /* if event's pipe isn't same as crtc then ignore it. */
 599                 if (crtc != e->pipe)
 600                         continue;
 601
 602                 is_checked = true;
 603
 604                 do_gettimeofday(&now);
 605                 e->event.sequence = 0;
 606                 e->event.tv_sec = now.tv_sec;
 607                 e->event.tv_usec = now.tv_usec;
 608
 609                 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
 610                 wake_up_interruptible(&e->base.file_priv->event_wait);
 611         }
 612
 613         if (is_checked) {
 614                 /*
 615                  * call drm_vblank_put only in case that drm_vblank_get was
 616                  * called.
 617                  */
 618                 if (atomic_read(&drm_dev->vblank_refcount[crtc]) > 0)
 619                         drm_vblank_put(drm_dev, crtc);
 620
 621                 /*
 622                  * don't off vblank if vblank_disable_allowed is 1,
 623                  * because vblank would be off by timer handler.
 624                  */
 625                 if (!drm_dev->vblank_disable_allowed)
 626                         drm_vblank_off(drm_dev, crtc);
 627         }
 628
 629         spin_unlock_irqrestore(&drm_dev->event_lock, flags);
 630 }
 631
 632 static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
 633 {
 634         struct fimd_context *ctx = (struct fimd_context *)dev_id;
 635         struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
 636         struct drm_device *drm_dev = subdrv->drm_dev;
 637         struct exynos_drm_manager *manager = subdrv->manager;
 638         u32 val;
 639
 640         val = readl(ctx->regs + VIDINTCON1);
 641
 642         if (val & VIDINTCON1_INT_FRAME)
 643                 /* VSYNC interrupt */
 644                 writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1);
 645
 646         /* check the crtc is detached already from encoder */
 647         if (manager->pipe < 0)
 648                 goto out;
 649
 650         drm_handle_vblank(drm_dev, manager->pipe);
 651         fimd_finish_pageflip(drm_dev, manager->pipe);
 652
 653 out:
 654         return IRQ_HANDLED;
 655 }
 656
 657 static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
 658 {
 659         DRM_DEBUG_KMS("%s\n", __FILE__);
 660
 661         /*
 662          * enable drm irq mode.
 663          * - with irq_enabled = 1, we can use the vblank feature.
 664          *
 665          * P.S. note that we wouldn't use drm irq handler but
 666          *      just specific driver own one instead because
 667          *      drm framework supports only one irq handler.
 668          */
 669         drm_dev->irq_enabled = 1;
 670
 671         /*
 672          * with vblank_disable_allowed = 1, vblank interrupt will be disabled
 673          * by drm timer once a current process gives up ownership of
 674          * vblank event.(after drm_vblank_put function is called)
 675          */
 676         drm_dev->vblank_disable_allowed = 1;
 677
 678         return 0;
 679 }
 680
 681 static void fimd_subdrv_remove(struct drm_device *drm_dev)
 682 {
 683         DRM_DEBUG_KMS("%s\n", __FILE__);
 684
 685         /* TODO. */
 686 }
 687
 688 static int fimd_calc_clkdiv(struct fimd_context *ctx,
 689                             struct fb_videomode *timing)
 690 {
 691         unsigned long clk = clk_get_rate(ctx->lcd_clk);
 692         u32 retrace;
 693         u32 clkdiv;
 694         u32 best_framerate = 0;
 695         u32 framerate;
 696
 697         DRM_DEBUG_KMS("%s\n", __FILE__);
 698
 699         retrace = timing->left_margin + timing->hsync_len +
 700                                 timing->right_margin + timing->xres;
 701         retrace *= timing->upper_margin + timing->vsync_len +
 702                                 timing->lower_margin + timing->yres;
 703
 704         /* default framerate is 60Hz */
 705         if (!timing->refresh)
 706                 timing->refresh = 60;
 707
 708         clk /= retrace;
 709
 710         for (clkdiv = 1; clkdiv < 0x100; clkdiv++) {
 711                 int tmp;
 712
 713                 /* get best framerate */
 714                 framerate = clk / clkdiv;
 715                 tmp = timing->refresh - framerate;
 716                 if (tmp < 0) {
 717                         best_framerate = framerate;
 718                         continue;
 719                 } else {
 720                         if (!best_framerate)
 721                                 best_framerate = framerate;
 722                         else if (tmp < (best_framerate - framerate))
 723                                 best_framerate = framerate;
 724                         break;
 725                 }
 726         }
 727
 728         return clkdiv;
 729 }
 730
 731 static void fimd_clear_win(struct fimd_context *ctx, int win)
 732 {
 733         u32 val;
 734
 735         DRM_DEBUG_KMS("%s\n", __FILE__);
 736
 737         writel(0, ctx->regs + WINCON(win));
 738         writel(0, ctx->regs + VIDOSD_A(win));
 739         writel(0, ctx->regs + VIDOSD_B(win));
 740         writel(0, ctx->regs + VIDOSD_C(win));
 741
 742         if (win == 1 || win == 2)
 743                 writel(0, ctx->regs + VIDOSD_D(win));
 744
 745         val = readl(ctx->regs + SHADOWCON);
 746         val &= ~SHADOWCON_WINx_PROTECT(win);
 747         writel(val, ctx->regs + SHADOWCON);
 748 }
 749
 750 static int fimd_power_on(struct fimd_context *ctx, bool enable)
 751 {
 752         struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
 753         struct device *dev = subdrv->dev;
 754
 755         DRM_DEBUG_KMS("%s\n", __FILE__);
 756
 757         if (enable != false && enable != true)
 758                 return -EINVAL;
 759
 760         if (enable) {
 761                 int ret;
 762
 763                 ret = clk_enable(ctx->bus_clk);
 764                 if (ret < 0)
 765                         return ret;
 766
 767                 ret = clk_enable(ctx->lcd_clk);
 768                 if  (ret < 0) {
 769                         clk_disable(ctx->bus_clk);
 770                         return ret;
 771                 }
 772
 773                 ctx->suspended = false;
 774
 775                 /* if vblank was enabled status, enable it again. */
 776                 if (test_and_clear_bit(0, &ctx->irq_flags))
 777                         fimd_enable_vblank(dev);
 778
 779                 fimd_apply(dev);
 780         } else {
 781                 clk_disable(ctx->lcd_clk);
 782                 clk_disable(ctx->bus_clk);
 783
 784                 ctx->suspended = true;
 785         }
 786
 787         return 0;
 788 }
 789
 790 static int __devinit fimd_probe(struct platform_device *pdev)
 791 {
 792         struct device *dev = &pdev->dev;
 793         struct fimd_context *ctx;
 794         struct exynos_drm_subdrv *subdrv;
 795         struct exynos_drm_fimd_pdata *pdata;
 796         struct exynos_drm_panel_info *panel;
 797         struct resource *res;
 798         int win;
 799         int ret = -EINVAL;
 800
 801         DRM_DEBUG_KMS("%s\n", __FILE__);
 802
 803         pdata = pdev->dev.platform_data;
 804         if (!pdata) {
 805                 dev_err(dev, "no platform data specified\n");
 806                 return -EINVAL;
 807         }
 808
 809         panel = &pdata->panel;
 810         if (!panel) {
 811                 dev_err(dev, "panel is null.\n");
 812                 return -EINVAL;
 813         }
 814
 815         ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
 816         if (!ctx)
 817                 return -ENOMEM;
 818
 819         ctx->bus_clk = clk_get(dev, "fimd");
 820         if (IS_ERR(ctx->bus_clk)) {
 821                 dev_err(dev, "failed to get bus clock\n");
 822                 ret = PTR_ERR(ctx->bus_clk);
 823                 goto err_clk_get;
 824         }
 825
 826         ctx->lcd_clk = clk_get(dev, "sclk_fimd");
 827         if (IS_ERR(ctx->lcd_clk)) {
 828                 dev_err(dev, "failed to get lcd clock\n");
 829                 ret = PTR_ERR(ctx->lcd_clk);
 830                 goto err_bus_clk;
 831         }
 832
 833         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 834
 835         ctx->regs = devm_request_and_ioremap(&pdev->dev, res);
 836         if (!ctx->regs) {
 837                 dev_err(dev, "failed to map registers\n");
 838                 ret = -ENXIO;
 839                 goto err_clk;
 840         }
 841
 842         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 843         if (!res) {
 844                 dev_err(dev, "irq request failed.\n");
 845                 goto err_clk;
 846         }
 847
 848         ctx->irq = res->start;
 849
 850         ret = devm_request_irq(&pdev->dev, ctx->irq, fimd_irq_handler,
 851                                                         0, "drm_fimd", ctx);
 852         if (ret) {
 853                 dev_err(dev, "irq request failed.\n");
 854                 goto err_clk;
 855         }
 856
 857         ctx->vidcon0 = pdata->vidcon0;
 858         ctx->vidcon1 = pdata->vidcon1;
 859         ctx->default_win = pdata->default_win;
 860         ctx->panel = panel;
 861
 862         subdrv = &ctx->subdrv;
 863
 864         subdrv->dev = dev;
 865         subdrv->manager = &fimd_manager;
 866         subdrv->probe = fimd_subdrv_probe;
 867         subdrv->remove = fimd_subdrv_remove;
 868
 869         mutex_init(&ctx->lock);
 870
 871         platform_set_drvdata(pdev, ctx);
 872
 873         pm_runtime_enable(dev);
 874         pm_runtime_get_sync(dev);
 875
 876         ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing);
 877         panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
 878
 879         DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n",
 880                         panel->timing.pixclock, ctx->clkdiv);
 881
 882         for (win = 0; win < WINDOWS_NR; win++)
 883                 fimd_clear_win(ctx, win);
 884
 885         exynos_drm_subdrv_register(subdrv);
 886
 887         return 0;
 888
 889 err_clk:
 890         clk_disable(ctx->lcd_clk);
 891         clk_put(ctx->lcd_clk);
 892
 893 err_bus_clk:
 894         clk_disable(ctx->bus_clk);
 895         clk_put(ctx->bus_clk);
 896
 897 err_clk_get:
 898         return ret;
 899 }
 900
 901 static int __devexit fimd_remove(struct platform_device *pdev)
 902 {
 903         struct device *dev = &pdev->dev;
 904         struct fimd_context *ctx = platform_get_drvdata(pdev);
 905
 906         DRM_DEBUG_KMS("%s\n", __FILE__);
 907
 908         exynos_drm_subdrv_unregister(&ctx->subdrv);
 909
 910         if (ctx->suspended)
 911                 goto out;
 912
 913         clk_disable(ctx->lcd_clk);
 914         clk_disable(ctx->bus_clk);
 915
 916         pm_runtime_set_suspended(dev);
 917         pm_runtime_put_sync(dev);
 918
 919 out:
 920         pm_runtime_disable(dev);
 921
 922         clk_put(ctx->lcd_clk);
 923         clk_put(ctx->bus_clk);
 924
 925         return 0;
 926 }
 927
 928 #ifdef CONFIG_PM_SLEEP
 929 static int fimd_suspend(struct device *dev)
 930 {
 931         struct fimd_context *ctx = get_fimd_context(dev);
 932
 933         if (pm_runtime_suspended(dev))
 934                 return 0;
 935
 936         /*
 937          * do not use pm_runtime_suspend(). if pm_runtime_suspend() is
 938          * called here, an error would be returned by that interface
 939          * because the usage_count of pm runtime is more than 1.
 940          */
 941         return fimd_power_on(ctx, false);
 942 }
 943
 944 static int fimd_resume(struct device *dev)
 945 {
 946         struct fimd_context *ctx = get_fimd_context(dev);
 947
 948         /*
 949          * if entered to sleep when lcd panel was on, the usage_count
 950          * of pm runtime would still be 1 so in this case, fimd driver
 951          * should be on directly not drawing on pm runtime interface.
 952          */
 953         if (!pm_runtime_suspended(dev))
 954                 return fimd_power_on(ctx, true);
 955
 956         return 0;
 957 }
 958 #endif
 959
 960 #ifdef CONFIG_PM_RUNTIME
 961 static int fimd_runtime_suspend(struct device *dev)
 962 {
 963         struct fimd_context *ctx = get_fimd_context(dev);
 964
 965         DRM_DEBUG_KMS("%s\n", __FILE__);
 966
 967         return fimd_power_on(ctx, false);
 968 }
 969
 970 static int fimd_runtime_resume(struct device *dev)
 971 {
 972         struct fimd_context *ctx = get_fimd_context(dev);
 973
 974         DRM_DEBUG_KMS("%s\n", __FILE__);
 975
 976         return fimd_power_on(ctx, true);
 977 }
 978 #endif
 979
 980 static const struct dev_pm_ops fimd_pm_ops = {
 981         SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume)
 982         SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL)
 983 };
 984
 985 struct platform_driver fimd_driver = {
 986         .probe          = fimd_probe,
 987         .remove         = __devexit_p(fimd_remove),
 988         .driver         = {
 989                 .name   = "exynos4-fb",
 990                 .owner  = THIS_MODULE,
 991                 .pm     = &fimd_pm_ops,
 992         },
 993 };