arch/arm/mach-imx/imx51-dt.c

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/irq.h>
  14 #include <linux/of_irq.h>
  15 #include <linux/of_platform.h>
  16 #include <asm/mach/arch.h>
  17 #include <asm/mach/time.h>
  18 #include <mach/common.h>
  19 #include <mach/mx51.h>
  20
  21 /*
  22  * Lookup table for attaching a specific name and platform_data pointer to
  23  * devices as they get created by of_platform_populate().  Ideally this table
  24  * would not exist, but the current clock implementation depends on some devices
  25  * having a specific name.
  26  */
  27 static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
  28         OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART1_BASE_ADDR, "imx21-uart.0", NULL),
  29         OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART2_BASE_ADDR, "imx21-uart.1", NULL),
  30         OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART3_BASE_ADDR, "imx21-uart.2", NULL),
  31         OF_DEV_AUXDATA("fsl,imx51-fec", MX51_FEC_BASE_ADDR, "imx27-fec.0", NULL),
  32         OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx51.0", NULL),
  33         OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx51.1", NULL),
  34         OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx51.2", NULL),
  35         OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx51.3", NULL),
  36         OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
  37         OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
  38         OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
  39         OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
  40         OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
  41         OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL),
  42         OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
  43         { /* sentinel */ }
  44 };
  45
  46 static void __init imx51_dt_init(void)
  47 {
  48         of_platform_populate(NULL, of_default_bus_match_table,
  49                              imx51_auxdata_lookup, NULL);
  50 }
  51
  52 static void __init imx51_timer_init(void)
  53 {
  54         mx51_clocks_init_dt();
  55 }
  56
  57 static struct sys_timer imx51_timer = {
  58         .init = imx51_timer_init,
  59 };
  60
  61 static const char *imx51_dt_board_compat[] __initdata = {
  62         "fsl,imx51",
  63         NULL
  64 };
  65
  66 DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
  67         .map_io         = mx51_map_io,
  68         .init_early     = imx51_init_early,
  69         .init_irq       = mx51_init_irq,
  70         .handle_irq     = imx51_handle_irq,
  71         .timer          = &imx51_timer,
  72         .init_machine   = imx51_dt_init,
  73         .init_late      = imx51_init_late,
  74         .dt_compat      = imx51_dt_board_compat,
  75         .restart        = mxc_restart,
  76 MACHINE_END