+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
\r
\r
+#include "Std_Types.h"\r
#include "Dio.h"\r
+#include "Det.h"\r
+#include <string.h>\r
#include "stm32f10x_gpio.h"\r
\r
typedef GPIO_TypeDef* GPIO_TypeDefPtr;\r
const GPIO_TypeDefPtr GPIO_ports[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF };\r
\r
-Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId) {\r
- int pin = channelId % 16;\r
+#define DIO_GET_PORT_FROM_CHANNEL_ID(_channelId) (_channelId / 16)\r
+#define DIO_GET_BIT_FROM_CHANNEL_ID(_channelId) (1 << (_channelId % 16))\r
+\r
+#if ( DIO_VERSION_INFO_API == STD_ON )\r
+static Std_VersionInfoType _Dio_VersionInfo =\r
+{\r
+ .vendorID = (uint16)1,\r
+ .moduleID = (uint16)1,\r
+ .instanceID = (uint8)1,\r
+ .sw_major_version = (uint8)DIO_SW_MAJOR_VERSION,\r
+ .sw_minor_version = (uint8)DIO_SW_MINOR_VERSION,\r
+ .sw_patch_version = (uint8)DIO_SW_PATCH_VERSION,\r
+ .ar_major_version = (uint8)DIO_AR_MAJOR_VERSION,\r
+ .ar_minor_version = (uint8)DIO_AR_MINOR_VERSION,\r
+ .ar_patch_version = (uint8)DIO_AR_PATCH_VERSION,\r
+};\r
+#endif\r
+\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+static int Channel_Config_Contains(Dio_ChannelType channelId)\r
+{\r
+ Dio_ChannelType* ch_ptr=(Dio_ChannelType*)CHANNEL_PTR;\r
+ int rv=0;\r
+ while (DIO_END_OF_LIST!=*ch_ptr)\r
+ {\r
+ if (*ch_ptr==channelId)\r
+ {\r
+ rv=1;\r
+ break;\r
+ }\r
+ ch_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+static int Port_Config_Contains(Dio_PortType portId)\r
+{\r
+ Dio_PortType* port_ptr=(Dio_PortType*)PORT_PTR;\r
+ int rv=0;\r
+ while (DIO_END_OF_LIST!=*port_ptr)\r
+ {\r
+ if (*port_ptr==portId)\r
+ { rv=1; break;}\r
+ port_ptr++;\r
+ }\r
+ return rv;\r
+}\r
\r
- uint16_t port_index = channelId / 16;\r
+static int Channel_Group_Config_Contains(const Dio_ChannelGroupType* _channelGroupIdPtr)\r
+{\r
+ Dio_ChannelGroupType* chGrp_ptr=(Dio_ChannelGroupType*)CHANNEL_GRP_PTR;\r
+ int rv=0;\r
\r
- return (Dio_LevelType) GPIO_ReadInputDataBit(GPIO_ports[port_index], 1<<pin);\r
+ while (DIO_END_OF_LIST!=chGrp_ptr->port)\r
+ {\r
+ if (chGrp_ptr->port==_channelGroupIdPtr->port&&\r
+ chGrp_ptr->offset==_channelGroupIdPtr->offset&&\r
+ chGrp_ptr->mask==_channelGroupIdPtr->mask)\r
+ { rv=1; break;}\r
+ chGrp_ptr++;\r
+ }\r
+ return rv;\r
}\r
\r
+#define VALIDATE_CHANNEL(_channelId, _api) \\r
+ if(0==Channel_Config_Contains(channelId)) { \\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_CHANNEL_ID ); \\r
+ level = 0; \\r
+ goto cleanup; \\r
+ }\r
+#define VALIDATE_PORT(_portId, _api)\\r
+ if(0==Port_Config_Contains(_portId)) {\\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_PORT_ID ); \\r
+ level = STD_LOW;\\r
+ goto cleanup;\\r
+ }\r
+#define VALIDATE_CHANNELGROUP(_channelGroupIdPtr, _api)\\r
+ if(0==Channel_Group_Config_Contains(_channelGroupIdPtr)) {\\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_GROUP_ID ); \\r
+ level = STD_LOW;\\r
+ goto cleanup;\\r
+ }\r
+#else\r
+#define VALIDATE_CHANNEL(_channelId, _api)\r
+#define VALIDATE_PORT(_portId, _api)\r
+#define VALIDATE_CHANNELGROUP(_channelGroupIdPtr, _api)\r
+#endif\r
\r
-void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level) {\r
- int pin = channelId % 16;\r
+Dio_PortLevelType Dio_ReadPort(Dio_PortType portId)\r
+{\r
+ Dio_LevelType level = 0;\r
+ VALIDATE_PORT(portId, DIO_READPORT_ID);\r
\r
- uint16_t port_index = channelId / 16;\r
+ level = GPIO_ReadInputData(GPIO_ports[portId]);\r
\r
- GPIO_WriteBit(GPIO_ports[port_index], (1 << pin), level);\r
+ cleanup: return level;\r
}\r
\r
-void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level) {\r
- GPIO_Write(GPIO_ports[portId], level);\r
+void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
+{\r
+ VALIDATE_PORT(portId, DIO_WRITEPORT_ID);\r
+\r
+ GPIO_Write(GPIO_ports[portId], level);\r
+\r
+ cleanup: return;\r
}\r
\r
-/*\r
- * Unimplemented:\r
- *\r
-Dio_PortLevelType Dio_ReadPort(Dio_PortType portId);\r
-Dio_PortLevelType Dio_ReadChannelGroup( const Dio_ChannelGroupType *channelGroupIdPtr );\r
-void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr, Dio_PortLevelType level);\r
-*/\r
+Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId)\r
+{\r
+ Dio_LevelType level;\r
+ VALIDATE_CHANNEL(channelId, DIO_READCHANNEL_ID);\r
+\r
+ Dio_PortLevelType portVal = Dio_ReadPort(DIO_GET_PORT_FROM_CHANNEL_ID(channelId));\r
+ Dio_PortLevelType bit = DIO_GET_BIT_FROM_CHANNEL_ID(channelId);\r
+\r
+ if ((portVal & bit) != STD_LOW){\r
+ level = STD_HIGH;\r
+ } else{\r
+ level = STD_LOW;\r
+ }\r
+\r
+ cleanup: return (level);\r
+}\r
+\r
+void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
+{\r
+ VALIDATE_CHANNEL(channelId, DIO_WRITECHANNEL_ID);\r
+\r
+ Dio_PortLevelType portVal = Dio_ReadPort(DIO_GET_PORT_FROM_CHANNEL_ID(channelId));\r
+ Dio_PortLevelType bit = DIO_GET_BIT_FROM_CHANNEL_ID(channelId);\r
+\r
+ if(level == STD_HIGH){\r
+ portVal |= bit;\r
+ }else{\r
+ portVal &= ~bit;\r
+ }\r
+\r
+ Dio_WritePort(DIO_GET_PORT_FROM_CHANNEL_ID(channelId), portVal);\r
+\r
+ cleanup: return;\r
+}\r
+\r
+\r
+Dio_PortLevelType Dio_ReadChannelGroup(\r
+ const Dio_ChannelGroupType *channelGroupIdPtr)\r
+{\r
+ Dio_LevelType level;\r
+ VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_READCHANNELGROUP_ID);\r
+\r
+ // Get masked values\r
+ level = Dio_ReadPort(channelGroupIdPtr->port) & channelGroupIdPtr->mask;\r
+\r
+ // Shift down\r
+ level = level >> channelGroupIdPtr->offset;\r
+\r
+ cleanup: return level;\r
+}\r
+\r
+void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
+ Dio_PortLevelType level)\r
+{\r
+ VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_WRITECHANNELGROUP_ID);\r
+\r
+ // Shift up and apply mask so that no unwanted bits are affected\r
+ level = (level << channelGroupIdPtr->offset) & channelGroupIdPtr->mask;\r
+\r
+ // Read port and clear out masked bits\r
+ Dio_PortLevelType portVal = Dio_ReadPort(channelGroupIdPtr->port) & (~channelGroupIdPtr->mask);\r
+\r
+ // Or in the upshifted masked level\r
+ portVal |= level;\r
+\r
+ Dio_WritePort(channelGroupIdPtr->port, portVal);\r
+\r
+ cleanup: return;\r
+}\r
+\r
+#if (DIO_VERSION_INFO_API == STD_ON)\r
+void Dio_GetVersionInfo(Std_VersionInfoType *versionInfo)\r
+{\r
+ memcpy(versionInfo, &_Dio_VersionInfo, sizeof(Std_VersionInfoType));\r
+}\r
+#endif\r
+\r
+\r
#ifndef DIO_CFG_H_\r
#define DIO_CFG_H_\r
\r
-#define DIO_CHANNEL_A0 0\r
-#define DIO_CHANNEL_A1 1\r
-#define DIO_CHANNEL_A2 2\r
-#define DIO_CHANNEL_A3 3\r
-#define DIO_CHANNEL_A4 4\r
-#define DIO_CHANNEL_A5 5\r
-#define DIO_CHANNEL_A6 6\r
-#define DIO_CHANNEL_A7 7\r
-#define DIO_CHANNEL_A8 8\r
-#define DIO_CHANNEL_A9 9\r
-#define DIO_CHANNEL_A10 10\r
-#define DIO_CHANNEL_A11 11\r
-#define DIO_CHANNEL_A12 12\r
-#define DIO_CHANNEL_A13 13\r
-#define DIO_CHANNEL_A14 14\r
-#define DIO_CHANNEL_A15 15\r
-#define DIO_CHANNEL_B0 16\r
-#define DIO_CHANNEL_B1 17\r
-#define DIO_CHANNEL_B2 18\r
-#define DIO_CHANNEL_B3 19\r
-#define DIO_CHANNEL_B4 20\r
-#define DIO_CHANNEL_B5 21\r
-#define DIO_CHANNEL_B6 22\r
-#define DIO_CHANNEL_B7 23\r
-#define DIO_CHANNEL_B8 24\r
-#define DIO_CHANNEL_B9 25\r
-#define DIO_CHANNEL_B10 26\r
-#define DIO_CHANNEL_B11 27\r
-#define DIO_CHANNEL_B12 28\r
-#define DIO_CHANNEL_B13 29\r
-#define DIO_CHANNEL_B14 30\r
-#define DIO_CHANNEL_B15 31\r
-#define DIO_CHANNEL_C0 32\r
-#define DIO_CHANNEL_C1 33\r
-#define DIO_CHANNEL_C2 34\r
-#define DIO_CHANNEL_C3 35\r
-#define DIO_CHANNEL_C4 36\r
-#define DIO_CHANNEL_C5 37\r
-#define DIO_CHANNEL_C6 38\r
-#define DIO_CHANNEL_C7 39\r
-#define DIO_CHANNEL_C8 40\r
-#define DIO_CHANNEL_C9 41\r
-#define DIO_CHANNEL_C10 42\r
-#define DIO_CHANNEL_C11 43\r
-#define DIO_CHANNEL_C12 44\r
-#define DIO_CHANNEL_C13 45\r
-#define DIO_CHANNEL_C14 46\r
-#define DIO_CHANNEL_C15 47\r
-#define DIO_CHANNEL_D0 48\r
-#define DIO_CHANNEL_D1 49\r
-#define DIO_CHANNEL_D2 50\r
-#define DIO_CHANNEL_D3 51\r
-#define DIO_CHANNEL_D4 52\r
-#define DIO_CHANNEL_D5 53\r
-#define DIO_CHANNEL_D6 54\r
-#define DIO_CHANNEL_D7 55\r
-#define DIO_CHANNEL_D8 56\r
-#define DIO_CHANNEL_D9 57\r
-#define DIO_CHANNEL_D10 58\r
-#define DIO_CHANNEL_D11 59\r
-#define DIO_CHANNEL_D12 60\r
-#define DIO_CHANNEL_D13 61\r
-#define DIO_CHANNEL_D14 62\r
-#define DIO_CHANNEL_D15 63\r
-#define DIO_CHANNEL_E0 64\r
-#define DIO_CHANNEL_E1 65\r
-#define DIO_CHANNEL_E2 66\r
-#define DIO_CHANNEL_E3 67\r
-#define DIO_CHANNEL_E4 68\r
-#define DIO_CHANNEL_E5 69\r
-#define DIO_CHANNEL_E6 70\r
-#define DIO_CHANNEL_E7 71\r
-#define DIO_CHANNEL_E8 72\r
-#define DIO_CHANNEL_E9 73\r
-#define DIO_CHANNEL_E10 74\r
-#define DIO_CHANNEL_E11 75\r
-#define DIO_CHANNEL_E12 76\r
-#define DIO_CHANNEL_E13 77\r
-#define DIO_CHANNEL_E14 78\r
-#define DIO_CHANNEL_E15 79\r
-#define DIO_CHANNEL_F0 80\r
-#define DIO_CHANNEL_F1 81\r
-#define DIO_CHANNEL_F2 82\r
-#define DIO_CHANNEL_F3 83\r
-#define DIO_CHANNEL_F4 84\r
-#define DIO_CHANNEL_F5 85\r
-#define DIO_CHANNEL_F6 86\r
-#define DIO_CHANNEL_F7 87\r
-#define DIO_CHANNEL_F8 88\r
-#define DIO_CHANNEL_F9 89\r
-#define DIO_CHANNEL_F10 90\r
-#define DIO_CHANNEL_F11 91\r
-#define DIO_CHANNEL_F12 92\r
-#define DIO_CHANNEL_F13 93\r
-#define DIO_CHANNEL_F14 94\r
-#define DIO_CHANNEL_F15 95\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+#define DIO_END_OF_LIST -1\r
\r
+/** @name DIO channels\r
+ * HW specific dio channels.\r
+ */\r
+// Pin Name GPIO(PCR)Num\r
+//@{\r
+//* req DIO015 */\r
+//* req DIO017 */\r
+typedef enum\r
+{\r
+ DIO_CHANNEL_A0,\r
+ DIO_CHANNEL_A1,\r
+ DIO_CHANNEL_A2,\r
+ DIO_CHANNEL_A3,\r
+ DIO_CHANNEL_A4,\r
+ DIO_CHANNEL_A5,\r
+ DIO_CHANNEL_A6,\r
+ DIO_CHANNEL_A7,\r
+ DIO_CHANNEL_A8,\r
+ DIO_CHANNEL_A9,\r
+ DIO_CHANNEL_A10,\r
+ DIO_CHANNEL_A11,\r
+ DIO_CHANNEL_A12,\r
+ DIO_CHANNEL_A13,\r
+ DIO_CHANNEL_A14,\r
+ DIO_CHANNEL_A15,\r
+\r
+ DIO_CHANNEL_B0,\r
+ DIO_CHANNEL_B1,\r
+ DIO_CHANNEL_B2,\r
+ DIO_CHANNEL_B3,\r
+ DIO_CHANNEL_B4,\r
+ DIO_CHANNEL_B5,\r
+ DIO_CHANNEL_B6,\r
+ DIO_CHANNEL_B7,\r
+ DIO_CHANNEL_B8,\r
+ DIO_CHANNEL_B9,\r
+ DIO_CHANNEL_B10,\r
+ DIO_CHANNEL_B11,\r
+ DIO_CHANNEL_B12,\r
+ DIO_CHANNEL_B13,\r
+ DIO_CHANNEL_B14,\r
+ DIO_CHANNEL_B15,\r
+\r
+ DIO_CHANNEL_C0,\r
+ DIO_CHANNEL_C1,\r
+ DIO_CHANNEL_C2,\r
+ DIO_CHANNEL_C3,\r
+ DIO_CHANNEL_C4,\r
+ DIO_CHANNEL_C5,\r
+ DIO_CHANNEL_C6,\r
+ DIO_CHANNEL_C7,\r
+ DIO_CHANNEL_C8,\r
+ DIO_CHANNEL_C9,\r
+ DIO_CHANNEL_C10,\r
+ DIO_CHANNEL_C11,\r
+ DIO_CHANNEL_C12,\r
+ DIO_CHANNEL_C13,\r
+ DIO_CHANNEL_C14,\r
+ DIO_CHANNEL_C15,\r
+\r
+ DIO_CHANNEL_D0,\r
+ DIO_CHANNEL_D1,\r
+ DIO_CHANNEL_D2,\r
+ DIO_CHANNEL_D3,\r
+ DIO_CHANNEL_D4,\r
+ DIO_CHANNEL_D5,\r
+ DIO_CHANNEL_D6,\r
+ DIO_CHANNEL_D7,\r
+ DIO_CHANNEL_D8,\r
+ DIO_CHANNEL_D9,\r
+ DIO_CHANNEL_D10,\r
+ DIO_CHANNEL_D11,\r
+ DIO_CHANNEL_D12,\r
+ DIO_CHANNEL_D13,\r
+ DIO_CHANNEL_D14,\r
+ DIO_CHANNEL_D15,\r
+\r
+ DIO_CHANNEL_E0,\r
+ DIO_CHANNEL_E1,\r
+ DIO_CHANNEL_E2,\r
+ DIO_CHANNEL_E3,\r
+ DIO_CHANNEL_E4,\r
+ DIO_CHANNEL_E5,\r
+ DIO_CHANNEL_E6,\r
+ DIO_CHANNEL_E7,\r
+ DIO_CHANNEL_E8,\r
+ DIO_CHANNEL_E9,\r
+ DIO_CHANNEL_E10,\r
+ DIO_CHANNEL_E11,\r
+ DIO_CHANNEL_E12,\r
+ DIO_CHANNEL_E13,\r
+ DIO_CHANNEL_E14,\r
+ DIO_CHANNEL_E15,\r
+\r
+ DIO_CHANNEL_F0,\r
+ DIO_CHANNEL_F1,\r
+ DIO_CHANNEL_F2,\r
+ DIO_CHANNEL_F3,\r
+ DIO_CHANNEL_F4,\r
+ DIO_CHANNEL_F5,\r
+ DIO_CHANNEL_F6,\r
+ DIO_CHANNEL_F7,\r
+ DIO_CHANNEL_F8,\r
+ DIO_CHANNEL_F9,\r
+ DIO_CHANNEL_F10,\r
+ DIO_CHANNEL_F11,\r
+ DIO_CHANNEL_F12,\r
+ DIO_CHANNEL_F13,\r
+ DIO_CHANNEL_F14,\r
+ DIO_CHANNEL_F15,\r
+\r
+} Dio_ChannelType;\r
+//@}\r
+\r
+/** HW specific DIO port definitions. */\r
+/** @req DIO018 */\r
+/** @req DIO020 */\r
typedef enum {\r
- Dio_PortA,\r
- Dio_PortB,\r
- Dio_PortC,\r
- Dio_PortD,\r
- Dio_PortE,\r
-} Dio_PortType2;\r
+ DIO_PORT_A,\r
+ DIO_PORT_B,\r
+ DIO_PORT_C,\r
+ DIO_PORT_D,\r
+ DIO_PORT_E,\r
+ DIO_PORT_F,\r
+} Dio_PortType;\r
+\r
+/** @req DIO021 */\r
+/** @req DIO022 */\r
+typedef struct\r
+{\r
+ Dio_PortType port;\r
+ uint16 offset;\r
+ uint16 mask;\r
+} Dio_ChannelGroupType;\r
+\r
+/** @req DIO023 */\r
+typedef uint16 Dio_LevelType;\r
+\r
+/** @req DIO024 */\r
+typedef uint16 Dio_PortLevelType;\r
+\r
+#define LED_CHANNEL (DIO_CHANNEL_B13)\r
+\r
+#define LED_PORT (DIO_PORT_B)\r
+\r
+#define LED_GROUP (&DioConfigData[0])\r
+\r
+// Channels\r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+#define CHANNEL_PTR (&DioChannelConfigData)\r
+\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+#define PORT_PTR (&DioPortConfigData)\r
+\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+#define CHANNEL_GRP_PTR (&DioConfigData)\r
\r
#endif /* DIO_CFG_H_ */\r
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
-\r
+#include "Dio.h"\r
#include "Dio_Cfg.h"\r
\r
+const Dio_ChannelType DioChannelConfigData[] =\r
+{\r
+ LED_CHANNEL,\r
+ DIO_END_OF_LIST,\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] =\r
+{\r
+ LED_PORT,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] =\r
+{\r
+ { .port = DIO_PORT_B, .offset = 7, .mask = 0x80, },\r
+ { .port = DIO_END_OF_LIST, .offset = DIO_END_OF_LIST, .mask = DIO_END_OF_LIST, },\r
+};\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
* for more details.
* -------------------------------- Arctic Core ------------------------------*/
+#ifndef DIO_H_
+#define DIO_H_
+#include "Std_Types.h" /** @req DIO131 */
+// API Service ID's
+#define DIO_READCHANNEL_ID 0x00
+#define DIO_WRITECHANNEL_ID 0x01
+#define DIO_READPORT_ID 0x02
+#define DIO_WRITEPORT_ID 0x03
+#define DIO_READCHANNELGROUP_ID 0x04
+#define DIO_WRITECHANNELGROUP_ID 0x05
+#define DIO_GETVERSIONINFO_ID 0x12
-
-
-
-
-#ifndef DIO_H_\r
-#define DIO_H_\r
-\r
-#include "Std_Types.h"\r
-\r
-// API Service ID's\r
-#define DIO_READCHANNEL_ID 0x00\r
-#define DIO_WRITECHANNEL_ID 0x01\r
-#define DIO_READPORT_ID 0x02\r
-#define DIO_WRITEPORT_ID 0x03\r
-#define DIO_READCHANNELGROUP_ID 0x04\r
-#define DIO_WRITECHANNELGROUP_ID 0x05\r
-#define DIO_GETVERSIONINFO_ID 0x12\r
-\r
-#define DIO_E_PARAM_INVALID_CHANNEL_ID 10\r
-#define DIO_E_PARAM_INVALID_PORT_ID 20\r
-#define DIO_E_PARAM_INVALID_GROUP_ID 31\r
-\r
-typedef uint32 Dio_ChannelType;\r
-typedef uint32 Dio_PortType;\r
-typedef struct\r
-{\r
- Dio_PortType port;\r
- uint8 offset;\r
- uint32 mask;\r
-} Dio_ChannelGroupType;\r
-\r
-#if 0 // Gone from 3.0\r
-typedef enum\r
-{\r
- STD_LOW,\r
- STD_HIGH,\r
-}Dio_LevelType;\r
-#endif\r
-\r
-typedef uint32 Dio_LevelType;\r
-\r
-typedef uint16 Dio_PortLevelType;\r
+#define DIO_E_PARAM_INVALID_CHANNEL_ID 10
+#define DIO_E_PARAM_INVALID_PORT_ID 20
+#define DIO_E_PARAM_INVALID_GROUP_ID 31
#define DIO_SW_MAJOR_VERSION 1
#define DIO_SW_MINOR_VERSION 0
#define DIO_AR_MAJOR_VERSION 2
#define DIO_AR_MINOR_VERSION 2
#define DIO_AR_PATCH_VERSION 1
-\r
-#include "Dio_Cfg.h"\r
-\r
-#if ( DIO_VERSION_INFO_API == STD_ON)\r
-void Dio_GetVersionInfo( Std_VersionInfoType *versionInfo );\r
-#endif\r
-\r
-Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId);\r
-void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level);\r
-Dio_PortLevelType Dio_ReadPort(Dio_PortType portId);\r
-void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level);\r
-Dio_PortLevelType Dio_ReadChannelGroup( const Dio_ChannelGroupType *channelGroupIdPtr );\r
-void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr, Dio_PortLevelType level);\r
-\r
-#endif /*DIO_H_*/\r
+#include "Dio_Cfg.h"
+
+/** @req DIO124 */
+#if ( DIO_VERSION_INFO_API == STD_ON)
+/** @req DIO139 */
+void Dio_GetVersionInfo( Std_VersionInfoType *versionInfo );
+#endif
+
+/** @req DIO133 */
+/** @req DIO027 */
+Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId);
+/** @req DIO134 */
+void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level);
+
+/** @req DIO135 */
+/** @req DIO031 */
+Dio_PortLevelType Dio_ReadPort(Dio_PortType portId);
+/** @req DIO136 */
+void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level);
+
+/** @req DIO137 */
+Dio_PortLevelType Dio_ReadChannelGroup( const Dio_ChannelGroupType *channelGroupIdPtr );
+/** @req DIO138 */
+void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr, Dio_PortLevelType level);
+
+#endif /*DIO_H_*/
projects / arc.git / commitdiff