//VALIDATE( ( McuMode <= Mcu_Global.config->McuNumberOfMcuModes ), MCU_SETMODE_SERVICE_ID, MCU_E_PARAM_MODE );\r
(void) McuMode;\r
\r
- /* NOT SUPPORTED */\r
}\r
\r
//-------------------------------------------------------------------\r
// ( we are reading directly from flash so it makes no sense )\r
memcpy( (void *)Fls_Global.ramAddr, (void *) Fls_Global.flashAddr,\r
Fls_Global.length);\r
+ if( Os_EccError ) {\r
+\r
+\r
+ }\r
Fls_Global.jobResultType = MEMIF_JOB_OK;\r
Fls_Global.status = MEMIF_IDLE;\r
Fls_Global.jobType = FLS_JOB_NONE;\r
\r
#if ( GPT_WAKEUP_FUNCTIONALITY_API == STD_ON )\r
\r
- void Gpt_SetMode(Gpt_ModeType mode)\r
- {\r
- int i;\r
+void Gpt_SetMode(Gpt_ModeType mode)\r
+{\r
+ int i;\r
\r
- VALIDATE( (Gpt_Global.initRun == STD_ON), GPT_SETMODE_SERVIVCE_ID, GPT_E_UNINIT );\r
- VALIDATE( ( mode <= GPT_MODE_SLEEP ), GPT_SETMODE_SERVIVCE_ID, GPT_E_PARAM_MODE );\r
+ VALIDATE( (Gpt_Global.initRun == STD_ON), GPT_SETMODE_SERVIVCE_ID, GPT_E_UNINIT );\r
+ VALIDATE( ( mode <= GPT_MODE_SLEEP ), GPT_SETMODE_SERVIVCE_ID, GPT_E_PARAM_MODE );\r
\r
#if defined(CFG_MPC560X)\r
- if (mode == GPT_MODE_NORMAL)\r
- {\r
- PIT.PITMCR.B.MDIS = 0;\r
- // Do NOT restart channels\r
- }\r
- else if (mode == GPT_MODE_SLEEP)\r
+ if (mode == GPT_MODE_NORMAL)\r
+ {\r
+ PIT.PITMCR.B.MDIS = 0;\r
+ // Do NOT restart channels\r
+ }\r
+ else if (mode == GPT_MODE_SLEEP)\r
+ {\r
+ PIT.PITMCR.B.MDIS = 0;\r
+ // Disable all but RTI\r
+ for (i= 0; i <= GPT_CHANNEL_PIT_LAST; i++)\r
{\r
- PIT.PITMCR.B.MDIS = 0;\r
- // Disable all but RTI\r
- for (i= 0; i <= GPT_CHANNEL_PIT_LAST; i++)\r
- {\r
- Gpt_StopTimer(i);\r
- }\r
+ Gpt_StopTimer(i);\r
}\r
+ }\r
#else\r
- if (mode == GPT_MODE_NORMAL)\r
- {\r
- PIT.CTRL.B.MDIS = 0;\r
- // Do NOT restart channels\r
- }\r
- else if (mode == GPT_MODE_SLEEP)\r
- {\r
-\r
- PIT.CTRL.B.MDIS = 1;\r
- // Disable all but RTI\r
- for (i= 0; i <= GPT_CHANNEL_PIT_LAST; i++)\r
- {\r
- Gpt_StopTimer(i);\r
- }\r
- }\r
-#endif\r
+ if (mode == GPT_MODE_NORMAL)\r
+ {\r
+ PIT.CTRL.B.MDIS = 0;\r
+ // Do NOT restart channels\r
}\r
-\r
- void Gpt_DisableWakeup(Gpt_ChannelType channel)\r
+ else if (mode == GPT_MODE_SLEEP)\r
{\r
- VALIDATE( (Gpt_Global.initRun == STD_ON), GPT_DISABLEWAKEUP_SERVICE_ID, GPT_E_UNINIT );\r
- VALIDATE( VALID_CHANNEL(channel), GPT_DISABLEWAKEUP_SERVICE_ID, GPT_E_PARAM_CHANNEL );\r
- // Only RTI have system wakeup\r
- if (channel == GPT_CHANNEL_RTI)\r
- {\r
- Gpt_Global.wakeupEnabled = STD_OFF;\r
- }\r
- else\r
+\r
+ PIT.CTRL.B.MDIS = 1;\r
+ // Disable all but RTI\r
+ for (i= 0; i <= GPT_CHANNEL_PIT_LAST; i++)\r
{\r
- // TODO:\r
- //assert(0);\r
+ Gpt_StopTimer(i);\r
}\r
}\r
+#endif\r
+}\r
\r
- void Gpt_EnableWakeup(Gpt_ChannelType channel)\r
+void Gpt_DisableWakeup(Gpt_ChannelType channel)\r
+{\r
+ VALIDATE( (Gpt_Global.initRun == STD_ON), GPT_DISABLEWAKEUP_SERVICE_ID, GPT_E_UNINIT );\r
+ VALIDATE( VALID_CHANNEL(channel), GPT_DISABLEWAKEUP_SERVICE_ID, GPT_E_PARAM_CHANNEL );\r
+ // Only RTI have system wakeup\r
+ if (channel == GPT_CHANNEL_RTI)\r
{\r
- VALIDATE( (Gpt_Global.initRun == STD_ON), GPT_ENABLEWAKEUP_SERVICE_ID, GPT_E_UNINIT );\r
- VALIDATE( VALID_CHANNEL(channel),GPT_ENABLEWAKEUP_SERVICE_ID, GPT_E_PARAM_CHANNEL );\r
- if (channel == GPT_CHANNEL_RTI)\r
- {\r
- Gpt_Global.wakeupEnabled = STD_ON;\r
- }\r
- else\r
- {\r
- // TODO:\r
- //assert(0);\r
- }\r
+ Gpt_Global.wakeupEnabled = STD_OFF;\r
}\r
-\r
- void Gpt_Cbk_CheckWakeup(EcuM_WakeupSourceType wakeupSource)\r
+ else\r
{\r
+ // TODO:\r
+ //assert(0);\r
+ }\r
+}\r
\r
+void Gpt_EnableWakeup(Gpt_ChannelType channel)\r
+{\r
+ VALIDATE( (Gpt_Global.initRun == STD_ON), GPT_ENABLEWAKEUP_SERVICE_ID, GPT_E_UNINIT );\r
+ VALIDATE( VALID_CHANNEL(channel),GPT_ENABLEWAKEUP_SERVICE_ID, GPT_E_PARAM_CHANNEL );\r
+ if (channel == GPT_CHANNEL_RTI)\r
+ {\r
+ Gpt_Global.wakeupEnabled = STD_ON;\r
+ }\r
+ else\r
+ {\r
+ // TODO:\r
+ //assert(0);\r
}\r
+}\r
+\r
+void Gpt_Cbk_CheckWakeup(EcuM_WakeupSourceType wakeupSource)\r
+{\r
+\r
+}\r
\r
#endif\r
\r
\r
//-------------------------------------------------------------------\r
\r
-void Mcu_SetMode(const Mcu_ModeType McuMode)\r
+/**\r
+ *\r
+ * Application Notes!\r
+ * - AN3584, "MPC5510 Family Low Power Features"\r
+ * Since it's not complete also check MPC5668\r
+ * - AN4150 , "Using Sleep Mode on the MPC5668x" and it's code\r
+ *\r
+ *\r
+ * @param LPM\r
+ */\r
+static void enterLowPower (Mcu_ModeType mcuMode )\r
+{\r
+ uint32 timeout;\r
+ /* Set the sleep bit; following a WAIT instruction, the device will go to sleep */\r
+ CRP.PSCR.B.SLEEP = 1;\r
+ /* enable the 1.2V internal regulator when in sleep mode only */\r
+ CRP.PSCR.B.STOP12EN = 1;\r
+ /* 0x1 8k, 0x2 16k, 0x3 32k, 0x6 64k -- RAMs maintain power */\r
+ CRP.PSCR.B.RAMSEL = 0x7; // Keep all 80K\r
+\r
+ CRP.Z1VEC.R = (uint32)&McuE_LowPowerRecoverFlash;\r
+#if defined(CFG_VLE)\r
+ CRP.VLE = 1;\r
+#endif\r
+\r
+ /* If we "Mcu_Wakeup()" is located in RAM, set FASTREC */\r
+ CRP.RECPRTR.B.FASTREC = 0;\r
+\r
+ /* Halt everything */\r
+ SIU.HLT.R = 0x3FFFFFFF;\r
+ while((SIU.HLTACK.R != 0x3FFFFFFF) && (timeout<3000)) {}\r
+\r
+ /* put Z0 in reset if not used for wakeup */\r
+ CRP.Z0VEC.B.Z0RST = 1;\r
+\r
+ // TODO: Enable_all_internal_pull_devices (PULL_DOWN);\r
+\r
+ /* Save context and execute wait instruction.\r
+ *\r
+ * Things that matter here are\r
+ * - Z1VEC, determines where TLB0 will point. TLB0 is written with a\r
+ * value at startup that 4K aligned to this address.\r
+ * - LowPower_Sleep() will save a interrupt context so we will return\r
+ * intact.\r
+ * - For devices with little RAM we don't want to impose the alignment\r
+ * requirements there. Almost as we have to occupy a 4K block for this..\r
+ * although the code does not take that much space.\r
+ * */\r
+ McuE_EnterLowPower(mcuMode);\r
+\r
+ /* Clear sleep flags to allow pads to operate */\r
+ CRP.PSCR.B.SLEEPF = 0x1;\r
+\r
+\r
+}\r
+\r
+\r
+void Mcu_SetMode( Mcu_ModeType mcuMode)\r
{\r
VALIDATE( ( 1 == Mcu_Global.initRun ), MCU_SETMODE_SERVICE_ID, MCU_E_UNINIT );\r
// VALIDATE( ( McuMode <= Mcu_Global.config->McuNumberOfMcuModes ), MCU_SETMODE_SERVICE_ID, MCU_E_PARAM_MODE );\r
- (void) McuMode;\r
\r
+\r
+#if defined(CFG_MPC5516)\r
+ if( MCU_MODE_RUN == mcuMode ) {\r
+\r
+ } else if( MCU_MODE_SLEEP == mcuMode ) {\r
+ /*\r
+ * Follows the AN3548 from Freescale\r
+ *\r
+ */\r
+#if defined(USE_DMA)\r
+ Dma_StopAll();\r
+#endif\r
+\r
+\r
+ /* Set system clock to 16Mhz IRC */\r
+ SIU.SYSCLK.B.SYSCLKSEL = 0;\r
+\r
+ /* Put flash in low-power mode */\r
+ // TODO\r
+\r
+ /* Put QQADC in low-power mode */\r
+ // TODO\r
+\r
+ /* Set us in SLEEP mode */\r
+ CRP.PSCR.B.SLEEP = 1;\r
+\r
+\r
+ enterLowPower(mcuMode);\r
+ }\r
+#else\r
/* NOT SUPPORTED */\r
+ (void) McuMode;\r
+#endif\r
}\r
\r
//-------------------------------------------------------------------\r
--- /dev/null
+#define _ASSEMBLER_\r
+#include "asm_ppc.h"\r
+\r
+\r
+#if defined(__CWCC__) && defined(CFG_VLE)\r
+.section .text_vle,text_vle\r
+#elif defined(__DCC__)\r
+ // Must be indented (diab)\r
+ .section .text_vle,x\r
+#elif defined(__GNUC__)\r
+.section .text\r
+#endif\r
+\r
+\r
+#define CRP_RECPTR 0xfffec058\r
+\r
+ .global McuE_EnterLowPower\r
+ \r
+McuE_EnterLowPower:\r
+ subi r1, r1, 0x94 // Allocate space on stack 0x94 = 148 r2--r31 + 7 SPRs\r
+ stmw r2, 0(r1) // Save registers r2-r31 to stack\r
+ mfSRR1 r25\r
+ mfSRR0 r26\r
+ mfLR r27\r
+ mfmsr r28\r
+ mfCR r29\r
+ mfXER r30\r
+ mfCTR r31\r
+ stmw r25, 0x78(r1) // Store SPR data to stack\r
+ \r
+ LOAD_ADDR_32(r4,CRP_RECPTR)\r
+ stw r1,0x0(r4) // Save stack pointer to CRP to be preserved during LPM\r
+ \r
+/* Note! You cannot step over the wait instruction with the debugger */ \r
+ \r
+ .long 0x7C00007C // Wait instruction\r
+ \r
+ \r
+ blr\r
+\r
+\r
+/*\r
+ * Low Power Vector...needs to be on 4K + 0xffc\r
+ * We only have 1 instruction before we are outside TLB0 so just jump\r
+ */\r
+#if defined(__GNUC__) \r
+.section ".lowpower_vector","ax"\r
+#elif defined(__CWCC__)\r
+#if defined(CFG_VLE)\r
+.section .lowpower_vector,text_vle\r
+#else\r
+.section .lowpower_vector,4,"rw"\r
+#endif\r
+#elif defined(__DCC__)\r
+ .section .text_vle,x\r
+#endif\r
+\r
+ .global McuE_LowPowerVector\r
+\r
+McuE_LowPowerVector:\r
+ b McuE_LowPowerRecoverFlash\r
+ \r
+\r
+#if defined(__GNUC__) \r
+.section ".lowpower_text","ax"\r
+#elif defined(__CWCC__)\r
+#if defined(CFG_VLE)\r
+.section .lowpower_text,text_vle\r
+#else\r
+.section .lowpower_text,4,"rw"\r
+#endif\r
+#elif defined(__DCC__)\r
+ .section .text_vle,x\r
+#endif\r
+\r
+ .extern EcuM_CheckWakeup\r
+ .global McuE_LowPowerRecoverFlash\r
+\r
+/*\r
+ * When we come back here only TLB0 is setup for flash and then only 4K.\r
+ *\r
+ * Debuggers:\r
+ * - WinIDEA : Hardware->Emulation Options->CPU Setup->MPC55xx->Low Power Debug\r
+ * This will make the debugger stop on the function below.\r
+ * - UDE: No support for this yet. It just runs through the "wait" instruction. \r
+ */ \r
+McuE_LowPowerRecoverFlash:\r
+ \r
+ bl cfg_MMU\r
+ \r
+/* Recover the stack */\r
+ LOAD_ADDR_32(r4,CRP_RECPTR)\r
+ lwz r1,0x0(r4) // Restore stack pointer from CRP\r
+ lmw r25,0x78(r1) // Load SPR values back into GPRs\r
+ mtSRR1 r25\r
+ mtSRR0 r26\r
+ mtLR r27\r
+ mtmsr r28\r
+ mtCR r29\r
+ mtXER r30\r
+ mtCTR r31 // Load SPRs with GPR values\r
+ lmw r2, 0(r1) // Restore GPRs from stack\r
+ addi r1,r1,0x94 // Deallocate space on stack\r
+\r
+#if defined(USE_ECUM)\r
+\r
+ /* We have no idea what made us wakeup, pass all */\r
+ LOAD_ADDR_32(r3,0x3fffffff); // EcuM_WakeupSourceType\r
+ bl EcuM_CheckWakeup\r
+\r
+#endif\r
+\r
+\r
+\r
+ /* branch back to Mcu_SetMode().. */\r
+ blr\r
+ \r
+ \r
+ #if defined(CFG_VLE)\r
+ #define VLE_VAL MAS2_VLE\r
+ #else\r
+ #define VLE_VAL 0\r
+ #endif\r
+\r
+#if defined(CFG_MPC5516)\r
+#define SRAM_START 0x40000000\r
+#define FLASH_START 0x00000000\r
+#define PERIPHERAL_START 0xfff00000\r
+#else\r
+#error No support for this MCU\r
+#endif\r
+\r
+ \r
+ cfg_MMU:\r
+\r
+#***************************************************/\r
+# setup MMU */\r
+#***************************************************/\r
+\r
+#TLB Entry 0 = 1M Internal flash \r
+ LOAD_ADDR_32(5, 0x10000000 + (0<<16))\r
+ mtspr SPR_MAS0,r5 \r
+ LOAD_ADDR_32(5, 0xC0000000 + MAS1_TSIZE_4M )\r
+ mtspr SPR_MAS1,r5 \r
+ LOAD_ADDR_32(5, FLASH_START + VLE_VAL )\r
+ mtspr SPR_MAS2,r5 \r
+ LOAD_ADDR_32(5, FLASH_START + MAS3_FULL_ACCESS )\r
+ mtspr SPR_MAS3,r5\r
+ msync\r
+ isync\r
+ tlbwe\r
+ isync\r
+\r
+\r
+#TLB Entry 1 = Peripheral bridge and BAM\r
+ LOAD_ADDR_32(5, 0x10000000 + (1<<16))\r
+ mtspr SPR_MAS0,r5 \r
+ LOAD_ADDR_32(5, 0xC0000000 + MAS1_TSIZE_1M)\r
+ mtspr SPR_MAS1,r5\r
+ LOAD_ADDR_32(5, PERIPHERAL_START + VLE_VAL + MAS2_I)\r
+ mtspr SPR_MAS2,r5 \r
+ LOAD_ADDR_32(5, PERIPHERAL_START + MAS3_FULL_ACCESS )\r
+ mtspr SPR_MAS3,r5\r
+ msync\r
+ isync\r
+ tlbwe\r
+ isync\r
+\r
+\r
+#TLB Entry 2 = External RAM. Skip this. \r
+\r
+#TLB Entry 3 = Internal SRAM\r
+ LOAD_ADDR_32(5, 0x10000000+(3<<16))\r
+ mtspr SPR_MAS0,r5 \r
+ LOAD_ADDR_32(5, 0xC0000000 + MAS1_TSIZE_256K )\r
+ mtspr SPR_MAS1,r5 \r
+ LOAD_ADDR_32(5, SRAM_START + VLE_VAL )\r
+ mtspr SPR_MAS2,r5 \r
+ LOAD_ADDR_32(5, SRAM_START + MAS3_FULL_ACCESS )\r
+ mtspr SPR_MAS3,r5\r
+ msync\r
+ isync\r
+ tlbwe\r
+ isync\r
+ blr\r
+ \r
+ \r
+\r
+\r
*(.sbss2 .sbss2.* .gnu.linkonce.sb2.*);\r
__TEXT_END = .;\r
} > flash\r
+\r
+#if defined(CFG_MPC5516)\r
+ .McuE_LowPowerRecoverFlash 0x000ff000: {\r
+ *(.lowpower_text);\r
+ }\r
+ .lowpower_vector 0x000ffffc: {\r
+ *(.lowpower_vector);\r
+ }\r
+#endif \r
\r
\r
.data : {\r
obj-$(USE_ECUM) += EcuM.o\r
obj-$(USE_ECUM) += EcuM_Main.o\r
obj-$(USE_ECUM) += EcuM_PBcfg.o\r
+ifneq ($(filter EcuM_Callout_Stubs.o,$(obj-y)),)\r
obj-$(USE_ECUM) += EcuM_Callout_Stubs.o\r
+endif\r
obj-$(USE_ECUM)-$(CFG_ECUM_USE_SERVICE_COMPONENT) += EcuM_ServiceComponent.o\r
inc-$(USE_ECUM) += $(ROOTDIR)/system/EcuM\r
vpath-$(USE_ECUM) += $(ROOTDIR)/system/EcuM\r
# Mcu\r
obj-$(USE_MCU) += Mcu.o\r
obj-$(USE_MCU) += Mcu_Cfg.o\r
+obj-$(USE_MCU) += Mcu_Sleep.o\r
#obj-$(CFG_MPC55XX)-$(USE_MCU) += Mcu_Exceptions.o\r
\r
# Flash\r
obj-$(USE_NVM) += Crc_32.o\r
obj-$(USE_NVM) += Crc_16.o\r
\r
-# SchM\r
+# SchM, always find the include files.\r
inc-y += $(ROOTDIR)/system/SchM\r
vpath-$(USE_SCHM) += $(ROOTDIR)/system/SchM\r
obj-$(USE_SCHM) += SchM.o\r
#endif\r
}\r
\r
-void EcuM_OnEnterRUN(void)\r
+void EcuM_OnEnterRun(void)\r
{\r
\r
}\r
# Memory + Peripherals\r
MOD_AVAIL+=ADC DIO DMA CAN GPT LIN MCU PORT PWM WDG NVM MEMIF FEE FLS SPI EEP \r
# System + Communication + Diagnostic\r
-MOD_AVAIL+=CANIF CANTP LINIF COM DCM DEM DET ECUM IOHWAB KERNEL PDUR WDGM RTE J1939TP\r
+MOD_AVAIL+=CANIF CANTP LINIF COM DCM DEM DET ECUM IOHWAB KERNEL PDUR WDGM WDGIF RTE J1939TP\r
# Network management\r
MOD_AVAIL+=COMM NM CANNM CANSM EA LINSM\r
# Additional\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef WDG_CFG_H_\r
+#define WDG_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "WdgIf_Types.h"\r
+\r
+typedef struct\r
+{\r
+ uint32 ReloadValue;\r
+ uint8 ActivationBit;\r
+}Wdg_SettingsType;\r
+\r
+typedef struct\r
+{\r
+ WdgIf_ModeType Wdg_DefaultMode;\r
+ Wdg_SettingsType WdgSettingsFast;\r
+ Wdg_SettingsType WdgSettingsSlow;\r
+ Wdg_SettingsType WdgSettingsOff;\r
+}Wdg_ModeConfigType;\r
+\r
+typedef struct\r
+{\r
+ const Wdg_GeneralType *Wdg_General;\r
+ const Wdg_ModeConfigType *Wdg_ModeConfig;\r
+}Wdg_ConfigType;\r
+\r
+ extern const Wdg_GeneralType WdgGeneral;\r
+ extern const Wdg_ConfigType WdgConfig;\r
+\r
+#endif /* WDG_CFG_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#include "Wdg.h"\r
+\r
+const Wdg_ModeConfigType WdgModeConfig =\r
+{\r
+ .Wdg_DefaultMode = WDGIF_OFF_MODE,\r
+ .WdgSettingsFast =\r
+ {\r
+ .ReloadValue = 0x200,\r
+ .ActivationBit = 1,\r
+ },\r
+ .WdgSettingsSlow =\r
+ {\r
+ .ReloadValue = 0x7D00,\r
+ .ActivationBit = 1,\r
+ },\r
+ .WdgSettingsOff =\r
+ {\r
+ .ReloadValue = 0x7D00,\r
+ .ActivationBit = 0,\r
+ },\r
+};\r
+\r
+const Wdg_GeneralType WdgGeneral =\r
+{\r
+ .Wdg_Index = 1,\r
+ .Wdg_TriggerLocationPtr = Wdg_Trigger,\r
+ .Wdg_SetModeLocationPtr = Wdg_SetMode,\r
+};\r
+\r
+\r
+const Wdg_ConfigType WdgConfig =\r
+{\r
+ .Wdg_General = &WdgGeneral,\r
+ .Wdg_ModeConfig = &WdgModeConfig,\r
+};\r
+\r
+\r
#define ECUM_AR_MINOR_VERSION 2\r
#define ECUM_AR_PATCH_VERSION 2\r
\r
-#include "EcuM_Types.h"\r
#include "EcuM_Cfg.h"\r
+#include "EcuM_Types.h"\r
#include "EcuM_Cbk.h"\r
\r
#if defined(USE_COM)\r
#include "ComM.h"\r
#endif\r
\r
-\r
/** @name Error Codes */\r
//@{\r
#define ECUM_E_NOT_INITIATED (0x10)\r
#define ECUM_GETAPPMODE_ID (0x11)\r
#define ECUM_SELECT_BOOTARGET_ID (0x12)\r
#define ECUM_GET_BOOTARGET_ID (0x13)\r
+#define ECUM_VALIDATE_WAKEUP_EVENT_ID 0x14\r
#define ECUM_MAINFUNCTION_ID (0x18)\r
#define ECUM_COMM_HASREQUESTEDRUN_ID (0x1b)\r
#define ECUM_ARC_STARTUPTWO_ID (0x20)\r
Std_ReturnType EcuM_GetLastShutdownTarget(EcuM_StateType* shutdownTarget, uint8* sleepMode);\r
\r
EcuM_WakeupSourceType EcuM_GetPendingWakeupEvents(void);\r
-void EcuM_ClearWakeupEvent(EcuM_WakeupSourceType sources);\r
+void EcuM_ClearWakeupEvent(EcuM_WakeupSourceType source );\r
EcuM_WakeupSourceType EcuM_GetValidatedWakeupEvents(void);\r
EcuM_WakeupSourceType EcuM_GetExpiredWakeupEvents(void);\r
EcuM_WakeupStatusType EcuM_GetStatusOfWakeupSource(EcuM_WakeupSourceType sources);\r
\r
void EcuM_MainFunction(void);\r
\r
+\r
#endif /*ECUM_H_*/\r
/** @} */\r
\r
void EcuM_OnRTEStartup(void);\r
\r
-void EcuM_OnEnterRUN(void);\r
+void EcuM_OnEnterRun(void);\r
void EcuM_OnExitRun(void);\r
void EcuM_OnExitPostRun(void);\r
\r
void EcuM_OnGoOffTwo(void);\r
\r
void EcuM_EnableWakeupSources(EcuM_WakeupSourceType wakeupSource);\r
-void Ecum_DisableWakeupSources(EcuM_WakeupSourceType wakeupSource);\r
+void EcuM_DisableWakeupSources(EcuM_WakeupSourceType wakeupSource);\r
\r
void EcuM_GenerateRamHash(void);\r
uint8 EcuM_CheckRamHash(void);\r
\r
void EcuM_AL_SwitchOff(void);\r
-void Ecum_AL_DriverRestart(void);\r
+void EcuM_AL_DriverRestart(void);\r
\r
void EcuM_StartWakeupSources(EcuM_WakeupSourceType wakeupSource);\r
void EcuM_CheckValidation(EcuM_WakeupSourceType wakeupSource);\r
#include "Rte_Type.h"\r
#endif\r
\r
+\r
#if !defined(_DEFINED_TYPEDEF_FOR_EcuM_StateType_)\r
/** Possible states */\r
typedef enum {\r
\r
#endif\r
\r
+\r
#if !defined(_DEFINED_TYPEDEF_FOR_EcuM_UserType_)\r
typedef uint8 EcuM_UserType;\r
\r
#define _DEFINED_TYPEDEF_FOR_EcuM_UserType_\r
#endif\r
\r
+#if 0\r
enum {\r
/** Internal reset of µC (bit 2).\r
* The internal reset typically only resets the µC\r
ECUM_WKSOURCE_RESET = 0x02\r
};\r
\r
+\r
typedef uint32 EcuM_WakeupSourceType;\r
\r
+#endif\r
+\r
typedef enum\r
{\r
ECUM_WKSTATUS_NONE = 0, /**< No pending wakeup event was detected */\r
\r
typedef enum\r
{\r
- ECUM_WWKACT_RUN = 0, /**< Initialization into RUN state */\r
+ ECUM_WKACT_RUN = 0, /**< Initialization into RUN state */\r
ECUM_WKACT_TTII = 2, /**< Execute time triggered increased inoperation protocol and shutdown */\r
ECUM_WKACT_SHUTDOWN = 3 /**< Immediate shutdown */\r
} EcuM_WakeupReactionType;\r
\r
+\r
#if !defined(_DEFINED_TYPEDEF_FOR_EcuM_BootTargetType_)\r
typedef enum\r
{\r
#define _DEFINED_TYPEDEF_FOR_EcuM_BootTargetType_\r
#endif\r
\r
+\r
+#if defined(USE_WDGM)\r
+#include "WdgM.h"\r
+#endif\r
+\r
+#include "Mcu.h"\r
+\r
+#if defined(USE_WDGM)\r
+typedef struct EcuM_WdgM\r
+{\r
+ WdgM_SupervisedEntityIdType EcuMSupervisedEntity;\r
+ WdgM_ModeType EcuMWdgMWakeupMode;\r
+ WdgM_ModeType EcuMWdgMStartupMode;\r
+ WdgM_ModeType EcuMWdgMRunMode;\r
+ WdgM_ModeType EcuMWdgMPostRunMode;\r
+ WdgM_ModeType EcuMWdgMShutdownMode;\r
+} EcuM_WdgMType;\r
+#endif\r
+\r
+typedef struct EcuM_WakeupSourceConfig {\r
+ EcuM_WakeupSourceType EcuMWakeupSourceId;\r
+ uint32 EcuMValidationTimeout;\r
+ Mcu_ResetType EcuMResetReason;\r
+ boolean EcuMWakeupSourcePolling;\r
+ uint8 EcuMComMChannel;\r
+} EcuM_WakeupSourceConfigType;\r
+\r
+typedef struct EcuM_SleepMode\r
+{\r
+ uint8 EcuMSleepModeId;\r
+ EcuM_WakeupSourceType EcuMWakeupSourceMask;\r
+ Mcu_ModeType EcuMSleepModeMcuMode;\r
+#if defined(USE_WDGM)\r
+ WdgM_ModeType EcuMSleepModeWdgMMode;\r
+#endif\r
+ } EcuM_SleepModeType;\r
+\r
+\r
+\r
#endif /* ECUM_TYPES_H_ */\r
/** @} */\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+\r
+/*\r
+ * Include structure:\r
+ *\r
+ *\r
+ * Gpt.h\r
+ * ^\r
+ * |\r
+ * `---------- Gpt_xxx.c ---> Memmap.h\r
+ *\r
+ *\r
+ */\r
+\r
/** @addtogroup Gpt GPT Driver\r
* @{ */\r
\r
#define GPT_H_\r
\r
#include "Std_Types.h"\r
-//#include "EcuM.h" mahi: What for ???\r
+\r
\r
/** @name Error Codes */\r
//@{\r
#define GPT_CBK_CHECKWAKEUP_SERVICE_ID 0x0c\r
//@}\r
\r
-/** Channel id type */\r
-typedef uint8_t Gpt_ChannelType;\r
-\r
/** Channel time value type */\r
typedef uint32_t Gpt_ValueType;\r
\r
GPT_MODE_SLEEP\r
} Gpt_ModeType;\r
\r
+/** Channel id type */\r
+typedef uint8_t Gpt_ChannelType;\r
\r
#define GPT_VENDOR_ID 1\r
#define GPT_MODULE_ID 1\r
#define GPT_AR_MINOR_VERSION 2\r
#define GPT_AR_PATCH_VERSION 1\r
\r
-#include "Gpt_Cfg.h"\r
+//#if (GPT_REPORT_WAKEUP_SOURCE==STD_ON)\r
+#include "EcuM_Cbk.h" /* @req 4.0.3/GPT271 */\r
+//#endif\r
+\r
+/* Needs Gpt_ConfigType */\r
+#include "Gpt_Cfg.h" /* @req 4.0.3/GPT259 */\r
+\r
+/* The config needs EcuM_WakeupSourceType from EcuM */\r
\r
#if (GPT_VERSION_INFO_API == STD_ON)\r
#define Gpt_GetVersionInfo(_vi) STD_GET_VERSION_INFO(_vi,GPT)\r
void (*GptNotification)();\r
uint8 GptNotificationPriority;\r
uint32 GptChannelPrescale;\r
- boolean GptEnableWakeup;\r
+ boolean GptEnableWakeup; // ?\r
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_ON)\r
+ EcuM_WakeupSourceType GptWakeupSource;\r
+#endif\r
} Gpt_ConfigType;\r
\r
#endif /* GPT_CONFIGTYPES_H */\r
} Mcu_PllStatusType;\r
\r
\r
-typedef enum {\r
- MCU_MODE_NORMAL=0\r
-} Mcu_ModeType;\r
-\r
//TODO\r
typedef uint8_t Mcu_RamSectionType;\r
\r
uint32_t McuE_GetPeripheralClock( McuE_PeriperalClock_t type );\r
#endif\r
\r
+void McuE_EnterLowPower( int mode );\r
+void McuE_LowPowerRecoverFlash( void );\r
+\r
#endif /*MCU_H_*/\r
/** @} */\r
#define WDGM_SW_PATCH_VERSION 0
#include "Std_Types.h"
+/* "forward" declare types due to circular dependency chain */
+typedef uint8 WdgM_SupervisedEntityIdType;
+typedef uint8 WdgM_ModeType;
+
+
#include "WdgM_Cfg.h"
// API Service ID's
const float32 WdgM_TriggerCycle;\r
}WdgM_ActivationSchMType;\r
\r
+#if (WDGM_GPT_USED == STD_ON)\r
typedef struct\r
{\r
const uint32 WdgM_GptCycle;\r
const Gpt_ChannelType WdgM_GptChannelRef;\r
}WdgM_ActivationGPTType;\r
+#endif\r
\r
typedef struct\r
{\r
const boolean WdgM_IsGPTActivated;\r
const WdgM_ActivationSchMType WdgM_ActivationSchM;\r
+#if (WDGM_GPT_USED == STD_ON)\r
const WdgM_ActivationGPTType WdgM_ActivationGPT;\r
+#endif\r
}WdgM_ActivationType;\r
\r
typedef struct\r
#define SPR_SPEFSCR 512\r
#define SPR_MCSR 572\r
\r
+#define SPR_MAS0 624\r
+#define SPR_MAS1 625\r
+#define SPR_MAS2 626\r
+#define SPR_MAS3 627\r
+#define SPR_MAS4 628\r
+#define SPR_MAS6 630\r
+\r
+\r
#define ESR_PTR (1<<(38-32))\r
\r
#define SPR_XER 1\r
\r
#define INTC_SSCIR7 0xFFF48027\r
\r
+/* MAS bits */\r
+#define MAS1_TSIZE_4K (1<<8)\r
+#define MAS1_TSIZE_16K (2<<8)\r
+#define MAS1_TSIZE_64K (3<<8)\r
+#define MAS1_TSIZE_256K (4<<8)\r
+#define MAS1_TSIZE_1M (5<<8)\r
+#define MAS1_TSIZE_4M (6<<8)\r
+#define MAS1_TSIZE_16M (7<<8)\r
+#define MAS1_TSIZE_64M (8<<8)\r
+#define MAS1_TSIZE_256M (8<<9)\r
+\r
+#define MAS2_VLE (1<<5)\r
+#define MAS2_W (1<<4)\r
+#define MAS2_I (1<<3)\r
+#define MAS2_M (1<<2)\r
+#define MAS2_G (1<<1)\r
+#define MAS2_E (1<<0)\r
+\r
+#define MAS3_UX (1<<5)\r
+#define MAS3_SX (1<<4)\r
+#define MAS3_UW (1<<3)\r
+#define MAS3_SW (1<<2)\r
+#define MAS3_UR (1<<1)\r
+#define MAS3_SR (1<<0)\r
+\r
+#define MAS3_FULL_ACCESS (MAS3_UX+MAS3_UW+MAS3_UR+MAS3_SX+MAS3_SW+MAS3_SR)\r
+\r
+\r
#if defined(_ASSEMBLER_)\r
/*\r
* PPC vs VLE assembler:\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+\r
+/** @reqSettings DEFAULT_SPECIFICATION_REVISION=3.1.5 */\r
+\r
+/* ----------------------------[information]----------------------------------*/\r
+/*\r
+ * Author: ?+mahi\r
+ *\r
+ * Part of Release:\r
+ * 3.1.5\r
+ *\r
+ * Description:\r
+ * Implements the Can Driver module\r
+ *\r
+ * Support:\r
+ * General Have Support\r
+ * -------------------------------------------\r
+ * ECUM_TTII_ENABLED N\r
+ * ECUM_DEV_ERROR_DETECT Y\r
+ * ECUM_VERSION_INFO_API Y\r
+ * ECUM_INCLUDE_DEM N (controlled by USE_x macro's instead)\r
+ * ECUM_INCLUDE_NVRAM_MGR N (controlled by USE_x macro's instead)\r
+ * ECUM_INLCUDE_DET N (controlled by USE_x macro's instead)\r
+ * ECUM_MAIN_FUNCTION_PERDIOD Y\r
+ * ECUM_TTII_WKSOURCE N\r
+ *\r
+ * Configuration Have Support\r
+ * -------------------------------------------\r
+ * ECUM_SLEEP_ACTIVITY_PERIOD ?\r
+ * ECUM_CONFIGCONSISTENCY_HASH N\r
+ * ECUM_RUN_SELF_REQUEST_PERIOD ?\r
+ * ECUM_NVRAM_WRITEALL_TIMEOUT Y\r
+ * ECUM_DEFAULT_APP_MODE ?\r
+ *\r
+ *\r
+ * DefaultShutdownTarget\r
+ * -------------------------------------------\r
+ * ECUM_DEFAULT_SHUTDOWN_TARGET N\r
+ *\r
+ *\r
+ * Things to start with:\r
+ * - EcuM2181\r
+ * - EcuM2861 , Watchdog\r
+ * - ComM_EcuM_RunModeIndication() not called, See Figure 8 (Seems that the ComM does not do much either)\r
+ *\r
+ *\r
+ *\r
+ */\r
+\r
//lint -emacro(904,VALIDATE,VALIDATE_RV,VALIDATE_NO_RV) //904 PC-Lint exception to MISRA 14.7 (validate macros).\r
\r
+\r
+/* ----------------------------[includes]------------------------------------*/\r
+\r
#include "Std_Types.h"\r
#include "EcuM.h"\r
#include "Modules.h"\r
#endif\r
\r
\r
+/* ----------------------------[private define]------------------------------*/\r
+/* ----------------------------[private macro]-------------------------------*/\r
+/* ----------------------------[private typedef]-----------------------------*/\r
+/* ----------------------------[private function prototypes]-----------------*/\r
+/* ----------------------------[private variables]---------------------------*/\r
\r
EcuM_GlobalType internal_data;\r
\r
+/* ----------------------------[private functions]---------------------------*/\r
+\r
+\r
+/* ----------------------------[public functions]----------------------------*/\r
+\r
#if !defined(USE_DET) && defined(ECUM_DEV_ERROR_DETECT)\r
#error EcuM configuration error. DET is not enabled when ECUM_DEV_ERROR_DETECT is set\r
#endif\r
// Determine PostBuild configuration\r
internal_data.config = EcuM_DeterminePbConfiguration();\r
\r
+\r
// TODO: Check consistency of PB configuration\r
\r
// Initialize drivers needed before the OS-starts\r
SchM_Init();\r
#endif\r
\r
+#if defined(USE_WDGM)\r
+ WdgM_SetMode(internal_data.config->EcuMWdgMConfig->EcuMWdgMStartupMode);\r
+#endif\r
+\r
// Initialize drivers that don't need NVRAM data\r
EcuM_AL_DriverInitTwo(internal_data.config);\r
\r
return E_OK;\r
}\r
\r
+/**\r
+ *\r
+ */\r
void EcuM_KillAllRUNRequests( void ) {\r
/* NOT IMPLEMENTED */\r
}\r
\r
+\r
+/**\r
+ *\r
+ * @param sources\r
+ */\r
void EcuM_SetWakeupEvent(EcuM_WakeupSourceType sources) {\r
- /* NOT IMPLEMENTED */\r
+ /* @req 3.1.5/EcuM2826 The function exists */\r
+ /* @req 3.1.5/EcuM2171 */\r
+\r
+ /* @req 3.1.5/EcuM2867 */\r
+#if ( ECUM_DEV_ERROR_DETECT == STD_ON )\r
+ {\r
+ EcuM_WakeupSourceType wkSource;\r
+ const EcuM_SleepModeType *sleepModePtr;\r
+\r
+ sleepModePtr = &internal_data.config->EcuMSleepModeConfig[internal_data.sleep_mode];\r
+ wkSource = sleepModePtr->EcuMWakeupSourceMask;\r
+\r
+ if( !((sources | wkSource) == wkSource)) {\r
+ Det_ReportError(MODULE_ID_ECUM, 0, ECUM_VALIDATE_WAKEUP_EVENT_ID, ECUM_E_UNKNOWN_WAKEUP_SOURCE );\r
+ return;\r
+ }\r
+ }\r
+#endif\r
+\r
+\r
+ /* @req 3.1.5/EcuM1117 */\r
+ internal_data.wakeupEvents |= sources;\r
+\r
+ /* @req 3.1.5/EcuM2707 @req 3.1.5/EcuM2709*/\r
+// internal_data.wakeupTimer = ECUM_VALIDATION_TIMEOUT;\r
+\r
}\r
\r
#if defined(USE_COMM) || defined(USE_ECUM_COMM)\r
return E_OK;\r
}\r
\r
+/*\r
+ * TODO: Don't yet understand the use\r
+ */\r
+void EcuM_ClearWakeupEvent( EcuM_WakeupSourceType source )\r
+{\r
+ switch(source) {\r
+ case ECUM_WKSTATUS_NONE:\r
+ /* Seems quite pointless */\r
+ break;\r
+ case ECUM_WKSTATUS_PENDING:\r
+ break;\r
+ case ECUM_WKSTATUS_VALIDATED:\r
+ break;\r
+ case ECUM_WKSTATUS_EXPIRED:\r
+ break;\r
+ default:\r
+ break;\r
+ }\r
+}\r
+\r
+/**\r
+ * Get the pending wakeup events.\r
+ *\r
+ * @return\r
+ */\r
+EcuM_WakeupSourceType EcuM_GetPendingWakeupEvents( void ) {\r
+ /* @req 3.1.5/EcuM2827 API\r
+ * @req 3.1.5/EcuM2172 Callable from interrupt context\r
+ * */\r
+\r
+ /* @req 3.1.5/EcuM1156 */\r
+ return internal_data.wakeupEvents;\r
+\r
+}\r
+\r
+\r
+void EcuM_CheckValidation(EcuM_WakeupSourceType wakeupSource) {\r
+ /* Used only if CanIf is used ? CanIf_Checkvalidation(wakeupSource) */\r
+ (void)wakeupSource;\r
+}\r
+\r
+\r
+EcuM_WakeupSourceType EcuM_GetValidatedWakeupEvents( void ) {\r
+ // TODO:\r
+ return 0;\r
+}\r
+\r
+EcuM_WakeupStatusType EcuM_GetStatusOfWakeupSource( EcuM_WakeupSourceType sources ) {\r
+ return 0;\r
+}\r
+\r
+\r
#endif\r
uint32 run_requests;\r
uint32 postrun_requests;\r
+ EcuM_WakeupSourceType wakeupEvents;\r
+ uint32 wakeupTimer;\r
} EcuM_GlobalType;\r
\r
extern EcuM_GlobalType internal_data;\r
static NvM_RequestResultType writeAllResult;\r
#endif\r
\r
+static uint32 internal_data_go_sleep_state_timeout = 0;\r
+\r
#ifdef CFG_ECUM_USE_SERVICE_COMPONENT\r
/** @req EcuM2749 */\r
static Rte_ModeType_EcuM_Mode currentMode;\r
#endif\r
\r
\r
+/**\r
+ * RUN II entry\r
+ * - Called from EcuM_StartupTwo()\r
+ * - Called from\r
+ *\r
+ *\r
+ */\r
void EcuM_enter_run_mode(void){\r
set_current_state(ECUM_STATE_APP_RUN);\r
- EcuM_OnEnterRUN(); /** @req EcuM2308 */\r
- //TODO: Call ComM_EcuM_RunModeIndication(NetworkHandleType Channel) for all channels that have requested run.\r
+ EcuM_OnEnterRun(); /** @req EcuM2308 */\r
+\r
+#if defined(USE_WDGM)\r
+ /* This seems strange, should be in FW instead */\r
+ WdgM_SetMode(internal_data.config->EcuMWdgMConfig->EcuMWdgMRunMode);\r
+#endif\r
+\r
+#if defined(USE_COMM)\r
+ /*\r
+ * Loop over all channels that have requested run,\r
+ * ie EcuM_ComM_RequestRUN()\r
+ */\r
+ {\r
+ uint32 cMask = internal_data.run_comm_requests;\r
+ uint8 channel;\r
+\r
+ for (; cMask; cMask &= ~(1ul << channel)) {\r
+ channel = ilog2(cMask);\r
+ ComM_EcuM_RunModeIndication(channel);\r
+ }\r
+ }\r
+#endif\r
+\r
+ /* We have a configurable minimum time (EcuMRunMinimumDuration)\r
+ * we have to stay in RUN state */\r
internal_data_run_state_timeout = internal_data.config->EcuMRunMinimumDuration / ECUM_MAIN_FUNCTION_PERIOD; /** @req EcuM2310 */\r
}\r
\r
\r
//--------- Local functions ------------------------------------------------------------------------------------------------\r
\r
+\r
+\r
+/**\r
+ * Enter GO SLEEP state ( soon in state ECUM_STATE_GO_SLEEP)\r
+ */\r
static inline void enter_go_sleep_mode(void){\r
+ EcuM_WakeupSourceType wakeupSource;\r
set_current_state(ECUM_STATE_GO_SLEEP);\r
+\r
EcuM_OnGoSleep();\r
+\r
+#if defined(USE_NVM)\r
+ NvM_WriteAll();\r
+\r
+ /* Start timer */\r
+ internal_data_go_sleep_state_timeout = internal_data.config->EcuMNvramWriteAllTimeout / ECUM_MAIN_FUNCTION_PERIOD;\r
+\r
+ wakeupSource = EcuM_GetPendingWakeupEvents();\r
+#else\r
+ wakeupSource = EcuM_GetPendingWakeupEvents();\r
+#endif\r
+}\r
+\r
+/**\r
+ In GO SLEEP state (in state ECUM_STATE_GO_SLEEP)\r
+ */\r
+static void in_state_goSleep( void ) {\r
+\r
+ /* We only wait for NvM_WriteAll() for so long */\r
+ if (internal_data_go_sleep_state_timeout){\r
+ internal_data_go_sleep_state_timeout--;\r
+ }\r
+\r
+ if( (internal_data_go_sleep_state_timeout == 0) ) {\r
+ /*\r
+ * We should go to sleep , enable source that should wake us\r
+ * */\r
+ uint32 cMask;\r
+ uint8 source;\r
+ const EcuM_SleepModeType *sleepModePtr;\r
+\r
+ /* Get the current sleep mode */\r
+\r
+ sleepModePtr = &internal_data.config->EcuMSleepModeConfig[internal_data.sleep_mode];\r
+\r
+ cMask = sleepModePtr->EcuMWakeupSourceMask;\r
+\r
+ /* Loop over the WKSOURCE for this sleep mode */\r
+ for (; cMask; cMask &= ~(1ul << source)) {\r
+ source = ilog2(cMask);\r
+ /* @req 3.1.5/ECUM2389 */\r
+ EcuM_EnableWakeupSources( 1<< source );\r
+\r
+#if defined(WDGM)\r
+ WdgM_SetMode(sleepModePtr->EcuMSleepModeWdgMMode);\r
+#endif\r
+\r
+ /* Let no one else run */\r
+ GetResource(RES_SCHEDULER);\r
+ }\r
+\r
+ } else if( EcuM_GetPendingWakeupEvents() != 0 ) {\r
+ /* We have pending wakeup events, need to startup again */\r
+#if defined(USE_NVM)\r
+ NvM_CancelWriteAll();\r
+#endif\r
+ }\r
+}\r
+\r
+\r
+/**\r
+ * In "Sleep Sequence I" (in state ECUM_STATE_SLEEP)\r
+ */\r
+static void in_state_sleep ( void ) {\r
+ const EcuM_SleepModeType *sleepModePtr;\r
+ sleepModePtr = &internal_data.config->EcuMSleepModeConfig[internal_data.sleep_mode];\r
+\r
+ EcuM_GenerateRamHash();\r
+\r
+ Mcu_SetMode(sleepModePtr->EcuMSleepModeMcuMode);\r
+\r
+ /* @req 3.1.5/ECUM2863 */\r
+ if( EcuM_CheckRamHash() == 0) {\r
+#if defined(USE_DEM)\r
+ //\r
+ EcuM_ErrorHook(ECUM_E_RAM_CHECK_FAILED);\r
+#endif\r
+ }\r
+\r
+ set_current_state(ECUM_STATE_WAKEUP_ONE);\r
}\r
\r
static inline void enter_go_off_one_mode(void){\r
}\r
\r
\r
-\r
+/**\r
+ * RUN II Loop (in state ECUM_STATE_APP_RUN)\r
+ * - The entry to RUN II is done in\r
+ */\r
static inline void in_state_appRun(void){\r
if (internal_data_run_state_timeout){\r
internal_data_run_state_timeout--;\r
\r
if ((!hasRunRequests()) && (internal_data_run_state_timeout == 0)){\r
EcuM_OnExitRun(); /** @req EcuM2865 */\r
+\r
+#if defined(USE_WDGM)\r
+ WdgM_SetMode(internal_data.config->EcuMWdgMConfig->EcuMWdgMPostRunMode);\r
+#endif\r
+\r
+#if defined(USE_RTE) && defined(CFG_ECUM_USE_SERVICE_COMPONENT)\r
+ Rte_Switch_currentMode_currentMode(RTE_MODE_EcuM_Mode_POSTRUN);\r
+#endif\r
+\r
set_current_state(ECUM_STATE_APP_POST_RUN);/** @req EcuM2865 */\r
}\r
}\r
\r
\r
+/**\r
+ * RUN III states (in state ECUM_STATE_APP_POST_RUN)\r
+ */\r
static inline void in_state_appPostRun(void){\r
+\r
+ /* @req 3.1.5/ECUM2866 */\r
if (hasRunRequests()){\r
- set_current_state(ECUM_STATE_APP_RUN);/** @req EcuM2866 */ /** @req EcuM2308 */\r
- EcuM_OnEnterRUN(); /** @req EcuM2308 */\r
- //TODO: Call ComM_EcuM_RunModeIndication(NetworkHandleType Channel) for all channels that have requested run.\r
- internal_data_run_state_timeout = internal_data.config->EcuMRunMinimumDuration / ECUM_MAIN_FUNCTION_PERIOD; /** @req EcuM2310 */\r
+ /* We have run requests, return to RUN II */\r
+ EcuM_enter_run_mode();\r
\r
} else if (!hasPostRunRequests()){\r
EcuM_OnExitPostRun(); /** @req EcuM2761 */\r
set_current_state(ECUM_STATE_PREP_SHUTDOWN);/** @req EcuM2761 */\r
-\r
- EcuM_OnPrepShutdown();\r
} else {\r
- // TODO: Do something?\r
+ /* TODO: We have postrun requests */\r
}\r
}\r
\r
+\r
+/**\r
+ * PREP SHUTDOWN state (in state ECUM_STATE_PREP_SHUTDOWN)\r
+ */\r
static inline void in_state_prepShutdown(void){\r
+\r
+ // TODO: The specification does not state what events to clear\r
+ EcuM_ClearWakeupEvent(ECUM_WKSTATUS_NONE);\r
+\r
+ EcuM_OnPrepShutdown();\r
+\r
#if defined(USE_DEM)\r
// DEM shutdown\r
Dem_Shutdown();\r
// Wait for the NVM job (NvmWriteAll) to terminate\r
NvM_GetErrorStatus(0, &writeAllResult);\r
if ((writeAllResult != NVM_REQ_PENDING) || (internal_data_go_off_one_state_timeout == 0)){\r
+\r
+#if defined(USE_WDGM)\r
+ WdgM_SetMode(internal_data.config->EcuMWdgMConfig->EcuMWdgMShutdownMode);\r
+#endif\r
ShutdownOS(E_OK);\r
}\r
#else\r
+\r
+#if defined(USE_WDGM)\r
+ WdgM_SetMode(internal_data.config->EcuMWdgMConfig->EcuMWdgMShutdownMode);\r
+#endif\r
ShutdownOS(E_OK);\r
#endif\r
}\r
\r
//----- MAIN -----------------------------------------------------------------------------------------------------------------\r
void EcuM_MainFunction(void){\r
+ EcuM_WakeupSourceType wMask;\r
+\r
VALIDATE_NO_RV(internal_data.initiated, ECUM_MAINFUNCTION_ID, ECUM_E_NOT_INITIATED);\r
\r
switch(internal_data.current_state){\r
\r
case ECUM_STATE_APP_RUN:\r
+ /* RUN II state */\r
in_state_appRun();\r
break;\r
case ECUM_STATE_APP_POST_RUN:\r
+ /* RUN III state */\r
in_state_appPostRun();\r
break;\r
case ECUM_STATE_PREP_SHUTDOWN:\r
in_state_goOffOne();\r
break;\r
case ECUM_STATE_GO_SLEEP:\r
- // TODO: Fill out\r
+ in_state_goSleep();\r
+ break;\r
+ case ECUM_STATE_SLEEP:\r
+ in_state_sleep();\r
break;\r
+ case ECUM_STATE_WAKEUP_ONE:\r
+ {\r
+ /* TODO: we must have a normal RUN mode.. can't find any\r
+ * in the A3.1.5 spec. */\r
+ Mcu_SetMode(MCU_MODE_NORMAL);\r
+\r
+#if defined(USE_WDGM)\r
+ WdgM_SetMode(internal_data.config->EcuMWdgMConfig->EcuMWdgMWakeupMode);\r
+#endif\r
+\r
+ wMask = EcuM_GetPendingWakeupEvents();\r
+\r
+ EcuM_DisableWakeupSources(wMask);\r
+\r
+ EcuM_AL_DriverRestart();\r
+\r
+ ReleaseResource(RES_SCHEDULER);\r
+\r
+ set_current_state(ECUM_STATE_WAKEUP_VALIDATION);\r
+\r
+ break;\r
+ }\r
+\r
+ case ECUM_STATE_WAKEUP_VALIDATION:\r
+ {\r
+ wMask = EcuM_GetPendingWakeupEvents();\r
+\r
+ EcuM_StartWakeupSources(wMask);\r
+\r
+ EcuM_CheckValidation( wMask );\r
+\r
+ // TODO:\r
+ // ComM_EcuM_WakeupIndication( network handle )\r
+\r
+ set_current_state(ECUM_STATE_WAKEUP_REACTION);\r
+ break;\r
+ }\r
+\r
+ case ECUM_STATE_WAKEUP_REACTION:\r
+ {\r
+ /*\r
+ * At this stage we want to know how to react to the wakeup, e.g. go\r
+ * back to RUN or SHUTDOWN, etc.\r
+ */\r
+ EcuM_WakeupReactionType wReaction;\r
+\r
+ wMask = EcuM_GetValidatedWakeupEvents();\r
+\r
+ /* TODO: We have skipped the TTII timer here */\r
+\r
+ /* If the wakeup mask here is != 0 we have a validated wakeup event ->\r
+ * go back to RUN */\r
+ wReaction = ( 0 == wMask ) ? ECUM_WKACT_SHUTDOWN : ECUM_WKACT_RUN;\r
+ wReaction = EcuM_OnWakeupReaction(wReaction);\r
+\r
+ if( wReaction == ECUM_WKACT_RUN) {\r
+ set_current_state(ECUM_STATE_WAKEUP_TWO);\r
+ } else {\r
+ /* From figure 28 it seems that we should go to SHUTDOWN/GO SLEEP) again from wakeup\r
+ * not going up to RUN/RUN II state again. */\r
+ set_current_state(ECUM_STATE_GO_SLEEP);\r
+ }\r
+ break;\r
+ }\r
+\r
+ case ECUM_STATE_WAKEUP_TWO:\r
+#if defined(USE_DEM)\r
+ Dem_Init();\r
+#endif\r
+ set_current_state(ECUM_STATE_RUN);\r
+ break;\r
+\r
default:\r
//TODO: Report error.\r
break;\r
SCHM_DECLARE(FEE);\r
SCHM_DECLARE(EA);\r
SCHM_DECLARE(FLS);\r
+SCHM_DECLARE(WDGM_TRIGGER);\r
+SCHM_DECLARE(WDGM_ALIVESUPERVISION);\r
\r
\r
\r
\r
/* At this point EcuM == ECUM_STATE_STARTUP_ONE */\r
\r
- /* Schedule memory task more often that usaul so that EcuM_StartupTwo() may return quicker */\r
- ActivateTask(TASK_ID_SchM_BswService);\r
/* Set events on TASK_ID_BswService_Mem */\r
SetRelAlarm(ALARM_ID_Alarm_BswService, 10, 2);\r
\r
EcuM_StartupTwo();\r
\r
/* Start to schedule BSW parts */\r
+ CancelAlarm(ALARM_ID_Alarm_BswService);\r
SetRelAlarm(ALARM_ID_Alarm_BswService, 10, 5);\r
\r
EcuM_RequestRUN(ECUM_USER_User_1);\r
SCHM_MAINFUNCTION_NM();\r
SCHM_MAINFUNCTION_CANNM();\r
SCHM_MAINFUNCTION_CANSM();\r
- SCHM_MAINFUNCTION_WDMG();\r
+ SCHM_MAINFUNCTION_WDGM_TRIGGER();\r
+ SCHM_MAINFUNCTION_WDGM_ALIVESUPERVISION();\r
break;\r
}\r
\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+#ifndef SCHM_WDGM_H_\r
+#define SCHM_WDGM_H_\r
+\r
+#define SCHM_MAINFUNCTION_WDGM_TRIGGER() SCHM_MAINFUNCTION(WDGM_TRIGGER,WdgM_MainFunction_Trigger())\r
+#define SCHM_MAINFUNCTION_WDGM_ALIVESUPERVISION() SCHM_MAINFUNCTION(WDGM_ALIVESUPERVISION,WdgM_MainFunction_AliveSupervision())\r
+\r
+#define SCHM_MAINFUNCTION_WDGM() SCHM_MAINFUNCTION(WDGM,Dcm_MainFunction())\r
+\r
+#endif /* SCHM_WDGM_H_ */\r
#define SCHM_MAINFUNCTION_CYCLE_PDUR SCHM_CYCLE_MAIN\r
#define SCHM_MAINFUNCTION_CYCLE_SPI SCHM_CYCLE_MAIN\r
#define SCHM_MAINFUNCTION_CYCLE_WDGM SCHM_CYCLE_MAIN\r
+#define SCHM_MAINFUNCTION_CYCLE_WDGM_TRIGGER SCHM_CYCLE_MAIN\r
+#define SCHM_MAINFUNCTION_CYCLE_WDGM_ALIVESUPERVISION SCHM_CYCLE_MAIN\r
\r
/*\r
* Schedule BSW memory\r
projects / arc.git / commitdiff