Added leds for stm3210c and corrected bug in pll configuration

diff --git a/arch/arm/arm_cm3/drivers/Mcu.c b/arch/arm/arm_cm3/drivers/Mcu.c
index 5735c42f2a51714cacbc6c330392db516bc6b81b..59492bdfe799a9de2ee5c063970e90b383138d77 100644 (file)
--- a/arch/arm/arm_cm3/drivers/Mcu.c
+++ b/arch/arm/arm_cm3/drivers/Mcu.c
@@ -180,6 +180,10 @@ static uint32_t GetPllValueFromMult(uint8_t pll)
 {
        return (((uint32_t)pll - 2) << 18);
 }
+static uint32_t GetPll2ValueFromMult(uint8_t pll)
+{
+       return (((uint32_t)pll - 2) << 8);
+}
 
 /**
   * Set bus clocks. SysClk,AHBClk,APB1Clk,APB2Clk
@@ -234,7 +238,7 @@ static void SetClocks(Mcu_ClockSettingConfigType *clockSettingsPtr)
 
     RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
                               RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
-    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | GetPllValueFromMult(clockSettingsPtr->Pll2) |
+    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | GetPll2ValueFromMult(clockSettingsPtr->Pll2) |
                              RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);
 
     /* Enable PLL2 */

diff --git a/boards/stm32_stm3210c/config/Dio_Cfg.h b/boards/stm32_stm3210c/config/Dio_Cfg.h
index 7898232fd3af78e64ca90cd82b62f409dd619dbd..c2cfaa643905a4c78fc7267b1bd5a2a5d56f4191 100644 (file)
--- a/boards/stm32_stm3210c/config/Dio_Cfg.h
+++ b/boards/stm32_stm3210c/config/Dio_Cfg.h
@@ -161,9 +161,12 @@ typedef uint16 Dio_LevelType;
 /** @req DIO024 */\r
 typedef uint16 Dio_PortLevelType;\r
 \r
-#define LED_CHANNEL (DIO_CHANNEL_B13)\r
+#define LED_CHANNEL1 (DIO_CHANNEL_D3)\r
+#define LED_CHANNEL2 (DIO_CHANNEL_D4)\r
+#define LED_CHANNEL3 (DIO_CHANNEL_D7)\r
+#define LED_CHANNEL4 (DIO_CHANNEL_D13)\r
 \r
-#define LED_PORT               (DIO_PORT_B)\r
+#define LED_PORT               (DIO_PORT_D)\r
 \r
 #define LED_GROUP                      (&DioConfigData[0])\r
 \r

diff --git a/boards/stm32_stm3210c/config/Dio_Lcfg.c b/boards/stm32_stm3210c/config/Dio_Lcfg.c
index 7fd913d9b38005483f8cc04052b3320d8ffd4245..acb3db1382c639df6cfbbacce665204684c93be4 100644 (file)
--- a/boards/stm32_stm3210c/config/Dio_Lcfg.c
+++ b/boards/stm32_stm3210c/config/Dio_Lcfg.c
@@ -17,7 +17,10 @@
 \r
 const Dio_ChannelType DioChannelConfigData[] =\r
 {\r
-       LED_CHANNEL,\r
+       LED_CHANNEL1,\r
+       LED_CHANNEL2,\r
+       LED_CHANNEL3,\r
+       LED_CHANNEL4,\r
        DIO_END_OF_LIST,\r
 };\r
 \r
@@ -29,7 +32,7 @@ const Dio_PortType DioPortConfigData[] =
 \r
 const Dio_ChannelGroupType DioConfigData[] =\r
 {\r
-  { .port = DIO_PORT_B, .offset = 7, .mask = 0x80, },\r
+  { .port = DIO_PORT_D, .offset = 0, .mask = 0x1094, },\r
   { .port = DIO_END_OF_LIST, .offset = DIO_END_OF_LIST, .mask = DIO_END_OF_LIST, },\r
 };\r
 \r

diff --git a/boards/stm32_stm3210c/config/Port_Cfg.c b/boards/stm32_stm3210c/config/Port_Cfg.c
index 1e767eaea536fe4f497dfc5b45e5ee7fb5c52f89..be5978065341f33a95904562a0fbc7f16813433f 100644 (file)
--- a/boards/stm32_stm3210c/config/Port_Cfg.c
+++ b/boards/stm32_stm3210c/config/Port_Cfg.c
@@ -26,6 +26,7 @@ typedef enum {
 \r
 const u32 remaps[] = {\r
                GPIO_Remap_ETH,\r
+               GPIO_Remap2_CAN1,\r
 };\r
 \r
 const Port_PortConfigType porta = {\r
@@ -54,18 +55,6 @@ const Port_PortConfigType portb = {
   .port = GPIOB,\r
   .pinCount = 2,\r
   .pins = {\r
-       /* PB8 is CAN1_RX, remapped: */\r
-/*     {\r
-         .GPIO_Pin = GPIO_Pin_8,\r
-         .GPIO_Mode = GPIO_Mode_IPU,\r
-         .GPIO_Speed = GPIO_Speed_10MHz\r
-       },*/\r
-       /* PB9 is CAN1_TX, remapped: */\r
-/*     {\r
-         .GPIO_Pin = GPIO_Pin_9,\r
-         .GPIO_Mode = GPIO_Mode_AF_PP,\r
-         .GPIO_Speed = GPIO_Speed_10MHz\r
-       },*/\r
        {\r
          .GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_8 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13,\r
          .GPIO_Mode = GPIO_Mode_AF_PP,\r
@@ -105,13 +94,30 @@ const Port_PortConfigType portc = {
 \r
 const Port_PortConfigType portd = {\r
   .port = GPIOD,\r
-  .pinCount = 1,\r
+  .pinCount = 4,\r
   .pins = {\r
        {\r
          .GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12,\r
          .GPIO_Mode = GPIO_Mode_IN_FLOATING,\r
          .GPIO_Speed = GPIO_Speed_50MHz,\r
        },\r
+       /* PD0 is CAN1_RX, remapped: */\r
+       {\r
+         .GPIO_Pin = GPIO_Pin_0,\r
+         .GPIO_Mode = GPIO_Mode_IPU,\r
+         .GPIO_Speed = GPIO_Speed_10MHz\r
+       },\r
+       /* PD1 is CAN1_TX, remapped: */\r
+       {\r
+         .GPIO_Pin = GPIO_Pin_1,\r
+         .GPIO_Mode = GPIO_Mode_AF_PP,\r
+         .GPIO_Speed = GPIO_Speed_10MHz\r
+       },\r
+       {\r
+         .GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_7 | GPIO_Pin_13,\r
+         .GPIO_Mode = GPIO_Mode_Out_PP,\r
+         .GPIO_Speed = GPIO_Speed_10MHz\r
+       },\r
   }\r
 };\r
 \r