--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#include "Std_Types.h"\r
+#include "Dio.h"\r
+#include "Det.h"\r
+#include <string.h>\r
+#include "regs.h"\r
+\r
+#if ( DIO_VERSION_INFO_API == STD_ON )\r
+static Std_VersionInfoType _Dio_VersionInfo =\r
+{\r
+ .vendorID = (uint16)1,\r
+ .moduleID = (uint16)1,\r
+ .instanceID = (uint8)1,\r
+ .sw_major_version = (uint8)DIO_SW_MAJOR_VERSION,\r
+ .sw_minor_version = (uint8)DIO_SW_MINOR_VERSION,\r
+ .sw_patch_version = (uint8)DIO_SW_PATCH_VERSION,\r
+ .ar_major_version = (uint8)DIO_AR_MAJOR_VERSION,\r
+ .ar_minor_version = (uint8)DIO_AR_MINOR_VERSION,\r
+ .ar_patch_version = (uint8)DIO_AR_PATCH_VERSION,\r
+};\r
+#endif\r
+\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+static int Channel_Config_Contains(Dio_ChannelType channelId)\r
+{\r
+ Dio_ChannelType* ch_ptr=(Dio_ChannelType*)CHANNEL_PTR;\r
+ int rv=0;\r
+ while (DIO_END_OF_LIST!=*ch_ptr)\r
+ {\r
+ if (*ch_ptr==channelId)\r
+ { rv=1; break;}\r
+ ch_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+static int Port_Config_Contains(Dio_PortType portId)\r
+{\r
+ Dio_PortType* port_ptr=(Dio_PortType*)PORT_PTR;\r
+ int rv=0;\r
+ while (DIO_END_OF_LIST!=*port_ptr)\r
+ {\r
+ if (*port_ptr==portId)\r
+ { rv=1; break;}\r
+ port_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+static int Channel_Group_Config_Contains(const Dio_ChannelGroupType* _channelGroupIdPtr)\r
+{\r
+ Dio_ChannelGroupType* chGrp_ptr=(Dio_ChannelGroupType*)CHANNEL_GRP_PTR;\r
+ int rv=0;\r
+\r
+ while (DIO_END_OF_LIST!=chGrp_ptr->port)\r
+ {\r
+ if (chGrp_ptr->port==_channelGroupIdPtr->port&&\r
+ chGrp_ptr->offset==_channelGroupIdPtr->offset&&\r
+ chGrp_ptr->mask==_channelGroupIdPtr->mask)\r
+ { rv=1; break;}\r
+ chGrp_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+#define VALIDATE_CHANNEL(_channelId, _api) \\r
+ if(0==Channel_Config_Contains(channelId)) { \\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_CHANNEL_ID ); \\r
+ level = 0; \\r
+ goto cleanup; \\r
+ }\r
+#define VALIDATE_PORT(_portId, _api)\\r
+ if(0==Port_Config_Contains(_portId)) {\\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_PORT_ID ); \\r
+ level = STD_LOW;\\r
+ goto cleanup;\\r
+ }\r
+#define VALIDATE_CHANNELGROUP(_channelGroupIdPtr, _api)\\r
+ if(0==Channel_Group_Config_Contains(_channelGroupIdPtr)) {\\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_GROUP_ID ); \\r
+ level = STD_LOW;\\r
+ goto cleanup;\\r
+ }\r
+#else\r
+#define VALIDATE_CHANNEL(_channelId, _api)\r
+#define VALIDATE_PORT(_portId, _api)\r
+#define VALIDATE_CHANNELGROUP(_channelGroupIdPtr, _api)\r
+#endif\r
+\r
+Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId)\r
+{\r
+ Dio_LevelType level;\r
+ VALIDATE_CHANNEL(channelId, DIO_READCHANNEL_ID);\r
+ // Read level from SIU.\r
+ if (SIU.GPDI [channelId].R)\r
+ {\r
+ level = STD_HIGH;\r
+ } else\r
+ {\r
+ level = STD_LOW;\r
+ }\r
+ cleanup: return (level);\r
+}\r
+\r
+void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
+{\r
+ VALIDATE_CHANNEL(channelId, DIO_WRITECHANNEL_ID);\r
+ // Write level to SIU.\r
+ SIU.GPDO [channelId].R = level;\r
+ cleanup: return;\r
+}\r
+\r
+Dio_PortLevelType Dio_ReadPort(Dio_PortType portId)\r
+{\r
+ Dio_LevelType level;\r
+ VALIDATE_PORT(portId, DIO_READPORT_ID);\r
+\r
+#if defined(CFG_MPC5554)||defined(CFG_MPC5567)\r
+ vuint16_t *ptr = (vuint16_t *)&SIU.GPDI;\r
+#else\r
+ vuint16_t *ptr = (vuint16_t *)&SIU.PGPDI0; // The GPDI 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths\r
+#endif\r
+ level = ptr[portId]; // Read the bit pattern (16bits) to the port\r
+ cleanup: return level;\r
+}\r
+\r
+void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
+{\r
+ VALIDATE_PORT(portId, DIO_WRITEPORT_ID);\r
+\r
+ // find address of first port\r
+#if defined(CFG_MPC5554)||defined(CFG_MPC5567)\r
+ vuint16_t *ptr = (vuint16_t *)&SIU.GPDO;\r
+#else\r
+ vuint16_t *ptr = (vuint16_t *)&SIU.PGPDO0; // The GPDO 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths\r
+#endif\r
+ ptr[portId] = level; // Write the bit pattern (16bits) to the port\r
+ cleanup: return;\r
+}\r
+\r
+Dio_PortLevelType Dio_ReadChannelGroup(\r
+ const Dio_ChannelGroupType *channelGroupIdPtr)\r
+{\r
+ Dio_LevelType level;\r
+ VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_READCHANNELGROUP_ID);\r
+\r
+ // find address of first port\r
+#if defined(CFG_MPC5554)||defined(CFG_MPC5567)\r
+ vuint16_t *ptr = (vuint16_t *)&SIU.GPDI;\r
+#else\r
+ uint16 *ptr = (uint16 *)&SIU.PGPDI0; // The GPDI 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths\r
+#endif\r
+\r
+ // Get masked values\r
+ level = ptr[channelGroupIdPtr->port] & channelGroupIdPtr->mask;\r
+\r
+ // Shift down\r
+ level<<=channelGroupIdPtr->offset;\r
+ cleanup: return level;\r
+}\r
+\r
+void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
+ Dio_PortLevelType level)\r
+{\r
+#if defined(CFG_MPC5516)\r
+ VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_WRITECHANNELGROUP_ID);\r
+ // find address of first port of the masked register\r
+ uint32 *ptr = (uint32 *)&SIU.MPGPDO0; // The GPDI 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths\r
+\r
+ // Build the 32 bits Mask_Valule, and write to masked output register\r
+ ptr[channelGroupIdPtr->port] = (channelGroupIdPtr->mask << 16)&((level\r
+ <<channelGroupIdPtr->offset)|0xFFFF);\r
+ cleanup: return;\r
+#else\r
+ return;\r
+#endif\r
+}\r
+\r
+#if (DIO_VERSION_INFO_API == STD_ON)\r
+void Dio_GetVersionInfo(Std_VersionInfoType *versionInfo)\r
+{\r
+ memcpy(versionInfo, &_Dio_VersionInfo, sizeof(Std_VersionInfoType));\r
+}\r
+#endif\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+
+/** @addtogroup Dio DIO Driver
+ * @{ */
+
+/** @file Dio_Cfg.h
+ * Definitions of configuration parameters for the DIO Driver.
+ */
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+#define DIO_END_OF_LIST -1\r
+\r
+/** HW specific DIO port definitions. */
+/** @req DIO018 */
+/** @req DIO020 */
+typedef enum\r
+{\r
+ DIO_PORT_A = 0,\r
+ DIO_PORT_B,\r
+ DIO_PORT_E,\r
+ DIO_PORT_H,\r
+ DIO_PORT_J,\r
+ DIO_PORT_K,\r
+ DIO_PORT_M,
+ DIO_PORT_P,
+ DIO_PORT_S,
+ DIO_PORT_T
+} Dio_PortType;
+
+/** @name DIO channels
+ * HW specific dio channels.
+ */
+// Pin Name GPIO(PCR)Num
+//@{
+//* req DIO015 */
+//* req DIO017 */
+typedef enum
+{
+ DIO_CHANNEL_A0,\r
+ DIO_CHANNEL_A1,\r
+ DIO_CHANNEL_A2,\r
+ DIO_CHANNEL_A3,\r
+ DIO_CHANNEL_A4,\r
+ DIO_CHANNEL_A5,\r
+ DIO_CHANNEL_A6,\r
+ DIO_CHANNEL_A7,\r
+\r
+ DIO_CHANNEL_B0,\r
+ DIO_CHANNEL_B1,\r
+ DIO_CHANNEL_B2,\r
+ DIO_CHANNEL_B3,\r
+ DIO_CHANNEL_B4,\r
+ DIO_CHANNEL_B5,\r
+ DIO_CHANNEL_B6,\r
+ DIO_CHANNEL_B7,\r
+\r
+ DIO_CHANNEL_E0,\r
+ DIO_CHANNEL_E1,\r
+ DIO_CHANNEL_E2,\r
+ DIO_CHANNEL_E3,\r
+ DIO_CHANNEL_E4,\r
+ DIO_CHANNEL_E5,\r
+ DIO_CHANNEL_E6,\r
+ DIO_CHANNEL_E7,\r
+
+ DIO_CHANNEL_H0,\r
+ DIO_CHANNEL_H1,\r
+ DIO_CHANNEL_H2,\r
+ DIO_CHANNEL_H3,\r
+ DIO_CHANNEL_H4,\r
+ DIO_CHANNEL_H5,\r
+ DIO_CHANNEL_H6,\r
+ DIO_CHANNEL_H7,\r
+\r
+ DIO_CHANNEL_J0,\r
+ DIO_CHANNEL_J1,\r
+ DIO_CHANNEL_J2,\r
+ DIO_CHANNEL_J3,\r
+ DIO_CHANNEL_J4,\r
+ DIO_CHANNEL_J5,\r
+ DIO_CHANNEL_J6,\r
+ DIO_CHANNEL_J7,\r
+\r
+ DIO_CHANNEL_K0,
+ DIO_CHANNEL_K1,
+ DIO_CHANNEL_K2,
+ DIO_CHANNEL_K3,
+ DIO_CHANNEL_K4,
+ DIO_CHANNEL_K5,
+ DIO_CHANNEL_K6,
+ DIO_CHANNEL_K7,
+
+ DIO_CHANNEL_M0,
+ DIO_CHANNEL_M1,
+ DIO_CHANNEL_M2,
+ DIO_CHANNEL_M3,
+ DIO_CHANNEL_M4,
+ DIO_CHANNEL_M5,
+ DIO_CHANNEL_M6,
+ DIO_CHANNEL_M7,
+
+ DIO_CHANNEL_P0,
+ DIO_CHANNEL_P1,
+ DIO_CHANNEL_P2,
+ DIO_CHANNEL_P3,
+ DIO_CHANNEL_P4,
+ DIO_CHANNEL_P5,
+ DIO_CHANNEL_P6,
+ DIO_CHANNEL_P7,
+
+ DIO_CHANNEL_S0,
+ DIO_CHANNEL_S1,
+ DIO_CHANNEL_S2,
+ DIO_CHANNEL_S3,
+ DIO_CHANNEL_S4,
+ DIO_CHANNEL_S5,
+ DIO_CHANNEL_S6,
+ DIO_CHANNEL_S7,
+
+ DIO_CHANNEL_T0,
+ DIO_CHANNEL_T1,
+ DIO_CHANNEL_T2,
+ DIO_CHANNEL_T3,
+ DIO_CHANNEL_T4,
+ DIO_CHANNEL_T5,
+ DIO_CHANNEL_T6,
+ DIO_CHANNEL_T7
+} Dio_ChannelType;
+//@}
+
+/** @req DIO021 */
+/** @req DIO022 */
+typedef struct
+{
+ Dio_PortType port;
+ uint8 offset;
+ uint8 mask;
+} Dio_ChannelGroupType;
+
+/** @req DIO023 */
+typedef uint8 Dio_LevelType;
+
+/** @req DIO024 */
+typedef uint8 Dio_PortLevelType;
+\r
+#endif /*DIO_CFG_H_*/\r
* for more details.
* -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
#ifndef DIO_H_\r
#define DIO_H_\r
\r
-#include "Std_Types.h"\r
+#include "Std_Types.h" /** @req DIO131 */\r
\r
// API Service ID's\r
#define DIO_READCHANNEL_ID 0x00\r
#define DIO_E_PARAM_INVALID_CHANNEL_ID 10\r
#define DIO_E_PARAM_INVALID_PORT_ID 20\r
#define DIO_E_PARAM_INVALID_GROUP_ID 31\r
-\r
-typedef uint32 Dio_ChannelType;\r
-typedef uint32 Dio_PortType;\r
-typedef struct\r
-{\r
- Dio_PortType port;\r
- uint8 offset;\r
- uint32 mask;\r
-} Dio_ChannelGroupType;\r
-\r
-#if 0 // Gone from 3.0\r
-typedef enum\r
-{\r
- STD_LOW,\r
- STD_HIGH,\r
-}Dio_LevelType;\r
-#endif\r
-\r
-typedef uint32 Dio_LevelType;\r
-\r
-typedef uint16 Dio_PortLevelType;\r
#define DIO_SW_MAJOR_VERSION 1
#define DIO_SW_MINOR_VERSION 0
#define DIO_AR_PATCH_VERSION 1
\r
#include "Dio_Cfg.h"\r
-\r
-#if ( DIO_VERSION_INFO_API == STD_ON)\r
+/** @req DIO124 */
+#if ( DIO_VERSION_INFO_API == STD_ON)
+/** @req DIO139 */\r
void Dio_GetVersionInfo( Std_VersionInfoType *versionInfo );\r
#endif\r
-\r
-Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId);\r
-void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level);\r
-Dio_PortLevelType Dio_ReadPort(Dio_PortType portId);\r
+
+/** @req DIO133 */
+/** @req DIO027 */\r
+Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId);
+/** @req DIO134 */\r
+void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level);
+
+/** @req DIO135 */
+/** @req DIO031 */\r
+Dio_PortLevelType Dio_ReadPort(Dio_PortType portId);
+/** @req DIO136 */\r
void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level);\r
-Dio_PortLevelType Dio_ReadChannelGroup( const Dio_ChannelGroupType *channelGroupIdPtr );\r
+
+/** @req DIO137 */
+Dio_PortLevelType Dio_ReadChannelGroup( const Dio_ChannelGroupType *channelGroupIdPtr );
+/** @req DIO138 */\r
void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr, Dio_PortLevelType level);\r
\r
#endif /*DIO_H_*/\r
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