SchM: Corrections of timer. Need to update all SchM_<mod> files.

diff --git a/boards/mpc5516it/examples/mem_nvm_fee/Nvm_App.c b/boards/mpc5516it/examples/mem_nvm_fee/Nvm_App.c
index 7f92dca2b14de9b57cadcd5db0a50f34dfa6d3da..eed56d113839fa706458ca5ad7fa3933cc6984e8 100644 (file)
--- a/boards/mpc5516it/examples/mem_nvm_fee/Nvm_App.c
+++ b/boards/mpc5516it/examples/mem_nvm_fee/Nvm_App.c
@@ -48,8 +48,8 @@
 \r
 #define BUSY_WAIT(_block,_var) \\r
        do { \\r
-               NvM_GetErrorStatus(_block, &_var); \\r
-       } while( _var != NVM_REQ_OK );\r
+               NvM_GetErrorStatus(_block, &(_var)); \\r
+       } while( (_var) != NVM_REQ_OK );\r
 \r
 \r
 /* ----------------------------[private typedef]-----------------------------*/\r
@@ -154,11 +154,11 @@ static void nvmApplication(void) {
         */\r
        PATTERN_FILL(TEST_RamBlock_Dataset_0,0);\r
        NvM_WriteBlock(currBlock,TEST_RamBlock_Dataset_0);\r
-       BUSY_WAIT(currBlock,&errorStatus);\r
+       BUSY_WAIT(currBlock,errorStatus);\r
 \r
        memset(TEST_RamBlock_Dataset_0,0,sizeof(TEST_RamBlock_Dataset_0));\r
        NvM_ReadBlock(currBlock,TEST_RamBlock_Dataset_0);\r
-       BUSY_WAIT(currBlock,&errorStatus);\r
+       BUSY_WAIT(currBlock,errorStatus);\r
 \r
        rv = PATTERN_VERIFY(TEST_RamBlock_Dataset_0,0);\r
        assert(rv == 0);\r
@@ -168,15 +168,15 @@ static void nvmApplication(void) {
         */\r
        rv = NvM_SetDataIndex(currBlock,1);\r
        assert( rv == E_OK );\r
-       BUSY_WAIT(currBlock,&errorStatus);\r
+       BUSY_WAIT(currBlock,errorStatus);\r
 \r
        PATTERN_FILL(TEST_RamBlock_Dataset_0,5);\r
        NvM_WriteBlock(currBlock,TEST_RamBlock_Dataset_0);\r
-       BUSY_WAIT(currBlock,&errorStatus);\r
+       BUSY_WAIT(currBlock,errorStatus);\r
 \r
        memset(TEST_RamBlock_Dataset_0,0,sizeof(TEST_RamBlock_Dataset_0));\r
        NvM_ReadBlock(currBlock,TEST_RamBlock_Dataset_0);\r
-       BUSY_WAIT(currBlock,&errorStatus);\r
+       BUSY_WAIT(currBlock,errorStatus);\r
 \r
        rv = PATTERN_VERIFY(TEST_RamBlock_Dataset_0,5);\r
        assert(rv == 0);\r
@@ -187,10 +187,10 @@ static void nvmApplication(void) {
         */\r
        NvM_SetDataIndex(currBlock,0);\r
        assert( rv == E_OK );\r
-       BUSY_WAIT(currBlock,&errorStatus);\r
+       BUSY_WAIT(currBlock,errorStatus);\r
 \r
        NvM_ReadBlock(currBlock,TEST_RamBlock_Dataset_0);\r
-       BUSY_WAIT(currBlock,&errorStatus);\r
+       BUSY_WAIT(currBlock,errorStatus);\r
 \r
        rv = PATTERN_VERIFY(TEST_RamBlock_Dataset_0,0);\r
        assert(rv == 0);\r

diff --git a/system/SchM/SchM.h b/system/SchM/SchM.h
index f51e92b954b973704f2fdb93fcb87813157a8bbd..2447e8691ffae897131d1934226274244ad534e2 100644 (file)
--- a/system/SchM/SchM.h
+++ b/system/SchM/SchM.h
@@ -41,7 +41,7 @@ typedef struct  {
                SchM_InfoType SchM_Info_ ## _mod\r
 \r
 #define SCHM_MAINFUNCTION(_mod,_func) \\r
-               if( SchM_Info_ ## _mod.timer++ > SCHM_MAINFUNCTION_PERIOD_ ## _mod ) { \\r
+               if( ++SchM_Info_ ## _mod.timer ==  SCHM_MAINFUNCTION_CYCLE_ ## _mod ) { \\r
                        _func; \\r
                        SchM_Info_ ## _mod.timer = 0; \\r
                }\r

diff --git a/system/SchM/SchM_NvM.h b/system/SchM/SchM_NvM.h
index 9bad09c6e13d312fa783db198cb229a3889137e2..2a691ec00012e60fe3914335950384ce121d8b27 100644 (file)
--- a/system/SchM/SchM_NvM.h
+++ b/system/SchM/SchM_NvM.h
@@ -17,6 +17,6 @@
 #ifndef SCHM_NVM_H_\r
 #define SCHM_NVM_H_\r
 \r
-#define SCHM_MAINFUNCTION_NVM()        NvM_MainFunction()\r
+#define SCHM_MAINFUNCTION_NVM()        SCHM_MAINFUNCTION(NVM,NvM_MainFunction())\r
 \r
 #endif /* SCHM_NVM_H_ */\r

diff --git a/system/SchM/SchM_cfg.h b/system/SchM/SchM_cfg.h
index ee97983d34387d739cf027fd04f6a7316c12da0b..3f4e17d1a0c308ddab938bf4e9634acc52fac630 100644 (file)
--- a/system/SchM/SchM_cfg.h
+++ b/system/SchM/SchM_cfg.h
@@ -23,7 +23,7 @@
 /*\r
  * Scheduling BSW\r
  */\r
-#define SCHM_CYCLE_MAIN                                5\r
+#define SCHM_CYCLE_MAIN                                (5-1)\r
 \r
 #define SCHM_MAINFUNCTION_CYCLE_ADC     SCHM_CYCLE_MAIN\r
 #define SCHM_MAINFUNCTION_CYCLE_CAN     SCHM_CYCLE_MAIN\r
@@ -50,11 +50,10 @@
 /*\r
  * Schedule BSW memory\r
  */\r
-#define SCHM_CYCLE_MEM                         20\r
 \r
-#define SCHM_MAINFUNCTION_CYCLE_NVM     SCHM_CYCLE_MEM\r
-#define SCHM_MAINFUNCTION_CYCLE_FEE     SCHM_CYCLE_MEM\r
-#define SCHM_MAINFUNCTION_CYCLE_FLS     SCHM_CYCLE_MEM\r
+#define SCHM_MAINFUNCTION_CYCLE_NVM     SCHM_CYCLE_MAIN\r
+#define SCHM_MAINFUNCTION_CYCLE_FEE     SCHM_CYCLE_MAIN\r
+#define SCHM_MAINFUNCTION_CYCLE_FLS     SCHM_CYCLE_MAIN\r
 \r
 \r
 #endif /*SCHM_CFG_H_*/\r