More EcuM Sleep changes. Need RC2 of tools

diff --git a/arch/ppc/mpc55xx/drivers/Mcu.c b/arch/ppc/mpc55xx/drivers/Mcu.c
index 13da5609a247c8a75c0028e9c17a58d7c830133f..1a8a4fbbb81b5c27787551b1e97cff2feb35346c 100644 (file)
--- a/arch/ppc/mpc55xx/drivers/Mcu.c
+++ b/arch/ppc/mpc55xx/drivers/Mcu.c
@@ -14,6 +14,7 @@
  * -------------------------------- Arctic Core ------------------------------*/\r
 \r
 \r
+/* ----------------------------[includes]------------------------------------*/\r
 #include <assert.h>\r
 #include <string.h>\r
 #include "Std_Types.h"\r
@@ -27,12 +28,60 @@
 #include "Ramlog.h"\r
 #include "Os.h"\r
 #include "isr.h"\r
+#include "io.h"\r
 \r
 //#define USE_LDEBUG_PRINTF 1\r
 #include "debug.h"\r
 \r
+/* ----------------------------[private define]------------------------------*/\r
+\r
 #define SYSCLOCK_SELECT_PLL    0x2\r
 \r
+\r
+#if defined(CFG_MPC5516) || defined(CFG_MPC5668)\r
+#define CRP_BASE                       (0xFFFEC000ul)\r
+#else\r
+#error Please define CRP_BASE\r
+#endif\r
+\r
+#define CRP_CLKSRC                     (CRP_BASE+0x0)\r
+#define CRP_RTCSC                      (CRP_BASE+0x10)\r
+#define CRP_RTCCNT                     (CRP_BASE+0x14)\r
+/* 40--4F differs ALOT */\r
+#define CRP_Z1VEC                      (CRP_BASE+0x50)\r
+#define CRP_Z6VEC                      (CRP_BASE+0x50)\r
+#define CRP_Z0VEC                      (CRP_BASE+0x54)\r
+#define CRP_RECPTR                     (CRP_BASE+0x58)\r
+#define CRP_PSCR                       (CRP_BASE+0x60)\r
+\r
+#define xVEC_xVEC(_x)\r
+#define PSCR_SLEEP                     0x00008000ul\r
+#define PSCR_SLP12EN           0x00000800ul\r
+#define PCSR_RAMSEL(_x)                ((_x)<<8)\r
+#define xVEC_VLE                       0x00000001ul\r
+#define xVEC_xRST                      0x00000002ul\r
+\r
+#define RECPTR_FASTREC         0x00000002ul\r
+\r
+\r
+#if defined(CFG_VLE)\r
+#define VLE_VAL                xVEC_VLE\r
+#else\r
+#define VLE_VAL                0\r
+#endif\r
+\r
+#if defined(CFG_MPC5516 )\r
+#define RAMSEL_VAL             0x7\r
+#elif defined(CFG_MPC5668)\r
+#define RAMSEL_VAL             0x3\r
+#else\r
+#error  Please define RAMSEL_VAL\r
+#endif\r
+\r
+\r
+/* ----------------------------[private macro]-------------------------------*/\r
+\r
+\r
 #if defined(CFG_MPC5567)\r
 #define CALC_SYSTEM_CLOCK(_extal,_emfd,_eprediv,_erfd)  \\r
             ( (_extal) * ((_emfd)+4) / (((_eprediv)+1)*(1<<(_erfd))) )\r
@@ -44,8 +93,26 @@
             ( (_extal) * ((_emfd)+16) / (((_eprediv)+1)*((_erfd)+1)) )\r
 #endif\r
 \r
+/* ----------------------------[private typedef]-----------------------------*/\r
+\r
+\r
 typedef void (*vfunc_t)();\r
 \r
+\r
+/* ----------------------------[private function prototypes]-----------------*/\r
+/* ----------------------------[private variables]---------------------------*/\r
+\r
+#if defined(CFG_MPC5516)\r
+static uint32 Mcu_SavedHaltFlags;\r
+#else\r
+#error Implement halt flags\r
+#endif\r
+\r
+\r
+\r
+/* ----------------------------[private functions]---------------------------*/\r
+/* ----------------------------[public functions]----------------------------*/\r
+\r
 /* Function declarations. */\r
 static void Mcu_ConfigureFlash(void);\r
 \r
@@ -679,6 +746,8 @@ void Mcu_PerformReset(void)
 \r
 //-------------------------------------------------------------------\r
 \r
+#if defined(CFG_MPC5516) || defined(CFG_MPC5668)\r
+\r
 /**\r
  *\r
  * Application Notes!\r
@@ -691,75 +760,50 @@ void Mcu_PerformReset(void)
  */\r
 static void enterLowPower (Mcu_ModeType mcuMode )\r
 {\r
-#if defined(CFG_MPC5668)\r
+\r
+\r
        uint32 timeout;\r
-       /* Set the sleep bit; following a WAIT instruction, the device will go to sleep */\r
-       CRP.PSCR.B.SLEEP = 1;\r
+       /* - Set the sleep bit; following a WAIT instruction, the device will go to sleep\r
+        * - enable the 1.2V internal regulator when in sleep mode only\r
+        * - MPC5516\r
+        *   - 0x1 8k, 0x2 16k, 0x3 32k, 0x6 64k -- RAMs maintain power\r
+        * - MPC5668\r
+        *   - 0x1 32k, 0x2 64k, 0x3 128k\r
+        */\r
+       WRITE32(CRP_PSCR, PSCR_SLEEP | PSCR_SLP12EN | PCSR_RAMSEL(RAMSEL_VAL));\r
 \r
-       /* 0x1 32k, 0x2 64k, 0x3 128k -- RAMs maintain power */\r
-       CRP.PSCR.B.RAMSEL = 0x3;                // Keep all 128K\r
+       /* Set Recover Vector */\r
+#if defined(CFG_MPC5516)\r
 \r
-       CRP.Z6VEC.R = (uint32)&McuE_LowPowerRecoverFlash;\r
-#if defined(CFG_VLE)\r
-       CRP.Z6VEC.VLE = 1;\r
-#endif\r
 \r
-       /* If we "Mcu_Wakeup()" is located in RAM, set FASTREC */\r
-       CRP.RECPTR.B.FASTREC = 0;\r
 \r
+       WRITE32(CRP_Z1VEC, ((uint32)&McuE_LowPowerRecoverFlash) | VLE_VAL );\r
+       READWRITE32(CRP_RECPTR,RECPTR_FASTREC,0 );\r
+\r
+       Mcu_SavedHaltFlags = SIU.HLT.R;\r
        /* Halt everything */\r
-    SIU.HLT0.R = 0x037FFF3D;\r
-    SIU.HLT1.R = 0x18000F3C;\r
-    while((SIU.HLTACK0.R != 0x037FFF3D) && (SIU.HLTACK1.R != 0x18000F3C) && (timeout<3000)){}\r
+       SIU.HLT.R = 0x3FFFFFFF;\r
+       while((SIU.HLTACK.R != 0x3FFFFFFF) && (timeout<3000)) {}\r
 \r
        /* put Z0 in reset if not used for wakeup */\r
        CRP.Z0VEC.B.Z0RST = 1;\r
 \r
-       // TODO: Enable_all_internal_pull_devices (PULL_DOWN);\r
-\r
-       /* Save context and execute wait instruction.\r
-        *\r
-        * Things that matter here are\r
-        * - Z1VEC, determines where TLB0 will point. TLB0 is written with a\r
-        *   value at startup that 4K aligned to this address.\r
-        * - LowPower_Sleep() will save a interrupt context so we will return\r
-        *   intact.\r
-        * - For devices with little RAM we don't want to impose the alignment\r
-        *   requirements there. Almost as we have to occupy a 4K block for this..\r
-        *   although the code does not take that much space.\r
-        * */\r
-       McuE_EnterLowPower(mcuMode);\r
-\r
-    /* Clear sleep flags to allow pads to operate */\r
-       CRP.PSCR.B.SLEEPF = 0x1;\r
-\r
-#elif defined(CFG_MPC5516)\r
-       uint32 timeout;\r
-       /* Set the sleep bit; following a WAIT instruction, the device will go to sleep */\r
-       CRP.PSCR.B.SLEEP = 1;\r
-       /* enable the 1.2V internal regulator when in sleep mode only */\r
-       CRP.PSCR.B.STOP12EN = 1;\r
-       /* 0x1 8k, 0x2 16k, 0x3 32k, 0x6 64k -- RAMs maintain power */\r
-       CRP.PSCR.B.RAMSEL = 0x7;                // Keep all 80K\r
-\r
-       CRP.Z1VEC.R = (uint32)&McuE_LowPowerRecoverFlash;\r
-#if defined(CFG_VLE)\r
-       CRP.VLE = 1;\r
-#endif\r
-\r
-       /* If we "Mcu_Wakeup()" is located in RAM, set FASTREC */\r
-       CRP.RECPRTR.B.FASTREC = 0;\r
+#elif defined(CFG_MPC5668)\r
 \r
+       WRITE32(CRP_Z6VEC, ((uint32)&McuE_LowPowerRecoverFlash) | VLE_VAL );\r
+       READWRITE32(CRP_RECPTR,RECPTR_FASTREC,0 );\r
        /* Halt everything */\r
-       SIU.HLT.R = 0x3FFFFFFF;\r
-       while((SIU.HLTACK.R != 0x3FFFFFFF) && (timeout<3000)) {}\r
+    SIU.HLT0.R = 0x037FFF3D;\r
+    SIU.HLT1.R = 0x18000F3C;\r
+    while((SIU.HLTACK0.R != 0x037FFF3D) && (SIU.HLTACK1.R != 0x18000F3C) && (timeout<3000)){}\r
+#else\r
+#error CPU not defined\r
+#endif\r
 \r
        /* put Z0 in reset if not used for wakeup */\r
        CRP.Z0VEC.B.Z0RST = 1;\r
 \r
-       // TODO: Enable_all_internal_pull_devices (PULL_DOWN);\r
-\r
-       /* Save context and execute wait instruction.\r
+    /* Save context and execute wait instruction.\r
         *\r
         * Things that matter here are\r
         * - Z1VEC, determines where TLB0 will point. TLB0 is written with a\r
@@ -774,12 +818,9 @@ static void enterLowPower (Mcu_ModeType mcuMode )
 \r
     /* Clear sleep flags to allow pads to operate */\r
     CRP.PSCR.B.SLEEPF = 0x1;\r
-#else\r
-       /* NOT SUPPORTED */\r
-       (void) mcuMode;\r
-#endif\r
 }\r
 \r
+#endif\r
 \r
 void Mcu_SetMode( Mcu_ModeType mcuMode)\r
 {\r
@@ -789,6 +830,9 @@ void Mcu_SetMode( Mcu_ModeType mcuMode)
 \r
 #if defined(CFG_MPC5516) || defined(CFG_MPC5668)\r
        if( MCU_MODE_RUN == mcuMode ) {\r
+               /* Get Most back to "normal" halt flags */\r
+               SIU.HLT.R = Mcu_SavedHaltFlags;\r
+\r
 \r
        } else if( MCU_MODE_SLEEP == mcuMode ) {\r
                /*\r

diff --git a/arch/ppc/mpc55xx/drivers/Mcu_Sleep.sx b/arch/ppc/mpc55xx/drivers/Mcu_Sleep.sx
index 9f6d4919b6c8cb3e21d200997164ea6614b6ab45..d79c8d001393a63fe3b93b67b5db504142d79c0c 100644 (file)
--- a/arch/ppc/mpc55xx/drivers/Mcu_Sleep.sx
+++ b/arch/ppc/mpc55xx/drivers/Mcu_Sleep.sx
@@ -102,8 +102,6 @@ McuE_LowPowerRecoverFlash:
        mtCR    r29\r
        mtXER   r30\r
        mtCTR   r31                 // Load SPRs with GPR values\r
-       lmw     r2, 0(r1)           // Restore GPRs from stack\r
-       addi    r1,r1,0x94      // Deallocate space on stack\r
 \r
 #if defined(USE_ECUM)\r
 \r
@@ -112,8 +110,10 @@ McuE_LowPowerRecoverFlash:
        bl EcuM_CheckWakeup\r
 \r
 #endif\r
+       mtLR    r27\r
 \r
-\r
+       lmw     r2, 0(r1)           // Restore GPRs from stack\r
+       addi    r1,r1,0x94      // Deallocate space on stack\r
 \r
     /* branch back to Mcu_SetMode().. */\r
     blr\r

diff --git a/arch/ppc/mpc55xx/scripts/linkscript_gcc.ldf b/arch/ppc/mpc55xx/scripts/linkscript_gcc.ldf
index 146e6443623f39474eea496f10557ebb7b0fc8ce..65ab90012c377bd600b7e1335602477ed07ebfdf 100644 (file)
--- a/arch/ppc/mpc55xx/scripts/linkscript_gcc.ldf
+++ b/arch/ppc/mpc55xx/scripts/linkscript_gcc.ldf
@@ -46,7 +46,7 @@ MEMORY
 SECTIONS\r
 {\r
 \r
-#if 0\r
+\r
 /* __CALIB_RAM_START, __CALIB_RAM_END, __CALIB_ROM_START are needed by the a2l and the rte generator. \r
   CALIBRATION_ENABLED, CALIBRATION_INITIALIZED_RAM, CALIBRATION_FLS_START are generated by rte \r
 */\r
@@ -98,7 +98,7 @@ __FLS_PROG_START__ = 0;       /* Must be aligned to a sector start. */
 #if !defined(CFG_BOOT)\r
        .rcw __FLS_PROG_START__ : { *(.rcw) } > flash\r
 #endif\r
-#endif\r
+\r
     .text :\r
        {\r
            crt0.o(.text);\r

diff --git a/include/Gpt.h b/include/Gpt.h
index 703d1d1c4f7b21351a824490a6ea95d2f2889c9f..7db96b2c1dcc438d1b678d04382fead7f1057751 100644 (file)
--- a/include/Gpt.h
+++ b/include/Gpt.h
@@ -97,10 +97,6 @@ typedef uint8_t Gpt_ChannelType;
 #define GPT_AR_MINOR_VERSION     2\r
 #define GPT_AR_PATCH_VERSION     1\r
 \r
-#if (GPT_REPORT_WAKEUP_SOURCE==STD_ON)\r
-#include "EcuM_Cbk.h"          /* @req 4.0.3/GPT271 */\r
-#endif\r
-\r
 /* Needs Gpt_ConfigType */\r
 #include "Gpt_Cfg.h"           /* @req 4.0.3/GPT259 */\r
 \r

diff --git a/include/io.h b/include/io.h
index f0b13e5b6b0bf0b6e611128fc8d22e30ba452b64..f115d3766bb1d31a70782a95b1f55b732c268aac 100644 (file)
--- a/include/io.h
+++ b/include/io.h
@@ -37,6 +37,11 @@
 #define READ16_NA(address )                    ( (((uint16_t)(((uint8_t *)address)[0]))<<8) +  \\r
                                                                          (((uint16_t)(((uint8_t *)address)[1]))) )\r
 \r
+#define READWRITE32(address,mask,val)  WRITE32(address,(READ32(address)&~(mask))|val)\r
+\r
+\r
+\r
+/* NA - Not Aligned */\r
 #define WRITE32_NA(address, value ) \\r
        do { \\r
        ((uint8_t *)address)[0] = ((value>>24)&0xff); \\r

diff --git a/system/EcuM/EcuM_Main.c b/system/EcuM/EcuM_Main.c
index 10a9aef2098742a94defd3b56fb3b5b8a444738e..3fa423bf4757642a96ff13cfb41f012bfb3d59c5 100644 (file)
--- a/system/EcuM/EcuM_Main.c
+++ b/system/EcuM/EcuM_Main.c
@@ -185,13 +185,16 @@ static void in_state_goSleep( void ) {
                        /* @req 3.1.5/ECUM2389 */\r
                        EcuM_EnableWakeupSources( 1<< source );\r
 \r
+               }\r
+\r
 #if defined(WDGM)\r
-                       WdgM_SetMode(sleepModePtr->EcuMSleepModeWdgMMode);\r
+               WdgM_SetMode(sleepModePtr->EcuMSleepModeWdgMMode);\r
 #endif\r
 \r
-                       /* Let no one else run */\r
-                       GetResource(RES_SCHEDULER);\r
-               }\r
+               /* Let no one else run */\r
+               GetResource(RES_SCHEDULER);\r
+\r
+               set_current_state(ECUM_STATE_SLEEP);\r
 \r
        } else if( EcuM_GetPendingWakeupEvents() != 0 ) {\r
                /* We have pending wakeup events, need to startup again */\r
@@ -383,7 +386,7 @@ void EcuM_MainFunction(void){
                        break;\r
                case ECUM_STATE_SLEEP:\r
                        in_state_sleep();\r
-                       break;\r
+                       /* Flow Through */\r
                case ECUM_STATE_WAKEUP_ONE:\r
                {\r
                        /* TODO: we must have a normal RUN mode.. can't find any\r