* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-/**\r
- * @file Fls.c\r
- * @breif Autosar Flash driver for Freescale MPC55xx.\r
- */\r
-\r
-\r
+/* ----------------------------[information]----------------------------------*/\r
/*\r
- * IMPLEMENTATION NOTES\r
- * - It seems that the Autosar specification is not consistent. For\r
- * FLS_AC_LOAD_ON_JOB_START == STD_ON it seems that the driver suddenly\r
- * becomes blocking.\r
+ * Author: mahi\r
*\r
- */\r
-\r
-/*\r
- * Use cases:\r
- * 1. Bootloader, self replace\r
- * 2. Bootloader, application loading\r
+ * Part of Release:\r
+ * 3.0 (R3.0 V002)\r
+ *\r
+ * Description:\r
+ * Implements the Fls module (flash driver)\r
+ *\r
+ * Support:\r
+ * General Have Support\r
+ * -------------------------------------------\r
+ * FLS_AC_LOAD_ON_JOB_START Y\r
+ * FLS_BASE_ADDRESS Y, taken from FlashInfo\r
+ * FLS_CANCEL_API N\r
+ * FLS_COMPARE_API Y\r
+ * FLS_DEV_ERROR_DETECT Y\r
+ * FLS_GET_JOB_RESULT_API Y\r
+ * FLS_GET_STATUS_API Y\r
+ * FLS_SET_MODE_API N\r
+ * FLS_TOTAL_SIZE Y, taken from FlashInfo\r
+ * FLS_USE_INTERRUPTS N, no hardware support\r
+ * FLS_VERSION_INFO_API Y\r
+ *\r
+ * Device\r
+ * - MPC5668 , No support for shadow flash\r
+ * - MPC5606S , Support for dataflash only\r
*\r
- * In case 2 it's very straight forward and you can just use all the functions\r
- * as intended. In case 1. there are some problems understanding how Autosar\r
- * want to implement it. What is given from spec is.\r
- * - If FLS_AC_LOAD_ON_JOB_START == STD_ON we copy the flash access routines\r
- * to RAM( to FlsAcErase and FlsAcWrite ).\r
+ * Implementation Notes:\r
+ * Affected files:\r
+ * - Fls.c\r
+ * - Fls_Cfg.c/.h\r
+ * - flash_h7f_c90.c middle level driver\r
+ * - flash_ll_h7f_c90.c low level driver\r
+ * - flash.h interface for flash_xxx\r
*\r
- * Strange things:\r
- * - What happens to all the other functions that is needed to get the status\r
- * for the flash driver. Did the driver just get blocking ??\r
+ * Can't really tell if FlsMaxWriteFastMode, FlsMaxWriteNormalMode, etc is only\r
+ * for SPI flashes or not. Is it?\r
+ *\r
+ * Things left:\r
+ * - Virtual addresses, FLS209 is not done (code assumes FLS_BASE_ADDRESS is 0)\r
*\r
*/\r
\r
+/* ----------------------------[requirements]--------------------------------*/\r
+\r
+/* FlsGeneral, Complete for 3.0 */\r
+/** @req FLS172 */\r
+#warning ENABLE THESE AGAIN\r
+\r
+/** !req FLS169 */\r
+/** !req FLS285 */\r
+/** !req FLS286 */\r
+/** !req FLS287 */\r
+/** !req FLS288 */\r
+/** !req FLS289 */\r
+/** !req FLS290 */\r
+/** !req FLS291 */\r
+/** !req FLS170 */\r
+/** !req FLS292 */\r
+/** !req FLS293 */\r
+\r
+/* FlsConfigSet, Complete for 3.0 */\r
+/** !req FLS174 */\r
+/** !req FLS270 */\r
+/** !req FLS271 */\r
+/** !req FLS272 */\r
+/** @req FLS273 */\r
+/** @req FLS274 */\r
+/** !req FLS275 */\r
+/** !req FLS276 */\r
+/** @req FLS277 */\r
+/** @req FLS278 */\r
+/** !req FLS279 N/A in core */\r
+\r
+/* FlsPublishedInformation, Complete for 3.0 */\r
+/** !req FLS294 */\r
+/** !req FLS295 */\r
+/** !req FLS296 */\r
+/** !req FLS297 */\r
+/** !req FLS298 */\r
+/** !req FLS299 */\r
+/** !req FLS300 */\r
+/** !req FLS198 */\r
+/** !req FLS301 */\r
+\r
+/* FlsSectorList and FlsSector , Complete for 3.0 */\r
+/** !req FLS201 N/A in core since we use own format */\r
+/** !req FLS202 N/A in core since we use own format */\r
+/** !req FLS280 N/A in core since we use own format */\r
+/** !req FLS281 N/A in core since we use own format */\r
+/** !req FLS282 N/A in core since we use own format */\r
+/** !req FLS283 N/A in core since we use own format */\r
+\r
+\r
+/* ----------------------------[includes]------------------------------------*/\r
#include "Fls.h"\r
-/* Freescale driver */\r
-#include "ssd_types.h"\r
-#if defined(CFG_MPC5606S)\r
-#include "ssd_c90fl.h"\r
-#else\r
-#include "ssd_h7f.h"\r
-#endif\r
+#include "flash.h"\r
#include <stdlib.h>\r
#include <assert.h>\r
#include <string.h>\r
#endif\r
#include "Cpu.h"\r
#include "mpc55xx.h"\r
-#if defined(CFG_MPC5606S)\r
-#include "Fls_C90FL.h"\r
-#else\r
-#include "Fls_H7F.h"\r
-#endif\r
-/* Flash layout for MPC5516 */\r
-/*\r
- * Low: 8x16K + 2x64k\r
- * Mid: 2x128K\r
- * High: 8x128K\r
- */\r
-#if defined(CFG_MPC5606S)\r
-#define C90FL_REG_BASE (UINT32)&CFLASH0\r
-#define C90FL_CODE1_REG_BASE (UINT32)&CFLASH1\r
-#define C90FL_DATA_REG_BASE (UINT32)&DFLASH\r
-#else\r
-#define H7F_REG_BASE (UINT32)&FLASH\r
-#endif\r
-#define MAIN_ARRAY_BASE 0x00000000\r
\r
-#if defined(CFG_MPC5606S)\r
-#define MAIN_CODE1_ARRAY_BASE 0x00080000\r
-#define MAIN_DATA_ARRAY_BASE 0x00800000\r
+#if (FLS_BASE_ADDRESS != 0)\r
+#error Virtual addresses not supported\r
#endif\r
\r
-#ifdef CFG_MPC5516\r
-#define SHADOW_ROW_BASE 0x00FF8000\r
-#elif defined(CFG_MPC5567)\r
-#define SHADOW_ROW_BASE 0x00FFFC00\r
-#elif defined(CFG_MPC5606S)\r
-#define SHADOW_ROW_BASE 0x00200000\r
-#endif\r
-\r
-#if defined(CFG_MPC5606S)\r
-#define SHADOW_ROW_SIZE 0x00004000\r
-#define FLASH_PAGE_SIZE C90FL_PAGE_SIZE_08\r
-#else\r
-#define SHADOW_ROW_SIZE 0x00008000\r
-#define FLASH_PAGE_SIZE H7FB_PAGE_SIZE\r
-#endif\r
-#define FLASH_TOTAL_BLOCKS ( 20 )\r
-\r
-#if 0\r
-#define VFLAGS_ADDR_SECT (1<<0)\r
-#define VFLAGS_ADDR_PAGE (1<<1)\r
-#define VFLAGS_LEN_SECT (1<<2)\r
-#define VFLAGS_LEN_PAGE (1<<3)\r
-\r
-static inline int Fls_Validate( uint32 addr,uint32 length, uint32 api,uint32 rv ) {\r
- int i;\r
- int addrOk=0;\r
- uint32 flags_ok;\r
- const Fls_SectorType* sector;\r
- Fls_ConfigType *cfg = Fls_Global.config;\r
-\r
- // Pre checks.\r
- if( flags & VFLAGS_LEN_SECT ) {\r
- if( (addr + length) > FLS_TOTAL_SIZE ) {\r
- return (-1);\r
- }\r
- }\r
-\r
- for(i=0;i<cfg->FlsSectorListSize;i++) {\r
- sector = &cfg->FlsSectorList[sectorIndex];\r
- if( addr > (sector->FlsSectorStartaddress + sector->FlsNumberOfSectors * sector->FlsNumberOfSectors) ) {\r
- continue;\r
- }\r
- if( flags & VFLAGS_ADDR_SECT ) {\r
- if( (addr % sector->FlsSectorSize) == 0) {\r
- flags &= ~VFLAGS_ADDR_SECT;\r
- }\r
- }\r
- if( flags & VFLAGS_ADDR_PAGE ) {\r
- if( (addr % sector->FlsPageSize) == 0) {\r
- flags &= ~VFLAGS_ADDR_PAGE;\r
- }\r
- }\r
- if( flags & VFLAGS_LEN_SECT ) {\r
- // Check\r
- if( (0!= length) && (length < sectorPtr->FlsSectorSize) ) {\r
- flags &= ~VFLAGS_ADDR_SECT;\r
- }\r
- }\r
- if( flags & VFLAGS_LEN_PAGE ) {\r
- if( (0!= length) && (length < sectorPtr->FlsPageSize)) {\r
- flags &= ~VFLAGS_ADDR_PAGE;\r
- }\r
- }\r
- }\r
-}\r
-#endif\r
-\r
-#if ( FLS_DEV_ERROR_DETECT == STD_ON )\r
-#define FLS_VALIDATE_PARAM_ADDRESS_SECTOR_W_RV(_addr, _api, _rv)\\r
- int sectorIndex;\\r
- int addrOk=0;\\r
- const Fls_SectorType* sector;\\r
- for (sectorIndex=0; sectorIndex<Fls_Global.config->FlsSectorListSize;sectorIndex++) {\\r
- sector = &Fls_Global.config->FlsSectorList[sectorIndex];\\r
- if((((uint32)_addr-sector->FlsSectorStartaddress) / sector->FlsSectorSize)<sector->FlsNumberOfSectors){\\r
- /* Within the right adress space */\\r
- if (!(((uint32)_addr-sector->FlsSectorStartaddress) % sector->FlsSectorSize)){\\r
- /* Address is correctly aligned */\\r
- addrOk=1;\\r
- break;\\r
- }\\r
- }\\r
- }\\r
- if (1!=addrOk){\\r
- Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_PARAM_ADDRESS ); \\r
- return _rv; \\r
- }\r
-\r
-#define FLS_VALIDATE_PARAM_ADDRESS_PAGE_W_RV(_addr, _api, _rv)\\r
- int sectorIndex;\\r
- int addrOk=0;\\r
- const Fls_SectorType* sector;\\r
- for (sectorIndex=0; sectorIndex<Fls_Global.config->FlsSectorListSize;sectorIndex++) {\\r
- sector = &Fls_Global.config->FlsSectorList[sectorIndex];\\r
- if((((uint32)_addr-sector->FlsSectorStartaddress) / sector->FlsSectorSize)<sector->FlsNumberOfSectors){\\r
- /* Within the right adress space */\\r
- if (!(((uint32)_addr-sector->FlsSectorStartaddress) % sector->FlsPageSize)){\\r
- /* Address is correctly aligned */\\r
- addrOk=1;\\r
- break;\\r
- }\\r
- }\\r
- }\\r
- if (1!=addrOk){\\r
- Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_PARAM_ADDRESS ); \\r
- return _rv; \\r
- }\r
-\r
-#define FLS_VALIDATE_READ_PARAM_ADDRESS_PAGE_W_RV(_addr, _api, _rv)\\r
- int sectorIndex;\\r
- int addrOk=0;\\r
- const Fls_SectorType* sector;\\r
- for (sectorIndex=0; sectorIndex<Fls_Global.config->FlsSectorListSize;sectorIndex++) {\\r
- sector = &Fls_Global.config->FlsSectorList[sectorIndex];\\r
- if((((uint32)_addr-sector->FlsSectorStartaddress) / sector->FlsSectorSize)<sector->FlsNumberOfSectors){\\r
- /* Within the right adress space */\\r
- addrOk=1;\\r
- }\\r
- }\\r
- if (1!=addrOk){\\r
- Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_PARAM_ADDRESS ); \\r
- return _rv; \\r
- }\r
-\r
-#define FLS_VALIDATE_PARAM_LENGTH_PAGE_W_RV(_addr, _length, _api, _rv)\\r
- int i;\\r
- int lengthOk=0;\\r
- const Fls_SectorType* sectorPtr= &Fls_Global.config->FlsSectorList[0];\\r
- for (i=0; i<Fls_Global.config->FlsSectorListSize;i++) {\\r
- if ((sectorPtr->FlsSectorStartaddress + (sectorPtr->FlsNumberOfSectors * sectorPtr->FlsSectorSize))>=(uint32_t)(_addr+(_length))){\\r
- if ((0!=_length)&&!(_length % sectorPtr->FlsPageSize)){\\r
- lengthOk=1;\\r
- break;\\r
- }\\r
- }\\r
- sectorPtr++;\\r
- }\\r
- if (!lengthOk){\\r
- Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_PARAM_LENGTH ); \\r
- return _rv; \\r
- }\r
-\r
-#define FLS_VALIDATE_READ_PARAM_LENGTH_PAGE_W_RV(_addr, _length, _api, _rv)\\r
- int i;\\r
- int lengthOk=0;\\r
- const Fls_SectorType* sectorPtr= &Fls_Global.config->FlsSectorList[0];\\r
- for (i=0; i<Fls_Global.config->FlsSectorListSize;i++) {\\r
- if ((_length!=0) && (sectorPtr->FlsSectorStartaddress + (sectorPtr->FlsNumberOfSectors * sectorPtr->FlsSectorSize))>=(uint32_t)(_addr+(_length))){\\r
- lengthOk=1;\\r
- }\\r
- sectorPtr++;\\r
- }\\r
- if (!lengthOk){\\r
- Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_PARAM_LENGTH ); \\r
- return _rv; \\r
- }\r
-\r
-#define FLS_VALIDATE_PARAM_LENGTH_SECTOR_W_RV(_addr, _length, _api, _rv)\\r
- int i;\\r
- int lengthOk=0;\\r
- const Fls_SectorType* sectorPtr= &Fls_Global.config->FlsSectorList[0];\\r
- for (i=0; i<Fls_Global.config->FlsSectorListSize;i++) {\\r
- if ((sectorPtr->FlsSectorStartaddress + (sectorPtr->FlsNumberOfSectors * sectorPtr->FlsSectorSize))>=(uint32_t)(_addr+(_length))){\\r
- if ((0!=_length)&& !(_length % sectorPtr->FlsSectorSize)){\\r
- lengthOk=1;\\r
- break;\\r
- }\\r
- }\\r
- sectorPtr++;\\r
- }\\r
- if (!lengthOk){\\r
- Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_PARAM_LENGTH ); \\r
- return _rv; \\r
- }\r
-\r
-#define FLS_VALIDATE_STATUS_UNINIT(_status, _api)\\r
- if (MEMIF_UNINIT == _status){\\r
- Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_UNINIT); \\r
- return; \\r
- }\r
-\r
-#define FLS_VALIDATE_STATUS_UNINIT_W_RV(_status, _api, _rv)\\r
- if (MEMIF_UNINIT == _status){\\r
- Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_UNINIT); \\r
- return _rv; \\r
- }\r
+/* ----------------------------[private define]------------------------------*/\r
+/* ----------------------------[private macro]-------------------------------*/\r
\r
-#define FLS_VALIDATE_STATUS_BUSY(_status, _api)\\r
- if (MEMIF_BUSY == _status){\\r
- Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_BUSY); \\r
- return; \\r
- }\r
-\r
-#define FLS_VALIDATE_STATUS_BUSY_W_RV(_status, _api, _rv)\\r
- if (MEMIF_BUSY == _status){\\r
- Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_BUSY); \\r
- return _rv; \\r
- }\r
-\r
-#define FLS_VALIDATE_PARAM_DATA_W_RV(_ptr,_api, _rv) \\r
- if( (_ptr)==((void *)0) ) { \\r
- Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_PARAM_DATA); \\r
- return _rv; \\r
- }\r
-#else\r
- #define FLS_VALIDATE_PARAM_ADDRESS_SECTOR_W_RV(_addr, _api, _rv)\r
- #define FLS_VALIDATE_PARAM_ADDRESS_PAGE_W_RV(_addr, _api, _rv)\r
- #define FLS_VALIDATE_READ_PARAM_ADDRESS_PAGE_W_RV(_addr, _api, _rv)\r
- #define FLS_VALIDATE_PARAM_LENGTH_SECTOR_W_RV(_addr, _length, _api, _rv)\r
- #define FLS_VALIDATE_PARAM_LENGTH_PAGE_W_RV(_addr, _length, _api, _rv)\r
- #define FLS_VALIDATE_READ_PARAM_LENGTH_PAGE_W_RV(_addr, _length, _api, _rv)\r
- #define FLS_VALIDATE_STATUS_UNINIT_W_RV(_status, _api, _rv)\r
- #define FLS_VALIDATE_STATUS_BUSY(_status, _api)\r
- #define FLS_VALIDATE_STATUS_BUSY_W_RV(_status, _api, _rv)\r
- #define FLS_VALIDATE_PARAM_DATA_W_RV(_ptr,_api,_rv)\r
-#endif\r
\r
#if ( FLS_DEV_ERROR_DETECT == STD_ON )\r
#define DET_REPORTERROR(_x,_y,_z,_q) Det_ReportError(MODULE_ID_FLS, _y, _z, _q)\r
-#else\r
-#define DET_REPORTERROR(_x,_y,_z,_q)\r
-#endif\r
\r
-#if ( FLS_GET_JOB_RESULT_API == STD_ON)\r
#define FEE_JOB_END_NOTIFICATION() \\r
if( Fls_Global.config->FlsJobEndNotification != NULL ) { \\r
Fls_Global.config->FlsJobEndNotification(); \\r
}\r
+\r
#define FEE_JOB_ERROR_NOTIFICATION() \\r
if( Fls_Global.config->FlsJobErrorNotification != NULL ) { \\r
Fls_Global.config->FlsJobErrorNotification(); \\r
}\r
-#else\r
-#define FEE_JOB_END_NOTIFICATION()\r
-#define FEE_JOB_ERROR_NOTIFICATION()\r
-#endif\r
-\r
-\r
-\r
-/**\r
- * Get PC.\r
- * Since you can't read the PC on PPC, do the next best thing.\r
- * Ensure that the function is not inlined\r
- */\r
-static uint32 Fls_GetPc( void ) __attribute__ ((noinline));\r
\r
-static uint32 Fls_GetPc( void )\r
-{\r
- return get_spr(SPR_LR);\r
-}\r
+#define VALIDATE(_exp,_api,_err ) \\r
+ if( !(_exp) ) { \\r
+ Det_ReportError(MODULE_ID_FLS,0,_api,_err); \\r
+ return E_NOT_OK; \\r
+ }\r
\r
+#define VALIDATE_NO_RV(_exp,_api,_err ) \\r
+ if( !(_exp) ) { \\r
+ Det_ReportError(MODULE_ID_FLS,0,_api,_err); \\r
+ return; \\r
+ }\r
\r
-typedef struct {\r
- uint32 addr;\r
- uint32 size;\r
-} Fls_InternalSectorType;\r
+#define VALIDATE_W_RV(_exp,_api,_err,_rv ) \\r
+ if( !(_exp) ) { \\r
+ Det_ReportError(MODULE_ID_FLS,0,_api,_err); \\r
+ return (_rv); \\r
+ }\r
\r
\r
-SSD_CONFIG ssdConfig = {\r
-#if defined(CFG_MPC5606S)\r
- C90FL_REG_BASE, /* C90FL Flash control register base */\r
#else\r
- H7F_REG_BASE, /* H7F control register base */\r
-#endif\r
- MAIN_ARRAY_BASE, /* base of main array */\r
- 0, /* size of main array */\r
- SHADOW_ROW_BASE, /* base of shadow row */\r
- SHADOW_ROW_SIZE, /* size of shadow row */\r
- 0, /* block number in low address space */\r
- 0, /* block number in middle address space */\r
- 0, /* block number in high address space */\r
- 8, /* page size */\r
- FALSE, /* debug mode selection */\r
-};\r
-\r
-#if defined(CFG_MPC5606S)\r
-SSD_CONFIG ssdCode1Config = {\r
- C90FL_CODE1_REG_BASE, /* C90FL Data Flash control register base */\r
- MAIN_CODE1_ARRAY_BASE, /* base of main array */\r
- 0, /* size of main array */\r
- 0, /* base of shadow row. Not available on DFlash */\r
- 0, /* size of shadow row. Not available on DFlash */\r
- 0, /* block number in low address space */\r
- 0, /* block number in middle address space */\r
- 0, /* block number in high address space */\r
- FLASH_PAGE_SIZE, /* flash page size selection */\r
- FALSE /* debug mode selection */\r
-};\r
-\r
-SSD_CONFIG ssdDataConfig = {\r
- C90FL_DATA_REG_BASE, /* C90FL Data Flash control register base */\r
- MAIN_DATA_ARRAY_BASE, /* base of main array */\r
- 0, /* size of main array */\r
- 0, /* base of shadow row. Not available on DFlash */\r
- 0, /* size of shadow row. Not available on DFlash */\r
- 0, /* block number in low address space */\r
- 0, /* block number in middle address space */\r
- 0, /* block number in high address space */\r
- FLASH_PAGE_SIZE, /* flash page size selection */\r
- FALSE /* debug mode selection */\r
-};\r
+#define DET_REPORTERROR(_x,_y,_z,_q)\r
+#define FEE_JOB_END_NOTIFICATION()\r
+#define FEE_JOB_ERROR_NOTIFICATION()\r
+#define VALIDATE(_exp,_api,_err )\r
+#define VALIDATE_NO_RV(_exp,_api,_err )\r
+#define VALIDATE_W_RV(_exp,_api,_err,_rv )\r
+#define DET_REPORTERROR(_x,_y,_z,_q)\r
#endif\r
\r
-static Std_VersionInfoType _Fls_VersionInfo = {\r
- .vendorID = (uint16)1,\r
- .moduleID = (uint16) MODULE_ID_FLS,\r
- .instanceID = (uint8)1,\r
- /* Vendor numbers */\r
- .sw_major_version = (uint8)FLS_SW_MAJOR_VERSION,\r
- .sw_minor_version = (uint8)FLS_SW_MINOR_VERSION,\r
- .sw_patch_version = (uint8)FLS_SW_PATCH_VERSION,\r
- .ar_major_version = (uint8)FLS_AR_MAJOR_VERSION,\r
- .ar_minor_version = (uint8)FLS_AR_MINOR_VERSION,\r
- .ar_patch_version = (uint8)FLS_AR_PATCH_VERSION,\r
-};\r
+/* ----------------------------[private typedef]-----------------------------*/\r
\r
-//\r
typedef enum {\r
- FLS_JOB_NONE,\r
- FLS_JOB_COMPARE,\r
- FLS_JOB_ERASE,\r
- FLS_JOB_READ,\r
- FLS_JOB_WRITE,\r
+ FLS_JOB_NONE, FLS_JOB_COMPARE, FLS_JOB_ERASE, FLS_JOB_READ, FLS_JOB_WRITE,\r
} Fls_Arc_JobType;\r
\r
-#if 0\r
typedef struct {\r
- MemIf_StatusType status;\r
- MemIf_JobResultType jobResultType;\r
- Fls_Arc_JobType jobType;\r
- Fls_AddressType sourceAddr;\r
- uint8 *targetAddr;\r
- Fls_LengthType length;\r
+ uint32_t dest;\r
+ uint32_t size;\r
+ uint32_t source;\r
+ uint32_t left;\r
+} Fls_ProgInfoType;\r
\r
- Fls_ProgInfoType flashWriteInfo;\r
\r
-} FlsUnit_t;\r
-#endif\r
-\r
-\r
-#if 0\r
-static FlsUnit_t privData = {\r
- .status = MEMIF_UNINIT,\r
- .jobResultType = MEMIF_JOB_OK,\r
- .jobType = FLS_JOB_NONE,\r
-\r
-};\r
-#endif\r
-\r
-// Default Config\r
-#if 0\r
-const Fls_ConfigType * configDataPtr = &FlsConfigSet[0];\r
-#endif\r
-\r
-// TODO: Comment and cleanup\r
typedef struct {\r
- const Fls_ConfigType * config;\r
- Fls_EraseBlockType lockBits;\r
-\r
- MemIf_StatusType status;\r
- MemIf_JobResultType jobResultType;\r
- Fls_Arc_JobType jobType;\r
- Fls_AddressType sourceAddr;\r
- uint8 *targetAddr;\r
- Fls_LengthType length;\r
-\r
- Fls_ProgInfoType flashWriteInfo;\r
+ const Fls_ConfigType * config;\r
+ MemIf_StatusType status;\r
+ MemIf_JobResultType jobResultType;\r
+ Fls_Arc_JobType jobType;\r
+ Fls_AddressType sourceAddr;\r
+ uint8 * targetAddr;\r
+ Fls_LengthType length;\r
+ Fls_ProgInfoType flashWriteInfo;\r
+ bool mustCheck;\r
} Fls_GlobalType;\r
\r
Fls_GlobalType Fls_Global = {\r
- .status = MEMIF_UNINIT,\r
- .jobResultType = MEMIF_JOB_OK,\r
- .jobType = FLS_JOB_NONE,\r
+ .status = MEMIF_UNINIT,\r
+ .jobResultType = MEMIF_JOB_OK,\r
+ .jobType = FLS_JOB_NONE,\r
+ .mustCheck = 0,\r
};\r
\r
\r
-#if 0\r
-static inline uint32 rlwimi(uint32 val, uint16 sh, uint16 mb,uint16 me)\r
-{\r
- uint32 result;\r
- asm volatile("rlwimi %0,%1,8,16,23"\r
- : "=r" (result)\r
- : "r" (val),"g" (sh), "g" (mb), "g" (me) );\r
- return result;\r
-}\r
-\r
-#define CREATE_MASK(_start,_stop) rlwimi(0xffffffff,0x0,0x0,0x10)\r
-#endif\r
-\r
-/**\r
- * Converts an address to a freescale erase block.\r
- * Assumes addr is located from FLS_BASE_ADDRESS\r
- *\r
- * @param addr address to convert\r
- * @param rem pointer to reminder that gets filled in by the function\r
- * @return A block number\r
- */\r
-\r
-// TODO: This have hardcoded limits. Get from config instead\r
-static uint32 address_to_block( uint32 addr, uint32 *rem ) {\r
- uint32 block;\r
-\r
-#if defined(CFG_MPC5606S)\r
- /* CFLASH0 */\r
- if( addr < 0x80000 ) {\r
- if ( addr < 0x8000) {\r
- block = addr / 0x8000;\r
- *rem = addr % 0x8000;\r
- } else if ( addr < 0x10000) {\r
- block = 1 + ( addr - 0x8000 ) / 0x4000;\r
- *rem = addr % 0x4000;\r
- } else if ( addr < 0x20000 ) {\r
- block = 3 + ( addr - 0x10000 ) / 0x8000;\r
- *rem = addr % 0x8000;\r
- } else {\r
- block = 5 + ( addr - 0x20000 ) / 0x20000;\r
- *rem = addr % 0x20000;\r
- }\r
- }\r
- /* CFLASH1 */\r
- else if( addr < 0x100000 ) {\r
- block = (addr - 0x80000) / 0x20000;\r
- *rem = (addr - 0x80000) % 0x20000;\r
- }\r
- /* DFLASH */\r
- else if (( addr >= 0x800000 )&(addr < 0x810000)) {\r
- block = (addr - 0x800000) / 0x4000;\r
- *rem = (addr - 0x800000) % 0x4000;\r
- }\r
- else {\r
- block = (-1);\r
- *rem = (-1);\r
- }\r
\r
+/* ----------------------------[private function prototypes]-----------------*/\r
+/* ----------------------------[private variables]---------------------------*/\r
+static Std_VersionInfoType _Fls_VersionInfo = {\r
+ .vendorID = (uint16) 1,\r
+ .moduleID = (uint16) MODULE_ID_FLS,\r
+ .instanceID = (uint8) 1,\r
+ /* Vendor numbers */\r
+ .sw_major_version = (uint8) FLS_SW_MAJOR_VERSION,\r
+ .sw_minor_version = (uint8) FLS_SW_MINOR_VERSION,\r
+ .sw_patch_version = (uint8) FLS_SW_PATCH_VERSION,\r
+ .ar_major_version = (uint8) FLS_AR_MAJOR_VERSION,\r
+ .ar_minor_version = (uint8) FLS_AR_MINOR_VERSION,\r
+ .ar_patch_version = (uint8) FLS_AR_PATCH_VERSION, };\r
\r
-#else\r
- if( addr < 0x20000) {\r
- // Low range, 8x16K\r
- block = addr / 0x4000;\r
- *rem = addr % 0x4000;\r
- } else if ( addr < 0x40000) {\r
- // Low range, 2x64k range\r
- block = 8 + ( addr - 0x20000 ) / 0x10000;\r
- *rem = addr % 0x10000;\r
- } else if( addr < 0x80000 ) {\r
- // mid range\r
- block = 10 + ( addr - 0x40000 ) / 0x20000;\r
- *rem = addr % 0x20000;\r
- } else if( addr < 0x180000 ) {\r
- // high range\r
- block = 12 + ( addr - 0x80000 ) / 0x20000;\r
- *rem = addr % 0x20000;\r
- } else {\r
- block = (-1);\r
- *rem = (-1);\r
- }\r
-#endif\r
- return block;\r
-}\r
+/* ----------------------------[private functions]---------------------------*/\r
\r
\r
/**\r
- * Converts an address range( addr to addr + size) to freescale bit erase\r
- * blocks. The function adds the erase block information to eraseBlocks ptr.\r
- *\r
- * @param eraseBlocks Ptr to an erase structure\r
- * @param addr The start-address to convert\r
- * @param size The size of the block\r
- * @return The test results\r
+ * Get PC.\r
+ * Since you can't read the PC on PPC, do the next best thing.\r
+ * Ensure that the function is not inlined\r
*/\r
-static void address_to_erase_blocks( Fls_EraseBlockType *eraseBlocks, uint32 addr, uint32 size ) {\r
-// EraseBlock_t eraseBlocks;\r
- uint32 startBlock;\r
- uint32 endBlock;\r
- uint32 mask1;\r
- uint32 mask2;\r
- uint32 mask;\r
- uint32 rem;\r
-\r
- /* Create a mask with continuous set of 1's */\r
- startBlock = address_to_block( addr,&rem );\r
- endBlock = address_to_block( addr + size - 1,&rem );\r
-\r
- // Check so our implementation holds..\r
- assert( endBlock <= FLASH_TOTAL_BLOCKS );\r
-\r
-#define BLOCK_MASK 0x0003ffffUL\r
-\r
- // create the mask\r
- mask1 = ((-1UL)<<(31-endBlock))>>(31-endBlock);\r
- mask2 = ((-1UL)>>startBlock)<<startBlock;\r
- mask = mask1 & mask2;\r
-\r
-#if defined( MPC5606S )\r
- eraseBlocks->lowEnabledBlocks = mask&0xffff; // Bits 0..15 indicats low blocks\r
- eraseBlocks->midEnabledBlocks = (mask>>16)&3; // Bits 16..17 indicats mid blocks\r
- eraseBlocks->highEnabledBlocks = mask>>18; // Bits 18..23 indicats high blocks\r
-#else\r
- // shift things in to make freescale driver happy\r
- eraseBlocks->lowEnabledBlocks = mask&0x3ff; // Bits 0..9 indicats low blocks\r
- eraseBlocks->midEnabledBlocks = (mask>>10)&3; // Bits 10..11 indicats mid blocks\r
- eraseBlocks->highEnabledBlocks = mask>>12; // Bits 12..19 indicats high blocks\r
-#endif\r
+#if 0\r
+static uint32 Fls_GetPc(void) __attribute__ ((noinline));\r
\r
- return ;\r
+static uint32 Fls_GetPc(void) {\r
+ return get_spr(SPR_LR);\r
}\r
-\r
-\r
-void Fls_Init( const Fls_ConfigType *ConfigPtr )\r
-{\r
- FLS_VALIDATE_STATUS_BUSY(Fls_Global.status, FLS_INIT_ID);\r
- Fls_Global.status = MEMIF_UNINIT;\r
- Fls_Global.jobResultType = MEMIF_JOB_PENDING;\r
- uint32 returnCode;\r
- Fls_EraseBlockType eraseBlocks;\r
- // TODO: FLS_E_PARAM_CONFIG\r
- Fls_Global.config = ConfigPtr;\r
-\r
-#if (FLS_AC_LOAD_ON_JOB_START == STD_ON )\r
- /* Copy fls routines to RAM */\r
- memcpy(__FLS_ERASE_RAM__,__FLS_ERASE_ROM__, (size_t)&__FLS_SIZE__);\r
-\r
#endif\r
\r
-\r
- returnCode = FlashInit( &ssdConfig );\r
-#if defined( CFG_MPC5606S )\r
- returnCode = FlashInit( &ssdCode1Config );\r
- returnCode = FlashInit( &ssdDataConfig );\r
+static void fls_EraseFail( void ) {\r
+ Fls_Global.jobResultType = MEMIF_JOB_FAILED;\r
+ Fls_Global.jobType = FLS_JOB_NONE;\r
+ Fls_Global.status = MEMIF_IDLE;\r
+#if defined(USE_DEM)\r
+ Dem_ReportErrorStatus(FLS_E_ERASE_FAILED, DEM_EVENT_STATUS_FAILED);\r
#endif\r
+ FEE_JOB_ERROR_NOTIFICATION();\r
+}\r
\r
- // Lock shadow row..\r
- eraseBlocks.lowEnabledBlocks = 0;\r
- eraseBlocks.midEnabledBlocks = 0;\r
- eraseBlocks.highEnabledBlocks = 0;\r
- eraseBlocks.shadowBlocks = 1;\r
-\r
-#if defined(CFG_MPC5606S)\r
- Fls_C90FL_SetLock(&ssdConfig,&eraseBlocks,1);\r
-#else\r
- Fls_H7F_SetLock(&eraseBlocks,1);\r
+static void fls_WriteFail( void ) {\r
+ Fls_Global.jobResultType = MEMIF_JOB_FAILED;\r
+ Fls_Global.jobType = FLS_JOB_NONE;\r
+ Fls_Global.status = MEMIF_IDLE;\r
+#if defined(USE_DEM)\r
+ Dem_ReportErrorStatus(FLS_E_WRITE_FAILED, DEM_EVENT_STATUS_FAILED);\r
#endif\r
+ FEE_JOB_ERROR_NOTIFICATION();\r
\r
- Fls_Global.status = MEMIF_IDLE;\r
- Fls_Global.jobResultType = MEMIF_JOB_OK;\r
- return;\r
}\r
\r
-/* TargetAddress always from 0 to FLS_TOTAL_SIZE */\r
-Std_ReturnType Fls_Erase( Fls_AddressType TargetAddress,\r
- Fls_LengthType Length )\r
-{\r
- uint32 endBlock;\r
- uint32 startBlock;\r
- uint32 rem;\r
- Fls_EraseBlockType eraseBlock;\r
- Fls_EraseInfoType eraseInfo;\r
- uint32 pc;\r
-\r
- FLS_VALIDATE_STATUS_UNINIT_W_RV(Fls_Global.status, FLS_ERASE_ID, E_NOT_OK);\r
- FLS_VALIDATE_STATUS_BUSY_W_RV(Fls_Global.status, FLS_ERASE_ID, E_NOT_OK);\r
- FLS_VALIDATE_PARAM_ADDRESS_SECTOR_W_RV(TargetAddress, FLS_ERASE_ID, E_NOT_OK);\r
- FLS_VALIDATE_PARAM_LENGTH_SECTOR_W_RV(TargetAddress, Length, FLS_ERASE_ID, E_NOT_OK);\r
-\r
- // Always check if status is not busy\r
- if (Fls_Global.status == MEMIF_BUSY )\r
- return E_NOT_OK;\r
-\r
- // TargetAddress\r
- startBlock = address_to_block(TargetAddress,&rem);\r
-\r
- if( (startBlock == (-1)) || (rem!=0) ) {\r
- DET_REPORTERROR(MODULE_ID_FLS,0,0x0,FLS_E_PARAM_ADDRESS );\r
- return E_NOT_OK;\r
- }\r
+/* ----------------------------[public functions]----------------------------*/\r
\r
- endBlock = address_to_block(TargetAddress+Length,&rem);\r
+/**\r
+ *\r
+ * @param ConfigPtr\r
+ */\r
\r
- // Check if we trying to erase a partition that we are executing in\r
- pc = Fls_GetPc();\r
- if( (pc >= FLS_BASE_ADDRESS) && ( pc <= (FLS_BASE_ADDRESS + FLS_TOTAL_SIZE) ) ) {\r
- // In flash erase\r
- uint32 pcBlock = address_to_block(pc,&rem);\r
- uint8 *partMap = Fls_Global.config->FlsBlockToPartitionMap;\r
+void Fls_Init(const Fls_ConfigType *ConfigPtr) {\r
+ /** @req FLS249 3.0 */\r
+ /** @req FLS191 3.0 */\r
+ /** @req FLS014 3.0 */\r
+ /** @req FLS086 3.0 */\r
+ /** @req FLS015 3.0 */\r
+ /** !req FLS048 TODO, true? */\r
+ /** !req FLS271 NO_SUPPORT 3.0 */\r
+ /** !req FLS325 NO_SUPPORT 4.0 */\r
+ /** !req FLS326 NO_SUPPORT 4.0 */\r
+\r
+ /** @req FLS268 */\r
+ VALIDATE_NO_RV(Fls_Global.status!=MEMIF_BUSY,FLS_INIT_ID, FLS_E_BUSY );\r
+\r
+ Fls_Global.status = MEMIF_UNINIT;\r
+ Fls_Global.jobResultType = MEMIF_JOB_PENDING;\r
+ // TODO: FLS_E_PARAM_CONFIG\r
+\r
+ /** @req FLS191 */\r
+ Fls_Global.config = ConfigPtr;\r
+\r
+ Flash_Init();\r
+\r
+ /** @req FLS016 3.0 *//** @req FLS323 4.0 *//** @req FLS324 4.0*/\r
+ Fls_Global.status = MEMIF_IDLE;\r
+ Fls_Global.jobResultType = MEMIF_JOB_OK;\r
+ return;\r
+}\r
\r
- if( (partMap[pcBlock] >= partMap[startBlock]) && (partMap[pcBlock] <= partMap[endBlock]) ) {\r
- // Can't erase and in the same partition we are executing\r
- assert(0);\r
- }\r
- }\r
+/**\r
+ * Erase flash sectors\r
+ *\r
+ * @param TargetAddress Always from 0 to FLS_TOTAL_SIZE\r
+ * @param Length\r
+ * @return\r
+ */\r
+Std_ReturnType Fls_Erase(Fls_AddressType TargetAddress, Fls_LengthType Length) {\r
+ TargetAddress += FLS_BASE_ADDRESS;\r
+\r
+ /** @req FLS250 3.0/4.0 */\r
+ /** @req FLS218 3.0/4.0 */\r
+ /** @req FLS220 3.0/4.0 */\r
+ /** @req FLS327 4.0 */\r
+\r
+ /** @req FLS065 */\r
+ VALIDATE_W_RV( Fls_Global.status != MEMIF_UNINIT, FLS_ERASE_ID, FLS_E_UNINIT, E_NOT_OK );\r
+ /** @req FLS023 */\r
+ VALIDATE_W_RV( Fls_Global.status != MEMIF_BUSY, FLS_ERASE_ID, FLS_E_BUSY, E_NOT_OK );\r
+ /** @req FLS020 3.0/4.0 */\r
+ VALIDATE_W_RV( EE_OK == Flash_SectorAligned(Fls_Global.config->FlsInfo, TargetAddress ),\r
+ FLS_ERASE_ID, FLS_E_PARAM_ADDRESS, E_NOT_OK );\r
+ /** @req FLS021 3.0/4.0 */\r
+ VALIDATE_W_RV( (Length != 0) && (EE_OK == Flash_SectorAligned( Fls_Global.config->FlsInfo, TargetAddress + Length)),\r
+ FLS_ERASE_ID, FLS_E_PARAM_LENGTH, E_NOT_OK );\r
+\r
+ // Check if we trying to erase a partition that we are executing in\r
+#if 0\r
+ pc = Fls_GetPc();\r
+#endif\r
\r
- Fls_Global.status = MEMIF_BUSY;\r
- Fls_Global.jobResultType = MEMIF_JOB_PENDING;\r
- Fls_Global.jobType = FLS_JOB_ERASE;\r
\r
- address_to_erase_blocks(&eraseBlock,TargetAddress,Length);\r
+ Fls_Global.status = MEMIF_BUSY; /** @req FLS219 3.0 */ /** @req FLS328 4.0 */\r
+ Fls_Global.jobResultType = MEMIF_JOB_PENDING; /** @req FLS329 4.0 */\r
+ Fls_Global.jobType = FLS_JOB_ERASE;\r
+ /* Unlock */\r
+ Flash_Lock(Fls_Global.config->FlsInfo,FLASH_OP_UNLOCK,TargetAddress, Length );\r
\r
- eraseBlock.shadowBlocks = 0;\r
- // Unlock\r
+ /** @req FLS145 */\r
+ Flash_Erase(Fls_Global.config->FlsInfo,TargetAddress, Length, NULL );\r
\r
-#if defined( CFG_MPC5606S )\r
- if ( TargetAddress < 0x80000 ) {\r
- Fls_C90FL_SetLock(&ssdConfig, &eraseBlock,0);\r
- }\r
- else if ( TargetAddress < 0x100000 ){\r
- Fls_C90FL_SetLock(&ssdCode1Config, &eraseBlock,0);\r
- }\r
- else {\r
- Fls_C90FL_SetLock(&ssdDataConfig, &eraseBlock,0);\r
- }\r
-#else\r
- Fls_H7F_SetLock(&eraseBlock,0);\r
-#endif\r
- eraseInfo.state = 0; // Always set this\r
-\r
-\r
-#if defined( CFG_MPC5606S )\r
- Fls_Global.sourceAddr = TargetAddress;\r
-\r
- if ( TargetAddress < 0x80000 ) {\r
- Fls_C90FL_FlashErase ( &ssdConfig ,\r
- 0, // shadowFlag...\r
- eraseBlock.lowEnabledBlocks,\r
- eraseBlock.midEnabledBlocks,\r
- eraseBlock.highEnabledBlocks,\r
- &eraseInfo\r
- );\r
- }\r
- else if ( TargetAddress < 0x100000 ){\r
- Fls_C90FL_FlashErase ( &ssdCode1Config ,\r
- 0, // shadowFlag...\r
- eraseBlock.lowEnabledBlocks,\r
- eraseBlock.midEnabledBlocks,\r
- eraseBlock.highEnabledBlocks,\r
- &eraseInfo\r
- );\r
- }\r
- else {\r
- Fls_C90FL_FlashErase ( &ssdDataConfig ,\r
- 0, // shadowFlag...\r
- eraseBlock.lowEnabledBlocks,\r
- eraseBlock.midEnabledBlocks,\r
- eraseBlock.highEnabledBlocks,\r
- &eraseInfo\r
- );\r
- }\r
-\r
-#else\r
- Fls_H7F_FlashErase ( &ssdConfig ,\r
- 0, // shadowFlag...\r
- eraseBlock.lowEnabledBlocks,\r
- eraseBlock.midEnabledBlocks,\r
- eraseBlock.highEnabledBlocks,\r
- &eraseInfo\r
- );\r
-#endif\r
- return E_OK;\r
+ return E_OK; /** @req FLS330 4.0 */\r
}\r
\r
\r
-Std_ReturnType Fls_Write ( Fls_AddressType TargetAddress,\r
- const uint8 *SourceAddressPtr,\r
- Fls_LengthType Length )\r
-{\r
- Fls_EraseBlockType eraseBlock;\r
-\r
- FLS_VALIDATE_STATUS_UNINIT_W_RV(Fls_Global.status, FLS_WRITE_ID, E_NOT_OK);\r
- FLS_VALIDATE_STATUS_BUSY_W_RV(Fls_Global.status, FLS_WRITE_ID, E_NOT_OK);\r
- FLS_VALIDATE_PARAM_ADDRESS_PAGE_W_RV(TargetAddress, FLS_WRITE_ID, E_NOT_OK);\r
- FLS_VALIDATE_PARAM_LENGTH_PAGE_W_RV(TargetAddress, Length, FLS_WRITE_ID, E_NOT_OK);\r
- FLS_VALIDATE_PARAM_DATA_W_RV(SourceAddressPtr, FLS_WRITE_ID, E_NOT_OK)\r
-\r
- // Always check if status is not busy\r
- if (Fls_Global.status == MEMIF_BUSY )\r
- return E_NOT_OK;\r
-\r
- // Destination is FLS_BASE_ADDRESS + TargetAddress\r
- Fls_Global.jobResultType = MEMIF_JOB_PENDING;\r
- Fls_Global.status = MEMIF_BUSY;\r
- Fls_Global.jobType = FLS_JOB_WRITE;\r
-\r
- // Fill in the required fields for programming...\r
- Fls_Global.flashWriteInfo.source = (uint32)SourceAddressPtr;\r
- Fls_Global.flashWriteInfo.dest = TargetAddress;\r
- Fls_Global.flashWriteInfo.size = Length;\r
-\r
- // unlock flash....\r
- address_to_erase_blocks(&eraseBlock,TargetAddress,Length);\r
- eraseBlock.shadowBlocks = 0;\r
-\r
-#if defined( CFG_MPC5606S )\r
- if ( TargetAddress < 0x80000 ) {\r
- Fls_C90FL_SetLock(&ssdConfig, &eraseBlock,0);\r
- }\r
- else if ( TargetAddress < 0x100000 ){\r
- Fls_C90FL_SetLock(&ssdCode1Config, &eraseBlock,0);\r
- }\r
- else {\r
- Fls_C90FL_SetLock(&ssdDataConfig, &eraseBlock,0);\r
- }\r
-#else\r
- Fls_H7F_SetLock(&eraseBlock,0);\r
-#endif\r
- return E_OK;\r
+/**\r
+ * Programs flash sectors\r
+ *\r
+ * @param TargetAddress\r
+ * @param SourceAddressPtr\r
+ * @param Length\r
+ * @return\r
+ */\r
+\r
+Std_ReturnType Fls_Write(Fls_AddressType TargetAddress,\r
+ const uint8 *SourceAddressPtr, Fls_LengthType Length) {\r
+ TargetAddress += FLS_BASE_ADDRESS;\r
+\r
+ /** @req FLS251 3.0 */\r
+ /** @req FLS223 3.0 */\r
+ /** @req FLS225 3.0/4.0 */\r
+ /** @req FLS226 3.0/4.0 */\r
+\r
+ /** @req FLS066 3.0/4.0 */\r
+ /** @req FLS030 3.0/4.0 */\r
+ /** @req FLS157 3.0/4.0 */\r
+ /** @req FLS026 3.0/4.0 */\r
+ /** @req FLS027 3.0/4.0 */\r
+ VALIDATE_W_RV(Fls_Global.status != MEMIF_UNINIT,FLS_WRITE_ID, FLS_E_UNINIT,E_NOT_OK );\r
+ VALIDATE_W_RV(Fls_Global.status != MEMIF_BUSY,FLS_WRITE_ID, FLS_E_BUSY,E_NOT_OK );\r
+ VALIDATE_W_RV(SourceAddressPtr != ((void *)0),FLS_WRITE_ID, FLS_E_PARAM_DATA,E_NOT_OK );\r
+ VALIDATE_W_RV( TargetAddress % FLASH_PAGE_SIZE == 0, FLS_WRITE_ID, FLS_E_PARAM_ADDRESS, E_NOT_OK );\r
+ VALIDATE_W_RV( (Length != 0) && (((TargetAddress + Length) % FLASH_PAGE_SIZE) == 0) && ((TargetAddress + Length) < (FLS_BASE_ADDRESS + FLS_TOTAL_SIZE)),\r
+ FLS_WRITE_ID, FLS_E_PARAM_LENGTH, E_NOT_OK );\r
+\r
+ // Destination is FLS_BASE_ADDRESS + TargetAddress\r
+ /** @req FLS224 3.0 */ /** @req FLS333 4.0 */\r
+ Fls_Global.jobResultType = MEMIF_JOB_PENDING;\r
+ /** @req FLS332 4.0 */\r
+ Fls_Global.status = MEMIF_BUSY;\r
+ Fls_Global.jobType = FLS_JOB_WRITE;\r
+\r
+ // Fill in the required fields for programming...\r
+ /** @req FLS331 4.0 */\r
+ Fls_Global.flashWriteInfo.source = (uint32) SourceAddressPtr;\r
+ Fls_Global.flashWriteInfo.dest = TargetAddress;\r
+ Fls_Global.flashWriteInfo.left = Length;\r
+\r
+ // unlock flash....\r
+ Flash_Lock(Fls_Global.config->FlsInfo,FLASH_OP_UNLOCK, TargetAddress, Length );\r
+ // Program\r
+ /** @req FLS146 3.0/4.0 */\r
+ Flash_ProgramPageStart( Fls_Global.config->FlsInfo,\r
+ &Fls_Global.flashWriteInfo.dest,\r
+ &Fls_Global.flashWriteInfo.source,\r
+ &Fls_Global.flashWriteInfo.left,\r
+ NULL);\r
+\r
+ return E_OK; /** @req FLS334 4.0 */\r
}\r
\r
#if ( FLS_CANCEL_API == STD_ON )\r
}\r
#endif\r
\r
-\r
#if ( FLS_GET_STATUS_API == STD_ON )\r
-MemIf_StatusType Fls_GetStatus( void )\r
+MemIf_StatusType Fls_GetStatus( void )\r
{\r
- return Fls_Global.status;\r
+ return Fls_Global.status;\r
}\r
#endif\r
\r
-\r
#if ( FLS_GET_JOB_RESULT_API == STD_ON )\r
MemIf_JobResultType Fls_GetJobResult( void )\r
{\r
- return Fls_Global.jobResultType;\r
+ return Fls_Global.jobResultType;\r
}\r
#endif\r
\r
+void Fls_MainFunction(void) {\r
+ /** @req FLS255 */\r
+ /** @req FLS266 */\r
+ /** @req FLS038 */\r
+ /** !req FLS040 No support for Fls_ConfigSetType.FlsMaxXXXX */\r
+ /** !req FLS104 */\r
+ /** !req FLS105 */\r
+ /** !req FLS106 */\r
+ /** !req FLS154 */\r
+ /** !req FLS200 */\r
+ /** !req FLS022 */\r
+ /** !req FLS055 */\r
+ /** !req FLS056 */\r
+ /** !req FLS052 */\r
+ /** !req FLS232 */\r
+ /** !req FLS233 */\r
+ /** !req FLS234 */\r
+ /** !req FLS235 */\r
+ /** !req FLS272 */\r
+ /** !req FLS196 */\r
+\r
+\r
+\r
+ uint32 flashStatus;\r
+ int result;\r
+\r
+ /** @req FLS117 */\r
+ VALIDATE_NO_RV(Fls_Global.status != MEMIF_UNINIT,FLS_MAIN_FUNCTION_ID, FLS_E_UNINIT );\r
+\r
+ /** @req FLS039 */\r
+ if ( Fls_Global.jobResultType == MEMIF_JOB_PENDING) {\r
+ switch (Fls_Global.jobType) {\r
+ case FLS_JOB_COMPARE:\r
+ /** @req FLS243 */\r
+\r
+ // NOT implemented. Hardware error = FLS_E_COMPARE_FAILED\r
+ // ( we are reading directly from flash so it makes no sense )\r
+\r
+ /** @req FLS244 */\r
+ result = memcmp(Fls_Global.targetAddr,\r
+ (void *) Fls_Global.sourceAddr, Fls_Global.length);\r
+ if (result == 0) {\r
+ Fls_Global.jobResultType = MEMIF_JOB_OK;\r
+ } else {\r
+ Fls_Global.jobResultType = MEMIF_BLOCK_INCONSISTENT;\r
+ }\r
+ Fls_Global.status = MEMIF_IDLE;\r
+ Fls_Global.jobType = FLS_JOB_NONE;\r
+\r
+ break;\r
+ case FLS_JOB_ERASE: {\r
+\r
+ flashStatus = Flash_CheckStatus(Fls_Global.config->FlsInfo);\r
+\r
+ if (flashStatus == EE_OK ) {\r
+ Fls_Global.jobResultType = MEMIF_JOB_OK;\r
+ Fls_Global.jobType = FLS_JOB_NONE;\r
+ Fls_Global.status = MEMIF_IDLE;\r
+ FEE_JOB_END_NOTIFICATION();\r
+ } else if (flashStatus == EE_INFO_HVOP_INPROGRESS) {\r
+ /* Busy, Do nothing */\r
+ } else {\r
+ // Error\r
+ fls_EraseFail();\r
+ }\r
+ break;\r
+ }\r
+ case FLS_JOB_READ:\r
+ /** @req FLS238 */\r
+ /** @req FLS239 */\r
+\r
+ // NOT implemented. Hardware error = FLS_E_READ_FAILED\r
+ // ( we are reading directly from flash so it makes no sense )\r
+ memcpy(Fls_Global.targetAddr, (void *) Fls_Global.sourceAddr,\r
+ Fls_Global.length);\r
+ Fls_Global.jobResultType = MEMIF_JOB_OK;\r
+ Fls_Global.status = MEMIF_IDLE;\r
+ Fls_Global.jobType = FLS_JOB_NONE;\r
+ FEE_JOB_END_NOTIFICATION();\r
+ break;\r
+\r
+ case FLS_JOB_WRITE:\r
+ {\r
+\r
+ do {\r
+ flashStatus = Flash_CheckStatus(Fls_Global.config->FlsInfo);\r
+\r
+ if (flashStatus == EE_OK ) {\r
+\r
+ if( Fls_Global.flashWriteInfo.left == 0 ) {\r
+ Fls_Global.mustCheck = 0;\r
+ /* Done! */\r
+ Fls_Global.jobResultType = MEMIF_JOB_OK;\r
+ Fls_Global.status = MEMIF_IDLE;\r
+ Fls_Global.jobType = FLS_JOB_NONE;\r
+ FEE_JOB_END_NOTIFICATION();\r
+ break;\r
+ }\r
+\r
+ flashStatus = Flash_ProgramPageStart(Fls_Global.config->FlsInfo,\r
+ &Fls_Global.flashWriteInfo.dest,\r
+ &Fls_Global.flashWriteInfo.source,\r
+ &Fls_Global.flashWriteInfo.left,\r
+ NULL);\r
+ Fls_Global.mustCheck = 1;\r
+ if( flashStatus != EE_OK ) {\r
+ Fls_Global.mustCheck = 0;\r
+ fls_WriteFail();\r
+ break;\r
+ }\r
+ } else if( flashStatus == EE_INFO_HVOP_INPROGRESS ) {\r
+ /* Wait for it */\r
+ } else {\r
+ fls_WriteFail();\r
+ /* Nothing to do, quit loop */\r
+ break;\r
+ }\r
+ } while(Fls_Global.flashWriteInfo.left && Fls_Global.mustCheck );\r
+\r
+ break;\r
+ }\r
+ case FLS_JOB_NONE:\r
+ assert(0);\r
+ break;\r
\r
-void Fls_MainFunction( void )\r
-{\r
- uint32 flashStatus;\r
- int result;\r
-\r
- FLS_VALIDATE_STATUS_UNINIT(Fls_Global.status, FLS_ERASE_ID);\r
-\r
- if( Fls_Global.jobResultType == MEMIF_JOB_PENDING ) {\r
- switch(Fls_Global.jobType) {\r
- case FLS_JOB_COMPARE:\r
- // NOT implemented. Hardware error = FLS_E_COMPARE_FAILED\r
- // ( we are reading directly from flash so it makes no sense )\r
-\r
- result = memcmp(Fls_Global.targetAddr,(void *)Fls_Global.sourceAddr,Fls_Global.length);\r
- if( result == 0 ) {\r
- Fls_Global.jobResultType = MEMIF_JOB_OK;\r
- } else {\r
- Fls_Global.jobResultType = MEMIF_BLOCK_INCONSISTENT;\r
- }\r
- Fls_Global.status = MEMIF_IDLE;\r
- Fls_Global.jobType = FLS_JOB_NONE;\r
-\r
- break;\r
- case FLS_JOB_ERASE:\r
- {\r
-// uint32 failAddress;\r
-// uint32 failData;\r
-#if defined(CFG_MPC5606S)\r
- if ( Fls_Global.sourceAddr < 0x80000 ) {\r
- flashStatus = Fls_C90FL_EraseStatus(&ssdConfig);\r
- }\r
- else if ( Fls_Global.sourceAddr < 0x100000 ){\r
- flashStatus = Fls_C90FL_EraseStatus(&ssdCode1Config);\r
- }\r
- else {\r
- flashStatus = Fls_C90FL_EraseStatus(&ssdDataConfig);\r
- }\r
- if( flashStatus == C90FL_OK ) {\r
- Fls_EraseBlockType blocks;\r
- // Lock all.\r
- blocks.highEnabledBlocks = (-1UL);\r
- blocks.midEnabledBlocks = (-1UL);\r
- blocks.highEnabledBlocks = (-1UL);\r
- blocks.shadowBlocks = (-1UL);\r
-\r
- if ( Fls_Global.sourceAddr < 0x80000 ) {\r
- Fls_C90FL_SetLock(&ssdConfig, &blocks,1);\r
- }\r
- else if ( Fls_Global.sourceAddr < 0x100000 ){\r
- Fls_C90FL_SetLock(&ssdCode1Config, &blocks,1);\r
- }\r
- else {\r
- Fls_C90FL_SetLock(&ssdDataConfig, &blocks,1);\r
- }\r
- Fls_Global.jobResultType = MEMIF_JOB_OK;\r
- Fls_Global.jobType = FLS_JOB_NONE;\r
- Fls_Global.status = MEMIF_IDLE;\r
- FEE_JOB_END_NOTIFICATION();\r
- } else if( flashStatus == C90FL_BUSY ) {\r
- /* Busy, Do nothing */\r
- } else {\r
- // Error\r
- Fls_Global.jobResultType = MEMIF_JOB_FAILED;\r
- Fls_Global.jobType = FLS_JOB_NONE;\r
- Fls_Global.status = MEMIF_IDLE;\r
- #if defined(USE_DEM)\r
- Dem_ReportErrorStatus(FLS_E_WRITE_FAILED, DEM_EVENT_STATUS_FAILED);\r
- #endif\r
- FEE_JOB_ERROR_NOTIFICATION();\r
- }\r
-#else\r
- flashStatus = Fls_H7F_EraseStatus(&ssdConfig);\r
- if( flashStatus == H7F_OK ) {\r
- Fls_EraseBlockType blocks;\r
- // Lock all.\r
- blocks.highEnabledBlocks = (-1UL);\r
- blocks.midEnabledBlocks = (-1UL);\r
- blocks.highEnabledBlocks = (-1UL);\r
- blocks.shadowBlocks = (-1UL);\r
-\r
- Fls_H7F_SetLock(&blocks,1);\r
-\r
- Fls_Global.jobResultType = MEMIF_JOB_OK;\r
- Fls_Global.jobType = FLS_JOB_NONE;\r
- Fls_Global.status = MEMIF_IDLE;\r
- FEE_JOB_END_NOTIFICATION();\r
- } else if( flashStatus == H7F_BUSY ) {\r
- /* Busy, Do nothing */\r
- } else {\r
- // Error\r
- Fls_Global.jobResultType = MEMIF_JOB_FAILED;\r
- Fls_Global.jobType = FLS_JOB_NONE;\r
- Fls_Global.status = MEMIF_IDLE;\r
-#if defined(USE_DEM)\r
- Dem_ReportErrorStatus(FLS_E_WRITE_FAILED, DEM_EVENT_STATUS_FAILED);\r
-#endif\r
- FEE_JOB_ERROR_NOTIFICATION();\r
- }\r
-#endif\r
- break;\r
- }\r
- case FLS_JOB_READ:\r
-\r
- // NOT implemented. Hardware error = FLS_E_READ_FAILED\r
- // ( we are reading directly from flash so it makes no sense )\r
- memcpy(Fls_Global.targetAddr,(void *)Fls_Global.sourceAddr,Fls_Global.length);\r
- Fls_Global.jobResultType = MEMIF_JOB_OK;\r
- Fls_Global.status = MEMIF_IDLE;\r
- Fls_Global.jobType = FLS_JOB_NONE;\r
- FEE_JOB_END_NOTIFICATION();\r
- break;\r
- case FLS_JOB_WRITE:\r
- {\r
- // NOT implemented. Hardware error = FLS_E_READ_FAILED\r
-#if defined(CFG_MPC5606S)\r
- if ( Fls_Global.flashWriteInfo.dest < 0x80000) {\r
- flashStatus = Fls_C90FL_Program( &ssdConfig,&Fls_Global.flashWriteInfo);\r
- }\r
- else if ( Fls_Global.flashWriteInfo.dest < 0x100000) {\r
- flashStatus = Fls_C90FL_Program( &ssdCode1Config,&Fls_Global.flashWriteInfo);\r
- }\r
- else {\r
- flashStatus = Fls_C90FL_Program( &ssdDataConfig,&Fls_Global.flashWriteInfo);\r
- }\r
- if( flashStatus == C90FL_OK ) {\r
- Fls_EraseBlockType blocks;\r
- blocks.highEnabledBlocks = (-1UL);\r
- blocks.midEnabledBlocks = (-1UL);\r
- blocks.highEnabledBlocks = (-1UL);\r
- blocks.shadowBlocks = (-1UL);\r
-\r
- // Lock all\r
- if ( Fls_Global.flashWriteInfo.dest < 0x80000 ) {\r
- Fls_C90FL_SetLock(&ssdConfig, &blocks,1);\r
- }\r
- else if ( Fls_Global.flashWriteInfo.dest < 0x100000 ){\r
- Fls_C90FL_SetLock(&ssdCode1Config, &blocks,1);\r
- }\r
- else {\r
- Fls_C90FL_SetLock(&ssdDataConfig, &blocks,1);\r
- }\r
-\r
- Fls_Global.jobResultType = MEMIF_JOB_OK;\r
- Fls_Global.jobType = FLS_JOB_NONE;\r
- Fls_Global.status = MEMIF_IDLE;\r
- FEE_JOB_END_NOTIFICATION();\r
- } else if( flashStatus == C90FL_BUSY ) {\r
- /* Busy, Do nothing */\r
- } else {\r
- // Error\r
- Fls_Global.jobResultType = MEMIF_JOB_FAILED;\r
- Fls_Global.jobType = FLS_JOB_NONE;\r
- Fls_Global.status = MEMIF_IDLE;\r
- #if defined(USE_DEM)\r
- Dem_ReportErrorStatus(FLS_E_WRITE_FAILED, DEM_EVENT_STATUS_FAILED);\r
- #endif\r
- FEE_JOB_ERROR_NOTIFICATION();\r
- }\r
-#else\r
- flashStatus = Fls_H7F_Program( &ssdConfig,&Fls_Global.flashWriteInfo);\r
-\r
- if( flashStatus == H7F_OK ) {\r
- Fls_EraseBlockType blocks;\r
- blocks.highEnabledBlocks = (-1UL);\r
- blocks.midEnabledBlocks = (-1UL);\r
- blocks.highEnabledBlocks = (-1UL);\r
- blocks.shadowBlocks = (-1UL);\r
-\r
- // Lock all\r
- Fls_H7F_SetLock(&blocks,1);\r
-\r
- Fls_Global.jobResultType = MEMIF_JOB_OK;\r
- Fls_Global.jobType = FLS_JOB_NONE;\r
- Fls_Global.status = MEMIF_IDLE;\r
- FEE_JOB_END_NOTIFICATION();\r
- } else if( flashStatus == H7F_BUSY ) {\r
- /* Busy, Do nothing */\r
- } else {\r
- // Error\r
- Fls_Global.jobResultType = MEMIF_JOB_FAILED;\r
- Fls_Global.jobType = FLS_JOB_NONE;\r
- Fls_Global.status = MEMIF_IDLE;\r
-#if defined(USE_DEM)\r
- Dem_ReportErrorStatus(FLS_E_WRITE_FAILED, DEM_EVENT_STATUS_FAILED);\r
-#endif\r
- FEE_JOB_ERROR_NOTIFICATION();\r
- }\r
-#endif\r
- break;\r
- }\r
- case FLS_JOB_NONE:\r
- assert(0);\r
- break;\r
- }\r
- }\r
-}\r
+ default:\r
+ break;\r
+ } /* switch */\r
\r
+ } /* if */\r
+}\r
\r
-Std_ReturnType Fls_Read ( Fls_AddressType SourceAddress,\r
- uint8 *TargetAddressPtr,\r
- Fls_LengthType Length )\r
+Std_ReturnType Fls_Read( Fls_AddressType SourceAddress,\r
+ uint8 *TargetAddressPtr,\r
+ Fls_LengthType Length)\r
{\r
- FLS_VALIDATE_STATUS_UNINIT_W_RV(Fls_Global.status, FLS_READ_ID, E_NOT_OK);\r
- FLS_VALIDATE_STATUS_BUSY_W_RV(Fls_Global.status, FLS_READ_ID, E_NOT_OK);\r
- FLS_VALIDATE_READ_PARAM_ADDRESS_PAGE_W_RV(SourceAddress, FLS_READ_ID, E_NOT_OK);\r
- FLS_VALIDATE_READ_PARAM_LENGTH_PAGE_W_RV(SourceAddress, Length, FLS_READ_ID, E_NOT_OK);\r
- FLS_VALIDATE_PARAM_DATA_W_RV((void*)TargetAddressPtr, FLS_READ_ID, E_NOT_OK)\r
-\r
- // Always check if status is not busy\r
- if (Fls_Global.status == MEMIF_BUSY )\r
- return E_NOT_OK;\r
-\r
- Fls_Global.status = MEMIF_BUSY;\r
- Fls_Global.jobResultType = MEMIF_JOB_PENDING;\r
- Fls_Global.jobType = FLS_JOB_READ;\r
-\r
- Fls_Global.sourceAddr = SourceAddress;\r
- Fls_Global.targetAddr = TargetAddressPtr;\r
- Fls_Global.length = Length;\r
-\r
- return E_OK;\r
+ SourceAddress += FLS_BASE_ADDRESS;\r
+ /** @req FLS256 */\r
+ /** @req FLS236 */\r
+ /** !req FLS239 TODO */\r
+ /** !req FLS240 Have no idea what the requirement means*/\r
+\r
+ /** @req FLS099 */\r
+ VALIDATE_W_RV(Fls_Global.status != MEMIF_UNINIT,FLS_READ_ID, FLS_E_UNINIT,E_NOT_OK );\r
+ /** @req FLS100 */\r
+ VALIDATE_W_RV( Fls_Global.status != MEMIF_BUSY, FLS_READ_ID, FLS_E_BUSY, E_NOT_OK );\r
+ /** @req FLS158 */\r
+ VALIDATE_W_RV( TargetAddressPtr != NULL , FLS_READ_ID, FLS_E_PARAM_DATA, E_NOT_OK );\r
+ /** @req FLS097 */\r
+ VALIDATE_W_RV( SourceAddress < FLS_TOTAL_SIZE, FLS_READ_ID, FLS_E_PARAM_ADDRESS, E_NOT_OK );\r
+ /** @req FLS098 */\r
+ VALIDATE_W_RV( (Length != 0) && ((SourceAddress + Length) < (FLS_BASE_ADDRESS + FLS_TOTAL_SIZE)),\r
+ FLS_READ_ID, FLS_E_PARAM_LENGTH, E_NOT_OK );\r
+\r
+ // Always check if status is not busy\r
+ if (Fls_Global.status == MEMIF_BUSY)\r
+ return E_NOT_OK;\r
+\r
+ Fls_Global.status = MEMIF_BUSY;\r
+ Fls_Global.jobResultType = MEMIF_JOB_PENDING;\r
+ Fls_Global.jobType = FLS_JOB_READ;\r
+\r
+ /** @req FLS237 */\r
+ Fls_Global.sourceAddr = SourceAddress;\r
+ Fls_Global.targetAddr = TargetAddressPtr;\r
+ Fls_Global.length = Length;\r
+\r
+ return E_OK;\r
}\r
\r
#if ( FLS_COMPARE_API == STD_ON )\r
Std_ReturnType Fls_Compare( Fls_AddressType SourceAddress,\r
- uint8 *TargetAddressPtr,\r
- Fls_LengthType Length )\r
+ uint8 *TargetAddressPtr,\r
+ Fls_LengthType Length )\r
{\r
- FLS_VALIDATE_STATUS_UNINIT_W_RV(Fls_Global.status, FLS_COMPARE_ID, E_NOT_OK);\r
- FLS_VALIDATE_STATUS_BUSY_W_RV(Fls_Global.status, FLS_COMPARE_ID, E_NOT_OK);\r
- FLS_VALIDATE_PARAM_ADDRESS_PAGE_W_RV(SourceAddress, FLS_COMPARE_ID, E_NOT_OK);\r
- FLS_VALIDATE_PARAM_LENGTH_PAGE_W_RV(SourceAddress, Length, FLS_COMPARE_ID, E_NOT_OK);\r
- FLS_VALIDATE_PARAM_DATA_W_RV((void*)TargetAddressPtr,FLS_COMPARE_ID, E_NOT_OK)\r
-\r
- // Always check if status is not busy\r
- if (Fls_Global.status == MEMIF_BUSY )\r
- return E_NOT_OK;\r
-\r
- Fls_Global.status = MEMIF_BUSY;\r
- Fls_Global.jobResultType = MEMIF_JOB_PENDING;\r
- Fls_Global.jobType = FLS_JOB_COMPARE;\r
-\r
- Fls_Global.sourceAddr = SourceAddress;\r
- Fls_Global.targetAddr = TargetAddressPtr;\r
- Fls_Global.length = Length;\r
-\r
- return E_OK;\r
+ SourceAddress += FLS_BASE_ADDRESS;\r
+ /** @req FLS257 */\r
+ /** @req FLS241 */\r
+ /** @req FLS186 */\r
+\r
+ /** @req FLS152 */\r
+ VALIDATE_W_RV(Fls_Global.status != MEMIF_UNINIT,FLS_COMPARE_ID, FLS_E_UNINIT,E_NOT_OK );\r
+ /** @req FLS153 */\r
+ VALIDATE_W_RV( Fls_Global.status != MEMIF_BUSY, FLS_COMPARE_ID, FLS_E_BUSY, E_NOT_OK );\r
+ /** @req FLS273 */\r
+ VALIDATE_W_RV( TargetAddressPtr != NULL , FLS_COMPARE_ID, FLS_E_PARAM_DATA, E_NOT_OK );\r
+ /** @req FLS150 */\r
+ VALIDATE_W_RV( SourceAddress < FLS_TOTAL_SIZE, FLS_COMPARE_ID, FLS_E_PARAM_ADDRESS, E_NOT_OK );\r
+ /** @req FLS151 */\r
+ VALIDATE_W_RV( (Length != 0) && ((SourceAddress + Length) < (FLS_BASE_ADDRESS + FLS_TOTAL_SIZE)),\r
+ FLS_COMPARE_ID, FLS_E_PARAM_LENGTH, E_NOT_OK );\r
+\r
+\r
+ // Always check if status is not busy\r
+ if (Fls_Global.status == MEMIF_BUSY )\r
+ return E_NOT_OK;\r
+\r
+ Fls_Global.status = MEMIF_BUSY;\r
+ Fls_Global.jobResultType = MEMIF_JOB_PENDING;\r
+ Fls_Global.jobType = FLS_JOB_COMPARE;\r
+ /* @req FLS242 */\r
+ Fls_Global.sourceAddr = SourceAddress;\r
+ Fls_Global.targetAddr = TargetAddressPtr;\r
+ Fls_Global.length = Length;\r
+\r
+ return E_OK;\r
}\r
#endif\r
\r
#if ( FLS_SET_MODE_API == STD_ON )\r
-void Fls_SetMode( MemIf_ModeType Mode )\r
+void Fls_SetMode( MemIf_ModeType Mode )\r
{\r
- /* API NOT SUPPORTED */\r
+ /** !req FLS258 */\r
+ /** !req FLS155 */\r
+ /** !req FLS187 */\r
+\r
+ /* API NOT SUPPORTED */\r
}\r
#endif\r
\r
#if ( FLS_VERSION_INFO_API == STD_ON )\r
void Fls_GetVersionInfo( Std_VersionInfoType *VersioninfoPtr )\r
{\r
- memcpy(VersioninfoPtr, &_Fls_VersionInfo, sizeof(Std_VersionInfoType));\r
+ /** @req FLS259 */\r
+ /** @req FLS165 */\r
+ /** @req FLS166 */\r
+ /** !req FLS166 Change if moved to macro */\r
+\r
+ memcpy(VersioninfoPtr, &_Fls_VersionInfo, sizeof(Std_VersionInfoType));\r
}\r
#endif\r
\r
-void Fls_Check( uint32 flsBaseAddress, uint32 flsTotalSize )\r
-{\r
- // ECC checking is always on by default.\r
- // If a non correctable error is discovered\r
- // we will get an IVOR2 exception.\r
-\r
- // Enable Flash Non_Correctible Reporting,\r
- // Not really necessary but makes more information\r
- // available in the MCM registers if an error occurs.\r
+#if 0\r
+void Fls_Check(uint32 flsBaseAddress, uint32 flsTotalSize) {\r
+ // ECC checking is always on by default.\r
+ // If a non correctable error is discovered\r
+ // we will get an IVOR2 exception.\r
+\r
+ // Enable Flash Non_Correctible Reporting,\r
+ // Not really necessary but makes more information\r
+ // available in the MCM registers if an error occurs.\r
#if defined(CFG_MPC5606S) || defined(CFG_MPC5567)\r
- ECSM.ECR.B.EFNCR = 1;\r
+ ECSM.ECR.B.EFNCR = 1;\r
#elif defined (CFG_MPC5516)\r
- MCM.ECR.B.EFNCR = 1;\r
+ MCM.ECR.B.EFNCR = 1;\r
#else\r
-#error "Non supported processor"\r
+#warning "Non supported processor"\r
#endif\r
\r
- // Read flash in 32bit chunks, it's most efficient.\r
- uint32* memoryChunkPtr = (uint32*)flsBaseAddress;\r
- uint32* flsTotalSizePtr = (uint32*)flsTotalSize;\r
- uint32 memoryChunk = *memoryChunkPtr; // The first read\r
+ // Read flash in 32bit chunks, it's most efficient.\r
+ uint32* memoryChunkPtr = (uint32*) flsBaseAddress;\r
+ uint32* flsTotalSizePtr = (uint32*) flsTotalSize;\r
+ uint32 memoryChunk = *memoryChunkPtr; // The first read\r
\r
- // Read the rest of the flash, chunk by chunk\r
- while(memoryChunkPtr < flsTotalSizePtr)\r
- {\r
- memoryChunk=*(memoryChunkPtr++);\r
- }\r
+ // Read the rest of the flash, chunk by chunk\r
+ while (memoryChunkPtr < flsTotalSizePtr) {\r
+ memoryChunk = *(memoryChunkPtr++);\r
+ }\r
}\r
-\r
+#endif\r
\r
+++ /dev/null
-\r
-/*************************************************************************\r
- * (c) Copyright Motorola 2005, All Rights Reserved *\r
- *************************************************************************\r
- * *\r
- * Motorola reserves the right to make changes without further notice *\r
- * to any product herein to improve reliability, function or design. *\r
- * Motorola does not assume any liability arising out of the *\r
- * application or use of any product, circuit, or software described *\r
- * herein; neither does it convey any license under its patent rights *\r
- * nor the rights of others. *\r
- * *\r
- * Motorola products are not designed, intended, or authorized for *\r
- * use as components in systems intended for surgical implant into *\r
- * the body, or other applications intended to support life, or for *\r
- * any other application in which the failure of the Motorola product *\r
- * could create a situation where personal injury or death may occur. *\r
- * *\r
- * Should Buyer purchase or use Motorola products for any such *\r
- * unintended or unauthorized application, Buyer shall indemnify and *\r
- * hold Motorola and its officers, employees, subsidiaries, *\r
- * affiliates, and distributors harmless against all claims costs, *\r
- * damages, and expenses, and reasonable attorney fees arising out *\r
- * of, directly or indirectly, any claim of personal injury or death *\r
- * associated with such unintended or unauthorized use, even if such *\r
- * claim alleges that Motorola was negligent regarding the design *\r
- * or manufacture of the part. *\r
- * *\r
- * Motorola and the Motorola logo* are registered trademarks of *\r
- * Motorola Ltd. *\r
- * *\r
- *************************************************************************/\r
-\r
-/* This file is a a copy and modification of a freescale driver */\r
-\r
-#include "ssd_types.h"\r
-#include "ssd_c90fl.h"\r
-#include <string.h>\r
-#include <assert.h>\r
-#include "Fls_C90FL.h"\r
-#include "mpc55xx.h"\r
-\r
-\r
-#define CFLASH_BASE_ADDR (UINT32)(0xC3F88000)\r
-#define CFLASH1_BASE_ADDR (UINT32)(0xC3FB0000)\r
-#define DFLASH_BASE_ADDR (UINT32)(0xC3F8C000)\r
-#define C1_BASE_ADDR (UINT32)(0xC3FB0000)\r
-#define C2_BASE_ADDR (UINT32)(0xC3FB4000)\r
-\r
-\r
-UINT32 FlashInit ( PSSD_CONFIG pSSDConfig )\r
-{\r
- register UINT32 returnCode; /* return code */\r
- UINT32 MCRAddress; /* address of C90FLMCR register */\r
- UINT32 MCRValue; /* content of C90FLMCR register */\r
- UINT32 temp; /* temporary variable */\r
-\r
- MCRAddress = pSSDConfig->c90flRegBase + C90FL_MCR;\r
- MCRValue = C90FL_REG_READ (MCRAddress);\r
-\r
- if(CFLASH1_BASE_ADDR == pSSDConfig->c90flRegBase)\r
- {\r
- MCRValue = 0x02100600;\r
- }\r
- returnCode = C90FL_OK;\r
-\r
- /* Check MCR-EER and MCR-RWE bits */\r
- returnCode = (MCRValue & (C90FL_MCR_EER|C90FL_MCR_RWE)) >> 14;\r
- if (returnCode)\r
- {\r
- /* Clear EER and RWE bits are set in MCR register */\r
- C90FL_REG_BIT_SET(MCRAddress,(C90FL_MCR_EER|C90FL_MCR_RWE));\r
- }\r
-\r
- pSSDConfig->lowBlockNum = 0;\r
- pSSDConfig->midBlockNum = 0;\r
- pSSDConfig->highBlockNum = 0;\r
-\r
- /* Number of blocks in low address space and fill into SSD_CONFIG structure */\r
- temp = (MCRValue & C90FL_MCR_LAS) >> 20;\r
-\r
- /**************************************************************************\r
- * Number of blocks in low address space and fill into SSD_CONFIG structure\r
- * LAS = 0: lowBlockNum = 0; Sectorization = 0\r
- * LAS = 1: lowBlockNum = 2; Sectorization = 2x128K\r
- * LAS = 2: lowBlockNum = 6; Sectorization = 32K+2x16K+2x32K+128K\r
- * LAS = 3: lowBlockNum = Res; Sectorization = n.a\r
- * LAS = 4: lowBlockNum = Res; Sectorization = n.a\r
- * LAS = 5: lowBlockNum = Res; Sectorization = n.a\r
- * LAS = 6: lowBlockNum = 4; Sectorization = 4x16K\r
- * LAS = 7: lowBlockNum = 8; Sectorization = 2x16K+2x32K+2x16K+2x64K\r
- **************************************************************************/\r
- switch(temp)\r
- {\r
- case 1:\r
- pSSDConfig->lowBlockNum = 2;\r
- break;\r
- case 2:\r
- pSSDConfig->lowBlockNum = 6;\r
- break;\r
- case 6:\r
- pSSDConfig->lowBlockNum = 4;\r
- break;\r
- case 7:\r
- pSSDConfig->lowBlockNum = 8;\r
- break;\r
- }\r
-\r
- /* Find main array size and fill into SSD_CONFIG structure */\r
- temp = (MCRValue & C90FL_MCR_SIZE) >> 24;\r
-\r
- /**************************************************************************\r
- * Get Main array size and fill into SSD_CONFIG structure\r
- * Size = 0: Main Array Size = 128KB;\r
- * Size = 1: Main Array Size = 256KB;\r
- * Size = 2: Main Array Size = 512KB;\r
- * Size = 3: Main Array Size = 1MB;\r
- * Size = 4: Main Array Size = 1.5MB;\r
- * Size = 5: Main Array Size = 2MB;\r
- * Size = 6: Main Array Size = 64KB;\r
- * Size = 7: Main Array Size = Reserved;\r
- **************************************************************************/\r
- switch(temp)\r
- {\r
- /* case 0:\r
- temp = 0x20000;\r
- break;*/\r
- case 1:\r
- temp = 0x40000;\r
- break;\r
- case 2:\r
- temp = 0x80000;\r
- break;\r
- case 3:\r
- temp = 0x100000;\r
- break;\r
- case 4:\r
- temp = 0x180000;\r
- break;\r
- /* case 5:\r
- temp = 0x200000;\r
- break; */\r
- case 6:\r
- temp = 0x10000;\r
- break;\r
- }\r
-\r
- /*update Main Array size in SSD config*/\r
- pSSDConfig->mainArraySize = temp;\r
-\r
- /**************************************************************************\r
- * Number of blocks in middle address space and fill into SSD_CONFIG structure\r
- *\r
- * C Flash\r
- * MAS = 0: midBlockNum = 2; Sectorization = 2x128K\r
- * MAS = 1: midBlockNum = Res; Sectorization = n.a\r
- *\r
- * D Flash\r
- * MAS = 0: midBlockNum = 0; Sectorization = 0\r
- * MAS = 1: midBlockNum = Res; Sectorization = n.a\r
- *\r
- **************************************************************************/\r
-\r
- /* Determine the number of blocks in middle address space and fill into\r
- SSD_CONFIG structure.\r
- */\r
- if ((UINT32)0x0 == (MCRValue & C90FL_MCR_MAS))\r
- {\r
- if(CFLASH_BASE_ADDR == pSSDConfig->c90flRegBase)\r
- {\r
- pSSDConfig->midBlockNum = 2;\r
- }\r
-\r
- if(DFLASH_BASE_ADDR == pSSDConfig->c90flRegBase)\r
- {\r
- pSSDConfig->midBlockNum = 0;\r
- }\r
- }\r
-\r
- if ( temp > (UINT32)0x00080000 )\r
- {\r
- /* (mainArraySize - 512K) / 128K */\r
- pSSDConfig->highBlockNum = (temp - (UINT32)0x00080000) >> 17;\r
- }\r
-\r
-#if 0\r
- /* For C1 and C2 flash array all blocks below to high address space !!!*/\r
- if((C1_BASE_ADDR == pSSDConfig->c90flRegBase) ||\r
- (C2_BASE_ADDR == pSSDConfig->c90flRegBase))\r
- {\r
- pSSDConfig->lowBlockNum = 0;\r
- pSSDConfig->midBlockNum = 0;\r
- pSSDConfig->highBlockNum = 4;\r
- }\r
-#endif\r
-\r
- if (pSSDConfig->BDMEnable)\r
- {\r
- //asm ( "mr r3,returnCode" ); /* save the return code to R3 */\r
- #ifdef VLE_ASM\r
- asm ( "se_sc " ); /* generate system call interrupt */\r
- #else\r
- asm ( "sc " );\r
- #endif\r
- }\r
-\r
- return returnCode;\r
-}\r
-\r
-\r
-#define ERASE_STATE_START 0\r
-#define ERASE_STATE_ERASING 1\r
-\r
-\r
-UINT32 Fls_C90FL_FlashErase ( PSSD_CONFIG pSSDConfig,\r
- BOOL shadowFlag,\r
- UINT32 lowEnabledBlocks,\r
- UINT32 midEnabledBlocks,\r
- UINT32 highEnabledBlocks,\r
- Fls_EraseInfoType *eraseInfo)\r
-{\r
- register UINT32 returnCode; /* return code */\r
- UINT32 c90flRegBase; /* base address of C90FL registers */\r
- UINT32 MCRAddress; /* address of C90FLMCR register */\r
- UINT32 LMSAddress; /* address of C90FLLMS register */\r
- UINT32 MCRValue; /* content of C90FLMCR register */\r
- UINT32 interlockWriteAddress; /* interlock write address */\r
-\r
-\r
- if( eraseInfo->state == ERASE_STATE_ERASING ) {\r
- UINT32 status;\r
- status = Fls_C90FL_EraseStatus(pSSDConfig);\r
- if( status == C90FL_OK )\r
- eraseInfo->state = ERASE_STATE_START;\r
-\r
- return status;\r
- }\r
-\r
-\r
- c90flRegBase = pSSDConfig->c90flRegBase;\r
- MCRAddress = c90flRegBase + C90FL_MCR;\r
- MCRValue = C90FL_REG_READ (MCRAddress);\r
- LMSAddress = c90flRegBase + C90FL_LMS;\r
-\r
- /* program and/or erase operation in progress */\r
- if (MCRValue & (C90FL_MCR_PGM | C90FL_MCR_ERS))\r
- {\r
- returnCode = C90FL_ERROR_BUSY;\r
- goto EXIT;\r
- }\r
-\r
- /* interlock write address: shadow row block key address */\r
- /* it will be modified to mainArrayBase in case of erasing main array */\r
- if((UINT32)0x0 != pSSDConfig->shadowRowBase)\r
- {\r
- interlockWriteAddress = pSSDConfig->shadowRowBase + 0xE0;\r
- }\r
-\r
- /* initialize returnCode */\r
- returnCode = C90FL_OK;\r
-\r
- if (!shadowFlag)\r
- {\r
- /* erase the main array blocks */\r
- interlockWriteAddress = pSSDConfig->mainArrayBase;\r
-\r
- /* mask off reserved bits for low address space */\r
- lowEnabledBlocks &= 0xFFFFFFFF >> (32 - pSSDConfig->lowBlockNum);\r
-\r
- /* mask off reserved bits for mid address space */\r
- lowEnabledBlocks |= (midEnabledBlocks & (0xFFFFFFFF >> (32 - pSSDConfig->midBlockNum))) << 16;\r
-\r
- /* mask off reserved bits for high address space */\r
- highEnabledBlocks &= 0xFFFFFFFF >> (32 - pSSDConfig->highBlockNum);\r
-\r
- if ( !(lowEnabledBlocks | highEnabledBlocks) )\r
- {\r
- /* no blocks to be erased */\r
- goto EXIT;\r
- }\r
-\r
- /* set the block selection registers */\r
- C90FL_REG_WRITE (LMSAddress, lowEnabledBlocks);\r
- C90FL_REG_WRITE (c90flRegBase + C90FL_HBS, highEnabledBlocks);\r
- }\r
- else\r
- {\r
- if((UINT32)0x0 == pSSDConfig->shadowRowBase)\r
- {\r
- /* Shadow block erase has been requested but there is no shadow block */\r
- goto EXIT;\r
- }\r
- }\r
-\r
- /* set MCR-ERS to start erase operation */\r
- C90FLMCR_BIT_SET (MCRAddress, C90FL_MCR_ERS);\r
-\r
- /* interlock write */\r
- *( (UINT32 *)interlockWriteAddress ) = 0xFFFFFFFF;\r
-\r
- /* write a 1 to MCR-EHV */\r
- C90FLMCR_BIT_SET (MCRAddress, C90FL_MCR_EHV);\r
-\r
- /* This is where the freescale driver ends */\r
- eraseInfo->state = ERASE_STATE_ERASING;\r
-\r
-\r
-EXIT:\r
- if (pSSDConfig->BDMEnable)\r
- {\r
- //asm ( "mr r3,returnCode" ); /* save the return code to R3 */\r
- asm ( "sc " ); /* generate system call interrupt */\r
- }\r
-\r
- return returnCode;\r
-}\r
-\r
-\r
-\r
-UINT32 Fls_C90FL_EraseStatus ( PSSD_CONFIG pSSDConfig )\r
-{\r
-\r
- UINT32 c90flRegBase; /* base address of C90FL registers */\r
- UINT32 MCRAddress; /* address of C90FLMCR register */\r
- UINT32 pfb_cr_val; /* value of PFB_CR register */\r
- UINT32 returnCode;\r
-\r
- c90flRegBase = pSSDConfig->c90flRegBase;\r
- MCRAddress = c90flRegBase + C90FL_MCR;\r
-\r
- returnCode = C90FL_OK;\r
-\r
- /* wait until MCR-DONE set */\r
- if( !(C90FL_REG_READ (MCRAddress) & C90FL_MCR_DONE) )\r
- {\r
- return 0x1000; // Ehh, busy\r
- }\r
-\r
- /* clear MCR-EHV bit */\r
- C90FLMCR_BIT_CLEAR (MCRAddress, C90FL_MCR_EHV);\r
-\r
- /* confirm MCR-PEG = 1 */\r
- if ( !(C90FL_REG_READ (MCRAddress) & C90FL_MCR_PEG) )\r
- {\r
- returnCode = C90FL_ERROR_EGOOD;\r
- }\r
-\r
- if(DFLASH_BASE_ADDR != pSSDConfig->c90flRegBase) /* CFLASH */\r
- {\r
- /* save PFB_CR */\r
- pfb_cr_val = C90FL_REG_READ(CFLASH_BASE_ADDR + PFB_CR);\r
-\r
- /* Invalidate the PFBIU line read buffer */\r
- C90FL_REG_BIT_CLEAR (CFLASH_BASE_ADDR + PFB_CR, PFB_CR_BFEN);\r
-\r
- /* clear MCR-ERS bit */\r
- C90FLMCR_BIT_CLEAR (MCRAddress, C90FL_MCR_ERS);\r
-\r
- /* restore PFB_CR */\r
- C90FL_REG_WRITE(CFLASH_BASE_ADDR + PFB_CR, pfb_cr_val);\r
- }\r
-\r
- if(DFLASH_BASE_ADDR == pSSDConfig->c90flRegBase) /* DFLASH */\r
- {\r
- /* save PFB_CR1 */\r
- pfb_cr_val = C90FL_REG_READ(CFLASH_BASE_ADDR + PFB_CR1);\r
-\r
- /* Invalidate the PFBIU holding register */\r
- C90FL_REG_BIT_CLEAR (CFLASH_BASE_ADDR + PFB_CR1, PFB_CR_BFEN);\r
-\r
- /* clear MCR-ERS bit */\r
- C90FLMCR_BIT_CLEAR (MCRAddress, C90FL_MCR_ERS);\r
-\r
- /* restore PFB_CR1 */\r
- C90FL_REG_WRITE(CFLASH_BASE_ADDR + PFB_CR1, pfb_cr_val);\r
- }\r
-//EXIT:\r
- if (pSSDConfig->BDMEnable)\r
- {\r
- //asm ( "mr r3,returnCode" ); /* save the return code to R3 */\r
- asm ( "sc " ); /* generate system call interrupt */\r
- }\r
-\r
- return returnCode;\r
-}\r
-\r
-\r
-// First state.... init stuff\r
-#define STATE_INIT 0\r
-//\r
-#define STATE_PROGRAMMING 1\r
-//#define STATE_WAIT_DONE 2\r
-\r
-#if 0\r
-UINT32 FlashProgram ( PSSD_CONFIG pSSDConfig,\r
- UINT32 dest,\r
- UINT32 size,\r
- UINT32 source,\r
- void(*CallBack)(void)\r
- )\r
-#endif\r
-\r
-\r
-#define MY_BUSY 0x1000\r
-\r
-static UINT32 Fls_C90FL_ProgramPage( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo );\r
-static UINT32 Fls_C90FL_ProgramStatus ( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo );\r
-static UINT32 Fls_C90FL_ProgramInit( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo );\r
-\r
-UINT32 Fls_C90FL_Program ( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo )\r
-{\r
- UINT32 returnCode; /* return code */\r
-\r
- switch( pInfo->state ) {\r
- case STATE_INIT:\r
- returnCode = Fls_C90FL_ProgramInit(pSSDConfig,pInfo);\r
- if( returnCode == C90FL_OK ) {\r
- returnCode = Fls_C90FL_ProgramPage(pSSDConfig,pInfo);\r
- }\r
- pInfo->state = STATE_PROGRAMMING;\r
- break;\r
- case STATE_PROGRAMMING:\r
- returnCode = Fls_C90FL_ProgramStatus(pSSDConfig,pInfo);\r
- break;\r
- default:\r
- returnCode = 0;\r
- assert(0);\r
- break;\r
- }\r
-\r
- return returnCode;\r
-}\r
-\r
-static UINT32 Fls_C90FL_ProgramInit( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo ) {\r
-\r
-\r
- UINT32 returnCode;\r
- // UINT32 sourceIndex; /* source address index */\r
- UINT32 MCRAddress; /* address of C90FLMCR register */\r
- UINT32 MCRValue; /* content of C90FLMCR register */\r
-\r
- UINT32 shadowRowEnd; /* shadow row base + shadow size */\r
- UINT32 mainArrayEnd; /* main array base + main array size */\r
- // UINT32 temp; /* dest + size, or size / C90FL_DWORD_SIZE */\r
- // UINT32 pageSize; /* page size depending on flash type */\r
-\r
- UINT8 rangeType; /* position of the program memory range */\r
- /* rangeType = 1 - shadow row */\r
- /* rangeType = 2 - main array */\r
-\r
- // UINT32 pfb_cr_val; /* value of PFB_CR register */\r
- returnCode = C90FL_OK;\r
- pInfo->pageSize = 16; /* default setting is 16 bytes */\r
- MCRAddress = pSSDConfig->c90flRegBase + C90FL_MCR;\r
-\r
- /* Check alignments */\r
- if ( (((pInfo->dest | pInfo->size) % C90FL_DWORD_SIZE) != 0) ||\r
- ((pInfo->source % C90FL_WORD_SIZE) != 0))\r
- {\r
- returnCode = C90FL_ERROR_ALIGNMENT;\r
- goto EXIT;\r
- }\r
-\r
- /* The flash range should fall within either shadow row or main array */\r
- shadowRowEnd = pSSDConfig->shadowRowBase + pSSDConfig->shadowRowSize;\r
- mainArrayEnd = pSSDConfig->mainArrayBase + pSSDConfig->mainArraySize;\r
- pInfo->temp = pInfo->dest + pInfo->size;\r
-\r
- if ((pInfo->dest >= pSSDConfig->shadowRowBase) && (pInfo->dest < shadowRowEnd) &&\r
- (pInfo->size <= pSSDConfig->shadowRowSize) && (pInfo->temp <= shadowRowEnd))\r
- {\r
- /* fall in shadow row */\r
- rangeType = 1;\r
- }\r
- else if ((pInfo->dest >= pSSDConfig->mainArrayBase) && (pInfo->dest < mainArrayEnd) &&\r
- (pInfo->size <= pSSDConfig->mainArraySize) && (pInfo->temp <= mainArrayEnd))\r
- {\r
- /* fall in main array */\r
- rangeType = 2;\r
- }\r
- else\r
- {\r
- returnCode = C90FL_ERROR_RANGE;\r
- goto EXIT;\r
- }\r
-\r
- /* Anything to program? */\r
- if ( !pInfo->size )\r
- goto EXIT;\r
-\r
- MCRValue = C90FL_REG_READ (MCRAddress);\r
-\r
- /* Cases that program operation can start:\r
- 1. no program and erase sequence:\r
- (PGM low and ERS low)\r
- 2. erase suspend with EHV low on main array and try to program main array\r
- (PGM low, PEAS low, ERS high, ESUS high, EHV low, and rangeType = 2)\r
-\r
- Cases that program operation cannot start:\r
- 1. program in progress (PGM high);\r
- 2. program not in progress (PGM low):\r
- a. erase in progress but not in suspend state;\r
- b. erase in suspend state on main array but try to program shadow row;\r
- c. erase suspend on shadow row; */\r
-\r
- /* Check if program and/or erase operation in progress */\r
- if (MCRValue & (C90FL_MCR_PGM | C90FL_MCR_ERS | C90FL_MCR_ESUS))\r
- {\r
- returnCode = C90FL_ERROR_BUSY;\r
- goto EXIT;\r
- }\r
-\r
- /* Check MCR-EER and MCR-RWE bit */\r
- if (MCRValue & (C90FL_MCR_EER | C90FL_MCR_RWE))\r
- {\r
- /* use shadow row to release bus error */\r
- pInfo->temp = *(VUINT32 *)(pSSDConfig->shadowRowBase + 0xE0);\r
- }\r
-\r
- /* Set MCR-PGM to start program operation */\r
- C90FLMCR_BIT_SET (MCRAddress, C90FL_MCR_PGM);\r
-\r
- /* number of double words */\r
- pInfo->temp = pInfo->size / C90FL_DWORD_SIZE;\r
-\r
- /* determine the page size */\r
- if (pSSDConfig->pageSize == C90FL_PAGE_SIZE_32)\r
- {\r
- pInfo->pageSize = (UINT32)32;\r
- }\r
- else if(pSSDConfig->pageSize == C90FL_PAGE_SIZE_16)\r
- {\r
- pInfo->pageSize = (UINT32)16;\r
- }\r
- else if(pSSDConfig->pageSize == C90FL_PAGE_SIZE_08)\r
- {\r
- pInfo->pageSize = (UINT32)8;\r
- }\r
-\r
- pInfo->sourceIndex = 1;\r
-EXIT:\r
- if (pSSDConfig->BDMEnable)\r
- {\r
- //asm ( "mr r3,returnCode" ); /* save the return code to R3 */\r
- asm ( "sc " ); /* generate system call interrupt */\r
- }\r
-\r
-\r
- return returnCode;\r
-}\r
-\r
-/**\r
- * Programs a flash page. Assumes that FlashProgram_r() is called before.\r
- * Subsequent calls are made to this function until the programming operation is done\r
- *\r
- * @param pSSDConfig Flash configuration\r
- * @param pInfo Structure used by the page programmer. It's initially filled in by FlashProgram_r()\r
- *\r
- * @returns Status of the flash programming. See ssd_h7f. for more information. 0x1000 added\r
- * as return value when the device is busy\r
-\r
- */\r
-\r
-static UINT32 Fls_C90FL_ProgramPage( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo ) {\r
-\r
- UINT32 returnCode = 0;\r
-\r
- UINT32 MCRAddress = pSSDConfig->c90flRegBase + C90FL_MCR;\r
-\r
- /* Program data page by page, with special attention to incomplete page */\r
- if( pInfo->sourceIndex <= pInfo->temp ) {\r
- /* Programming write */\r
- *(UINT64 *)pInfo->dest = *(UINT64 *)pInfo->source;\r
-\r
- /* Update pInfo->source index */\r
- pInfo->dest += C90FL_DWORD_SIZE;\r
- pInfo->source += C90FL_DWORD_SIZE;\r
-\r
- /* Is it time to do page programming? */\r
- if ( ((pInfo->dest % pInfo->pageSize) == 0) || (pInfo->sourceIndex == pInfo->temp) )\r
- {\r
- /* Set MCR-EHV bit */\r
- C90FLMCR_BIT_SET (MCRAddress, C90FL_MCR_EHV);\r
- }\r
- returnCode = C90FL_BUSY;\r
- }\r
-\r
- return returnCode;\r
-}\r
-\r
-\r
-/**\r
- * Returns the status of the flash programming\r
- *\r
- */\r
-\r
-UINT32 Fls_C90FL_ProgramStatus ( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo ) {\r
-\r
- UINT32 MCRAddress; /* address of C90FLMCR register */\r
- UINT32 pfb_cr_val;\r
- UINT32 returnCode = C90FL_OK;\r
-\r
- MCRAddress = pSSDConfig->c90flRegBase + C90FL_MCR;\r
-\r
- /* Wait until MCR-DONE set */\r
- if ( !(C90FL_REG_READ (MCRAddress) & C90FL_MCR_DONE) )\r
- {\r
- return C90FL_BUSY;\r
- }\r
-\r
- /* Confirm MCR-PEG = 1 */\r
- if ( !(C90FL_REG_READ (MCRAddress) & C90FL_MCR_PEG) )\r
- {\r
- /* Clear MCR-EHV bit */\r
- C90FLMCR_BIT_CLEAR (MCRAddress, C90FL_MCR_EHV);\r
-\r
- returnCode = C90FL_ERROR_PGOOD;\r
- goto EXIT_EHV;\r
- }\r
-\r
- /* Clear MCR-EHV bit */\r
- C90FLMCR_BIT_CLEAR (MCRAddress, C90FL_MCR_EHV);\r
- pInfo->sourceIndex++;\r
-\r
- returnCode = Fls_C90FL_ProgramPage( pSSDConfig,pInfo );\r
- if( (returnCode) == C90FL_BUSY ) {\r
- return C90FL_BUSY;\r
- }\r
-\r
-EXIT_EHV:\r
-\r
- /* Clear MCR-PGM bit */\r
- C90FLMCR_BIT_CLEAR (MCRAddress, C90FL_MCR_PGM);\r
-\r
- if(DFLASH_BASE_ADDR != pSSDConfig->c90flRegBase) /* CFLASH */\r
- {\r
- /* save PFB_CR */\r
- pfb_cr_val = C90FL_REG_READ(CFLASH_BASE_ADDR + PFB_CR);\r
-\r
- /* Invalidate the PFBIU line read buffer */\r
- C90FL_REG_BIT_CLEAR (CFLASH_BASE_ADDR + PFB_CR, PFB_CR_BFEN);\r
-\r
- /* restore PFB_CR */\r
- C90FL_REG_WRITE(CFLASH_BASE_ADDR + PFB_CR, pfb_cr_val);\r
- }\r
-\r
- if(DFLASH_BASE_ADDR == pSSDConfig->c90flRegBase) /* DFLASH */\r
- {\r
- /* save PFB_CR1 */\r
- pfb_cr_val = C90FL_REG_READ(CFLASH_BASE_ADDR + PFB_CR1);\r
-\r
- /* Invalidate the PFBIU holding register */\r
- C90FL_REG_BIT_CLEAR (CFLASH_BASE_ADDR + PFB_CR1, PFB_CR_BFEN);\r
-\r
- /* restore PFB_CR1 */\r
- C90FL_REG_WRITE(CFLASH_BASE_ADDR + PFB_CR1, pfb_cr_val);\r
- }\r
-\r
- // Clear our struct....\r
- memset( pInfo,0x0,sizeof(Fls_ProgInfoType) );\r
-\r
- return returnCode;\r
-}\r
-\r
-#define FLASH_LMLR_PASSWORD 0xA1A11111 /* Low/Mid address lock enabled password */\r
-#define FLASH_HLR_PASSWORD 0xB2B22222 /* High address lock enabled password */\r
-#define FLASH_SLMLR_PASSWORD 0xC3C33333 /* Secondary low and middle address lock enabled password */\r
-\r
-/* TODO: use PSSD_CONFIG ( regbase, etc instead of hardcoded FLASH ) */\r
-\r
-\r
-/**\r
- * Function that handles the locks bits the flash. Handled bits\r
- * are LLOCK, MLOCK, SLOCK, HLOCK\r
- * Secondary locks are NOT supported.\r
- *\r
- * @param blocks - Blocks to set lock or unlock.\r
- * @param logic - A '1' interpretes 1 in blocks as lock, A '0' as unlock\r
- */\r
-void Fls_C90FL_SetLock ( PSSD_CONFIG pSSDConfig, Fls_EraseBlockType *blocks, UINT8 logic )\r
-{\r
- vuint32_t *reg, *sreg;\r
- //struct FLASH_tag *flashHw = &CFLASH0;\r
-\r
- if( (blocks->lowEnabledBlocks != 0 ) ||\r
- (blocks->midEnabledBlocks != 0 ) ||\r
- (blocks->shadowBlocks != 0 ) )\r
- {\r
- if(CFLASH_BASE_ADDR == pSSDConfig->c90flRegBase)\r
- {\r
- reg = &(CFLASH0.LML.R);\r
- sreg = &(CFLASH0.SLL.R);\r
- }\r
- else if(CFLASH1_BASE_ADDR == pSSDConfig->c90flRegBase)\r
- {\r
- reg = &(CFLASH1.LML.R);\r
- sreg = &(CFLASH1.SLL.R);\r
- }\r
- else if(DFLASH_BASE_ADDR == pSSDConfig->c90flRegBase)\r
- {\r
- reg = &(DFLASH.LML.R);\r
- sreg = &(DFLASH.SLL.R);\r
- }\r
- else\r
- {\r
- return;\r
- }\r
-\r
- // Check if sector is locked\r
- if( !(*reg & 0x80000000 )) {\r
- // Unlock the sector with password\r
- *reg = FLASH_LMLR_PASSWORD;\r
- }\r
- if( !(*sreg & 0x80000000 )) {\r
- // Unlock the sector with password\r
- *sreg = FLASH_SLMLR_PASSWORD;\r
- }\r
-\r
- // set/clear them\r
- if( logic ) {\r
- *reg |= ((blocks->midEnabledBlocks<<16)& C90FL_LML_MLOCK) +\r
- (blocks->lowEnabledBlocks & C90FL_LML_LLOCK) +\r
- (blocks->shadowBlocks & C90FL_LML_SLOCK);\r
- } else {\r
- *reg &= ((~blocks->midEnabledBlocks<<16) & C90FL_LML_MLOCK) |\r
- ((~blocks->lowEnabledBlocks) & C90FL_LML_LLOCK) |\r
- ((~blocks->shadowBlocks) & C90FL_LML_SLOCK) ;\r
- }\r
- if( logic ) {\r
- *sreg |= ((blocks->midEnabledBlocks<<16)& C90FL_LML_MLOCK) +\r
- (blocks->lowEnabledBlocks & C90FL_LML_LLOCK) +\r
- (blocks->shadowBlocks & C90FL_LML_SLOCK);\r
- } else {\r
- *sreg &= ((~blocks->midEnabledBlocks<<16) & C90FL_LML_MLOCK) |\r
- ((~blocks->lowEnabledBlocks) & C90FL_LML_LLOCK) |\r
- ((~blocks->shadowBlocks) & C90FL_LML_SLOCK) ;\r
- }\r
- }\r
-#if 0\r
- else {\r
- reg = &(flashHw->LML.R);\r
- // Set all\r
- *reg |= 0x8003003f;\r
- }\r
-#endif\r
-\r
- if( (blocks->highEnabledBlocks != 0 )) {\r
-\r
- if(CFLASH_BASE_ADDR == pSSDConfig->c90flRegBase)\r
- {\r
- reg = &(CFLASH0.HBL.R);\r
- }\r
- else if(CFLASH1_BASE_ADDR == pSSDConfig->c90flRegBase)\r
- {\r
- reg = &(CFLASH1.HBL.R);\r
- }\r
- else if(DFLASH_BASE_ADDR == pSSDConfig->c90flRegBase)\r
- {\r
- reg = &(DFLASH.HBL.R);\r
- }\r
- else\r
- {\r
- return;\r
- }\r
-\r
- if( !(*reg & 0x80000000 )) {\r
- // Unlock\r
- *reg = FLASH_HLR_PASSWORD;\r
- }\r
- // clear\r
- // *reg &= ~(C90FL_HBL_HBLOCK);\r
- // Set\r
- if( logic ) {\r
- *reg |= ((blocks->highEnabledBlocks)& C90FL_HBL_HBLOCK);\r
- } else {\r
- *reg &= ((~blocks->highEnabledBlocks)& C90FL_HBL_HBLOCK);\r
- }\r
- }\r
-#if 0\r
- else {\r
- reg = &(flashHw->HBR.R);\r
- // Set all\r
- *reg |= 0x800000ff;\r
- }\r
-#endif\r
-}\r
-\r
-\r
-\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-#ifndef FLS_C90FL_H_\r
-#define FLS_C90FL_H_\r
-\r
-#define FLS_ERASE_SECTION __attribute__ ((section (".fls_erase")));\r
-#define FLS_WRITE_SECTION __attribute__ ((section (".fls_write")));\r
-\r
-#define C90FL_BUSY 0x1000\r
-\r
-typedef struct {\r
- UINT32 dest;\r
- UINT32 size;\r
- UINT32 source;\r
- UINT32 pageSize;\r
- UINT32 sourceIndex;\r
- UINT32 temp;\r
- UINT32 state;\r
-} Fls_ProgInfoType;\r
-\r
-typedef struct {\r
- UINT32 state;\r
-} Fls_EraseInfoType;\r
-\r
-typedef struct {\r
- UINT32 lowEnabledBlocks;\r
- UINT32 midEnabledBlocks;\r
- UINT32 highEnabledBlocks;\r
- // 1 - primary, 2 - secondary\r
- UINT32 shadowBlocks;\r
-} Fls_EraseBlockType;\r
-\r
-// TODO : document API\r
-UINT32 Fls_C90FL_FlashErase ( PSSD_CONFIG pSSDConfig,\r
- BOOL shadowFlag,\r
- UINT32 lowEnabledBlocks,\r
- UINT32 midEnabledBlocks,\r
- UINT32 highEnabledBlocks,\r
- Fls_EraseInfoType *eraseInfo); //FLS_ERASE_SECTION;\r
-\r
-UINT32 Fls_C90FL_EraseStatus ( PSSD_CONFIG pSSDConfig );// FLS_ERASE_SECTION ;\r
-\r
-UINT32 Fls_C90FL_Program ( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo ); //FLS_WRITE_SECTION ;\r
-\r
-void Fls_C90FL_SetLock ( PSSD_CONFIG pSSDConfig, Fls_EraseBlockType *blocks, UINT8 logic );\r
-#endif /*FLS_C90FL_H_*/\r
+++ /dev/null
-\r
-/*************************************************************************\r
- * (c) Copyright Motorola 2005, All Rights Reserved *\r
- *************************************************************************\r
- * *\r
- * Motorola reserves the right to make changes without further notice *\r
- * to any product herein to improve reliability, function or design. *\r
- * Motorola does not assume any liability arising out of the *\r
- * application or use of any product, circuit, or software described *\r
- * herein; neither does it convey any license under its patent rights *\r
- * nor the rights of others. *\r
- * *\r
- * Motorola products are not designed, intended, or authorized for *\r
- * use as components in systems intended for surgical implant into *\r
- * the body, or other applications intended to support life, or for *\r
- * any other application in which the failure of the Motorola product *\r
- * could create a situation where personal injury or death may occur. *\r
- * *\r
- * Should Buyer purchase or use Motorola products for any such *\r
- * unintended or unauthorized application, Buyer shall indemnify and *\r
- * hold Motorola and its officers, employees, subsidiaries, *\r
- * affiliates, and distributors harmless against all claims costs, *\r
- * damages, and expenses, and reasonable attorney fees arising out *\r
- * of, directly or indirectly, any claim of personal injury or death *\r
- * associated with such unintended or unauthorized use, even if such *\r
- * claim alleges that Motorola was negligent regarding the design *\r
- * or manufacture of the part. *\r
- * *\r
- * Motorola and the Motorola logo* are registered trademarks of *\r
- * Motorola Ltd. *\r
- * *\r
- *************************************************************************/\r
-\r
-/* This file is a a copy and modification of a freescale driver */\r
-\r
-#include "ssd_types.h"\r
-#include "ssd_h7f.h"\r
-#include <string.h>\r
-#include <assert.h>\r
-#include "Fls_H7F.h"\r
-#include "mpc55xx.h"\r
-\r
-\r
-UINT32 FlashInit ( PSSD_CONFIG pSSDConfig )\r
-{\r
- register UINT32 returnCode; /* return code */\r
- UINT32 MCRAddress; /* address of H7FMCR register */\r
- UINT32 MCRValue; /* content of H7FMCR register */\r
- UINT32 temp; /* temporary variable */\r
-\r
- MCRAddress = pSSDConfig->h7fRegBase + H7F_MCR;\r
- MCRValue = H7F_REG_READ (MCRAddress);\r
-\r
- /* If MCR-STOP = 1, return directly with error code */\r
- if (MCRValue & H7F_MCR_STOP)\r
- {\r
- returnCode = H7F_ERROR_STOP;\r
- goto EXIT;\r
- }\r
-#if 0\r
- /* read and check the MASK */\r
- /* use returnCode temporarily */\r
- returnCode = H7F_REG_READ (SIU_MIDR);\r
-\r
- if ((returnCode >> 16) == 0x5554)\r
- {\r
- /* if MPC5554 part, check the mask number */\r
- if ( !((UINT16)returnCode > 3) &&\r
- !(((UINT16)returnCode == 3) &&\r
- ((H7F_REG_READ (pSSDConfig->shadowRowBase + 0xC8) == 0x4C4A4F4E) ||\r
- (H7F_REG_READ (pSSDConfig->shadowRowBase + 0xE8) == 0x4C4A4F4E))))\r
- {\r
- returnCode = H7F_ERROR_PARTID;\r
- goto EXIT;\r
- }\r
- }\r
-\r
- if (returnCode == 0x55340000)\r
- {\r
- /* cannot work for MPC5534 rev0 silicon */\r
- returnCode = H7F_ERROR_PARTID;\r
- goto EXIT;\r
- }\r
-#endif\r
- /* Check MCR-EER and MCR-RWE bits */\r
- returnCode = (MCRValue & (H7F_MCR_EER|H7F_MCR_RWE)) >> 14;\r
- if (returnCode)\r
- {\r
- /* read the shadow row keyword to release the bus transfer error */\r
- /* this is a software workaround for some H7F revision. */\r
- temp = *(VUINT32 *)(pSSDConfig->shadowRowBase + 0xE0);\r
- }\r
-\r
- /* Check MCR-BBEPE and MCR-EPE bits */\r
- returnCode |= ((~MCRValue) & (H7F_MCR_BBEPE|H7F_MCR_EPE)) >> 10;\r
-\r
- pSSDConfig->midBlockNum = 0;\r
- pSSDConfig->highBlockNum = 0;\r
-\r
- /* Number of blocks in low address space and fill into SSD_CONFIG structure */\r
- temp = (MCRValue & H7F_MCR_LAS) >> 20;\r
-\r
- /* Number of blocks in low address space and fill into SSD_CONFIG structure\r
- * LAS = 0: lowBlockNum = 2;\r
- * LAS = 1: lowBlockNum = 4;\r
- * LAS = 2: lowBlockNum = 8;\r
- * LAS = 3: lowBlockNum = 16;\r
- * LAS = 4: lowBlockNum = 10;\r
- * LAS = 5: lowBlockNum = 12;\r
- * LAS = 6: lowBlockNum = 6;\r
- *******************************************************************************\r
- * Special configurations\r
- * SFS = 1, SIZE = 0, LAS = 2, MAS = 0: lowBlockNum = 4 and Flash size = 128KB;\r
- * SFS = 1, SIZE = 1, LAS = *, MAS = 1: midBlockNum = 4 and Flash size = 320KB;\r
- */\r
-\r
- if (temp < 4)\r
- {\r
- pSSDConfig->lowBlockNum = ((UINT32)0x00000002) << temp;\r
- }\r
- else if (4 == temp)\r
- {\r
- pSSDConfig->lowBlockNum = 10;\r
- }\r
- else if (5 == temp)\r
- {\r
- pSSDConfig->lowBlockNum = 12;\r
- }\r
- else if (6 == temp)\r
- {\r
- pSSDConfig->lowBlockNum = 6;\r
- }\r
-\r
- /* Check if SFS bit is set to 1 */\r
- if (MCRValue & H7F_MCR_SFS)\r
- {\r
- if (MCRValue & H7F_MCR_SIZE) /* SIZE = 1 */\r
- {\r
- pSSDConfig->mainArraySize = 0x00050000; /* Flash size is 320KB */\r
- pSSDConfig->midBlockNum = 4; /* Mid address space: 4-16KB blocks */\r
- }\r
- else /* SIZE = 0 */\r
- {\r
- pSSDConfig->mainArraySize = 0x00020000; /* Flash size is 128KB */\r
- /* Low address space: 2-16KB blocks and 2-48KB blocks */\r
- pSSDConfig->lowBlockNum = 4;\r
- }\r
- }\r
- else\r
- {\r
- /* Main array space size */\r
- temp = 0x00040000 * ( ((MCRValue & H7F_MCR_SIZE) >> 24) + 1);\r
- pSSDConfig->mainArraySize = temp;\r
-\r
- /* Determine the number of blocks in middle address space and fill into SSD_CONFIG structure */\r
- if ( temp > 0x00040000)\r
- {\r
- pSSDConfig->midBlockNum = 2 * (((MCRValue & H7F_MCR_MAS) >> 16) + 1);\r
- }\r
-\r
- /* Determine the number of blocks in high address space and fill into SSD_CONFIG structure */\r
- if ( temp > 0x00080000 )\r
- {\r
- /* (mainArraySize - 512K) / 128K */\r
- pSSDConfig->highBlockNum = (temp - 0x00080000) >> 17;\r
- }\r
- }\r
-\r
-EXIT:\r
- if (pSSDConfig->BDMEnable)\r
- {\r
- //asm ( "mr r3,returnCode" ); /* save the return code to R3 */\r
- asm ( "sc " ); /* generate system call interrupt */\r
- }\r
-\r
- return returnCode;\r
-}\r
-\r
-\r
-#define ERASE_STATE_START 0\r
-#define ERASE_STATE_ERASING 1\r
-\r
-\r
-UINT32 Fls_H7F_FlashErase ( PSSD_CONFIG pSSDConfig,\r
- BOOL shadowFlag,\r
- UINT32 lowEnabledBlocks,\r
- UINT32 midEnabledBlocks,\r
- UINT32 highEnabledBlocks,\r
- Fls_EraseInfoType *eraseInfo)\r
-{\r
- register UINT32 returnCode; /* return code */\r
- UINT32 h7fRegBase; /* base address of H7F registers */\r
- UINT32 MCRAddress; /* address of H7FMCR register */\r
- UINT32 LMSAddress; /* address of H7FLMS register */\r
- UINT32 MCRValue; /* content of H7FMCR register */\r
- UINT32 interlockWriteAddress; /* interlock write address */\r
-\r
-\r
- if( eraseInfo->state == ERASE_STATE_ERASING ) {\r
- UINT32 status;\r
- status = Fls_H7F_EraseStatus(pSSDConfig);\r
- if( status == H7F_OK )\r
- eraseInfo->state = ERASE_STATE_START;\r
-\r
- return status;\r
- }\r
-\r
-\r
- h7fRegBase = pSSDConfig->h7fRegBase;\r
- MCRAddress = h7fRegBase + H7F_MCR;\r
- MCRValue = H7F_REG_READ (MCRAddress);\r
- LMSAddress = h7fRegBase + H7F_LMS;\r
-\r
- /* program and/or erase operation in progress */\r
- if (MCRValue & (H7F_MCR_PGM | H7F_MCR_ERS))\r
- {\r
- returnCode = H7F_ERROR_BUSY;\r
- goto EXIT;\r
- }\r
-\r
- /* interlock write address: shadow row block key address */\r
- /* it will be modified to mainArrayBase in case of erasing main array */\r
- interlockWriteAddress = pSSDConfig->shadowRowBase + 0xE0;\r
-\r
- /* Check MCR-EER and MCR-RWE bit */\r
- if (MCRValue & (H7F_MCR_EER | H7F_MCR_RWE))\r
- {\r
- /* read shadow row block key address to clear bus transfer error */\r
- /* this is a software workaround for some H7F revision. */\r
- /* use returnCode temporarily */\r
- returnCode = *(VUINT32 *)interlockWriteAddress;\r
- }\r
-\r
- /* initialize returnCode */\r
- returnCode = H7F_OK;\r
-\r
- if (!shadowFlag)\r
- {\r
- /* erase the main array blocks */\r
- interlockWriteAddress = pSSDConfig->mainArrayBase;\r
-\r
- /* mask off reserved bits for low address space */\r
- lowEnabledBlocks &= 0xFFFFFFFF >> (32 - pSSDConfig->lowBlockNum);\r
-\r
- /* mask off reserved bits for mid address space */\r
- lowEnabledBlocks |= (midEnabledBlocks & (0xFFFFFFFF >> (32 - pSSDConfig->midBlockNum))) << 16;\r
-\r
- /* mask off reserved bits for high address space */\r
- highEnabledBlocks &= 0xFFFFFFFF >> (32 - pSSDConfig->highBlockNum);\r
-\r
- if ( !(lowEnabledBlocks | highEnabledBlocks) )\r
- {\r
- /* no blocks to be erased */\r
- goto EXIT;\r
- }\r
-\r
- /* set the block selection registers */\r
- H7F_REG_WRITE (LMSAddress, lowEnabledBlocks);\r
- H7F_REG_WRITE (h7fRegBase + H7F_HBS, highEnabledBlocks);\r
- }\r
-\r
- /* set MCR-ERS to start erase operation */\r
- H7FMCR_BIT_SET (MCRAddress, H7F_MCR_ERS);\r
-\r
- /* interlock write */\r
- *( (UINT32 *)interlockWriteAddress ) = 0xFFFFFFFF;\r
-\r
- /* write a 1 to MCR-EHV */\r
- H7FMCR_BIT_SET (MCRAddress, H7F_MCR_EHV);\r
-\r
- /* This is where the freescale driver ends */\r
- eraseInfo->state = ERASE_STATE_ERASING;\r
-\r
-EXIT:\r
- if (pSSDConfig->BDMEnable)\r
- {\r
- //asm ( "mr r3,returnCode" ); /* save the return code to R3 */\r
- asm ( "sc " ); /* generate system call interrupt */\r
- }\r
-\r
- return returnCode;\r
-}\r
-\r
-\r
-\r
-UINT32 Fls_H7F_EraseStatus ( PSSD_CONFIG pSSDConfig )\r
-{\r
-\r
- UINT32 h7fRegBase; /* base address of H7F registers */\r
- UINT32 MCRAddress; /* address of H7FMCR register */\r
- UINT32 pfb_cr_val; /* value of PFB_CR register */\r
- UINT32 returnCode;\r
-\r
- h7fRegBase = pSSDConfig->h7fRegBase;\r
- MCRAddress = h7fRegBase + H7F_MCR;\r
-\r
- returnCode = H7F_OK;\r
-\r
- /* wait until MCR-DONE set */\r
- if( !(H7F_REG_READ (MCRAddress) & H7F_MCR_DONE) )\r
- {\r
- return 0x1000; // Ehh, busy\r
- }\r
-\r
- /* clear MCR-EHV bit */\r
- H7FMCR_BIT_CLEAR (MCRAddress, H7F_MCR_EHV);\r
-\r
- /* confirm MCR-PEG = 1 */\r
- if ( !(H7F_REG_READ (MCRAddress) & H7F_MCR_PEG) )\r
- {\r
- returnCode = H7F_ERROR_EGOOD;\r
- }\r
-\r
- /* save PFB_CR */\r
- pfb_cr_val = H7F_REG_READ(h7fRegBase + PFB_CR);\r
-\r
- /* invalidate the PFBIU line read buffer */\r
- H7F_REG_BIT_CLEAR (h7fRegBase + PFB_CR, PFB_CR_BFEN);\r
-\r
- /* clear MCR-ERS bit */\r
- H7FMCR_BIT_CLEAR (MCRAddress, H7F_MCR_ERS);\r
-\r
- /* invalidate the PFBIU line read buffer */\r
- H7F_REG_BIT_SET (h7fRegBase + PFB_CR, PFB_CR_BFEN);\r
-\r
- /* restore PFB_CR */\r
- H7F_REG_WRITE(h7fRegBase + PFB_CR, pfb_cr_val);\r
-\r
-//EXIT:\r
- if (pSSDConfig->BDMEnable)\r
- {\r
- //asm ( "mr r3,returnCode" ); /* save the return code to R3 */\r
- asm ( "sc " ); /* generate system call interrupt */\r
- }\r
-\r
- return returnCode;\r
-}\r
-\r
-\r
-// First state.... init stuff\r
-#define STATE_INIT 0\r
-//\r
-#define STATE_PROGRAMMING 1\r
-//#define STATE_WAIT_DONE 2\r
-\r
-#if 0\r
-UINT32 FlashProgram ( PSSD_CONFIG pSSDConfig,\r
- UINT32 dest,\r
- UINT32 size,\r
- UINT32 source,\r
- void(*CallBack)(void)\r
- )\r
-#endif\r
-\r
-\r
-#define MY_BUSY 0x1000\r
-\r
-static UINT32 Fls_H7F_ProgramPage( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo );\r
-static UINT32 Fls_H7F_ProgramStatus ( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo );\r
-static UINT32 Fls_H7F_ProgramInit( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo );\r
-\r
-UINT32 Fls_H7F_Program ( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo )\r
-{\r
- UINT32 returnCode; /* return code */\r
-\r
- switch( pInfo->state ) {\r
- case STATE_INIT:\r
- returnCode = Fls_H7F_ProgramInit(pSSDConfig,pInfo);\r
- if( returnCode == H7F_OK ) {\r
- returnCode = Fls_H7F_ProgramPage(pSSDConfig,pInfo);\r
- }\r
- pInfo->state = STATE_PROGRAMMING;\r
- break;\r
- case STATE_PROGRAMMING:\r
- returnCode = Fls_H7F_ProgramStatus(pSSDConfig,pInfo);\r
- break;\r
- default:\r
- returnCode = 0;\r
- assert(0);\r
- break;\r
- }\r
-\r
- return returnCode;\r
-}\r
-\r
-static UINT32 Fls_H7F_ProgramInit( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo ) {\r
-\r
-\r
- UINT32 returnCode;\r
- // UINT32 sourceIndex; /* source address index */\r
- UINT32 MCRAddress; /* address of H7FMCR register */\r
- UINT32 MCRValue; /* content of H7FMCR register */\r
-\r
- UINT32 shadowRowEnd; /* shadow row base + shadow size */\r
- UINT32 mainArrayEnd; /* main array base + main array size */\r
- // UINT32 temp; /* dest + size, or size / H7F_DWORD_SIZE */\r
- // UINT32 pageSize; /* page size depending on flash type */\r
-\r
- UINT8 rangeType; /* position of the program memory range */\r
- /* rangeType = 1 - shadow row */\r
- /* rangeType = 2 - main array */\r
-\r
- // UINT32 pfb_cr_val; /* value of PFB_CR register */\r
- returnCode = H7F_OK;\r
- pInfo->pageSize = 16; /* default setting is 16 bytes */\r
- MCRAddress = pSSDConfig->h7fRegBase + H7F_MCR;\r
-\r
- /* Check alignments */\r
- if ( (((pInfo->dest | pInfo->size) % H7F_DWORD_SIZE) != 0) ||\r
- ((pInfo->source % H7F_WORD_SIZE) != 0))\r
- {\r
- returnCode = H7F_ERROR_ALIGNMENT;\r
- goto EXIT;\r
- }\r
-\r
- /* The flash range should fall within either shadow row or main array */\r
- shadowRowEnd = pSSDConfig->shadowRowBase + pSSDConfig->shadowRowSize;\r
- mainArrayEnd = pSSDConfig->mainArrayBase + pSSDConfig->mainArraySize;\r
- pInfo->temp = pInfo->dest + pInfo->size;\r
-\r
- if ((pInfo->dest >= pSSDConfig->shadowRowBase) && (pInfo->dest < shadowRowEnd) &&\r
- (pInfo->size <= pSSDConfig->shadowRowSize) && (pInfo->temp <= shadowRowEnd))\r
- {\r
- /* fall in shadow row */\r
- rangeType = 1;\r
- }\r
- else if ((pInfo->dest >= pSSDConfig->mainArrayBase) && (pInfo->dest < mainArrayEnd) &&\r
- (pInfo->size <= pSSDConfig->mainArraySize) && (pInfo->temp <= mainArrayEnd))\r
- {\r
- /* fall in main array */\r
- rangeType = 2;\r
- }\r
- else\r
- {\r
- returnCode = H7F_ERROR_RANGE;\r
- goto EXIT;\r
- }\r
-\r
- /* Anything to program? */\r
- if ( !pInfo->size )\r
- goto EXIT;\r
-\r
- MCRValue = H7F_REG_READ (MCRAddress);\r
-\r
- /* Cases that program operation can start:\r
- 1. no program and erase sequence:\r
- (PGM low and ERS low)\r
- 2. erase suspend with EHV low on main array and try to program main array\r
- (PGM low, PEAS low, ERS high, ESUS high, EHV low, and rangeType = 2)\r
-\r
- Cases that program operation cannot start:\r
- 1. program in progress (PGM high);\r
- 2. program not in progress (PGM low):\r
- a. erase in progress but not in suspend state;\r
- b. erase in suspend state on main array but try to program shadow row;\r
- c. erase suspend on shadow row; */\r
-\r
- if ( !( (!(MCRValue & (H7F_MCR_PGM | H7F_MCR_ERS))) ||\r
- (!(MCRValue & (H7F_MCR_PGM | H7F_MCR_PEAS | H7F_MCR_EHV)) &&\r
- ((MCRValue & (H7F_MCR_ERS | H7F_MCR_ESUS)) == (H7F_MCR_ERS | H7F_MCR_ESUS)) &&\r
- (rangeType == 2)) ) )\r
- {\r
- returnCode = H7F_ERROR_BUSY;\r
- goto EXIT;\r
- }\r
-\r
- /* Check MCR-EER and MCR-RWE bit */\r
- if (MCRValue & (H7F_MCR_EER | H7F_MCR_RWE))\r
- {\r
- /* use shadow row to release bus error */\r
- pInfo->temp = *(VUINT32 *)(pSSDConfig->shadowRowBase + 0xE0);\r
- }\r
-\r
- /* Set MCR-PGM to start program operation */\r
- H7FMCR_BIT_SET (MCRAddress, H7F_MCR_PGM);\r
-\r
- /* number of double words */\r
- pInfo->temp = pInfo->size / H7F_DWORD_SIZE;\r
-\r
- /* determine the page size */\r
- if (pSSDConfig->pageSize == H7FA_PAGE_SIZE)\r
- {\r
- /* H7Fa page size is 32 bytes */\r
- pInfo->pageSize = 32;\r
- }\r
- else if(pSSDConfig->pageSize == H7FB_PAGE_SIZE)\r
- {\r
- /* H7Fb page size is 16 bytes */\r
- /* this is also the default setting */\r
- /*\r
- pInfo->pageSize = 16;\r
- */\r
- }\r
-\r
- pInfo->sourceIndex = 1;\r
-#if 0\r
- if( FlashProgramPage_r(pSSDConfig,pInfo) == H7F_BUSY ) {\r
- return H7F_BUSY; /* busy */\r
- }\r
-\r
- returnCode = FlashProgramStatus_r ( pSSDConfig, pInfo );\r
-#endif\r
-EXIT:\r
- if (pSSDConfig->BDMEnable)\r
- {\r
- //asm ( "mr r3,returnCode" ); /* save the return code to R3 */\r
- asm ( "sc " ); /* generate system call interrupt */\r
- }\r
-\r
-\r
- return returnCode;\r
-}\r
-\r
-/**\r
- * Programs a flash page. Assumes that FlashProgram_r() is called before.\r
- * Subsequent calls are made to this function until the programming operation is done\r
- *\r
- * @param pSSDConfig Flash configuration\r
- * @param pInfo Structure used by the page programmer. It's initially filled in by FlashProgram_r()\r
- *\r
- * @returns Status of the flash programming. See ssd_h7f. for more information. 0x1000 added\r
- * as return value when the device is busy\r
-\r
- */\r
-\r
-static UINT32 Fls_H7F_ProgramPage( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo ) {\r
-\r
- UINT32 returnCode = 0;\r
-\r
- UINT32 MCRAddress = pSSDConfig->h7fRegBase + H7F_MCR;\r
-\r
- /* Program data page by page, with special attention to incomplete page */\r
- if( pInfo->sourceIndex <= pInfo->temp ) {\r
- /* Programming write */\r
- *(UINT64 *)pInfo->dest = *(UINT64 *)pInfo->source;\r
-\r
- /* Update pInfo->source index */\r
- pInfo->dest += H7F_DWORD_SIZE;\r
- pInfo->source += H7F_DWORD_SIZE;\r
-\r
- /* Is it time to do page programming? */\r
- if ( ((pInfo->dest % pInfo->pageSize) == 0) || (pInfo->sourceIndex == pInfo->temp) )\r
- {\r
- /* Set MCR-EHV bit */\r
- H7FMCR_BIT_SET (MCRAddress, H7F_MCR_EHV);\r
- }\r
- returnCode = H7F_BUSY;\r
- }\r
-\r
- return returnCode;\r
-}\r
-\r
-\r
-/**\r
- * Returns the status of the flash programming\r
- *\r
- */\r
-\r
-UINT32 Fls_H7F_ProgramStatus ( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo ) {\r
-\r
- UINT32 MCRAddress; /* address of H7FMCR register */\r
- UINT32 pfb_cr_val;\r
- UINT32 returnCode = H7F_OK;\r
-\r
- MCRAddress = pSSDConfig->h7fRegBase + H7F_MCR;\r
-\r
- /* Wait until MCR-DONE set */\r
- if ( !(H7F_REG_READ (MCRAddress) & H7F_MCR_DONE) )\r
- {\r
- return H7F_BUSY;\r
- }\r
-\r
- /* Confirm MCR-PEG = 1 */\r
- if ( !(H7F_REG_READ (MCRAddress) & H7F_MCR_PEG) )\r
- {\r
- /* Clear MCR-EHV bit */\r
- H7FMCR_BIT_CLEAR (MCRAddress, H7F_MCR_EHV);\r
-\r
- returnCode = H7F_ERROR_PGOOD;\r
- goto EXIT_EHV;\r
- }\r
-\r
- /* Clear MCR-EHV bit */\r
- H7FMCR_BIT_CLEAR (MCRAddress, H7F_MCR_EHV);\r
- pInfo->sourceIndex++;\r
-\r
- returnCode = Fls_H7F_ProgramPage( pSSDConfig,pInfo );\r
- if( (returnCode) == H7F_BUSY ) {\r
- return H7F_BUSY;\r
- }\r
-\r
-EXIT_EHV:\r
-\r
- /* Clear MCR-PGM bit */\r
- H7FMCR_BIT_CLEAR (MCRAddress, H7F_MCR_PGM);\r
-\r
- /* save PFB_CR */\r
- pfb_cr_val = H7F_REG_READ(pSSDConfig->h7fRegBase + PFB_CR);\r
-\r
- /* Invalidate the PFBIU line read buffer */\r
- H7F_REG_BIT_CLEAR (pSSDConfig->h7fRegBase + PFB_CR, PFB_CR_BFEN);\r
-\r
- /* Invalidate the PFBIU line read buffer */\r
- H7F_REG_BIT_SET (pSSDConfig->h7fRegBase + PFB_CR, PFB_CR_BFEN);\r
-\r
- /* restore PFB_CR */\r
- H7F_REG_WRITE(pSSDConfig->h7fRegBase + PFB_CR, pfb_cr_val);\r
-\r
- // Clear our struct....\r
- memset( pInfo,0x0,sizeof(Fls_ProgInfoType) );\r
-\r
- return returnCode;\r
-}\r
-\r
-#define FLASH_LMLR_PASSWORD 0xA1A11111 /* Low/Mid address lock enabled password */\r
-#define FLASH_HLR_PASSWORD 0xB2B22222 /* High address lock enabled password */\r
-#define FLASH_SLMLR_PASSWORD 0xC3C33333 /* Secondary low and middle address lock enabled password */\r
-\r
-/* TODO: use PSSD_CONFIG ( regbase, etc instead of hardcoded FLASH ) */\r
-\r
-\r
-/**\r
- * Function that handles the locks bits the flash. Handled bits\r
- * are LLOCK, MLOCK, SLOCK, HLOCK\r
- * Secondary locks are NOT supported.\r
- *\r
- * @param blocks - Blocks to set lock or unlock.\r
- * @param logic - A '1' interpretes 1 in blocks as lock, A '0' as unlock\r
- */\r
-void Fls_H7F_SetLock ( Fls_EraseBlockType *blocks, UINT8 logic )\r
-{\r
- vuint32_t *reg, *sreg;\r
- struct FLASH_tag *flashHw = &FLASH;\r
-\r
- if( (blocks->lowEnabledBlocks != 0 ) ||\r
- (blocks->midEnabledBlocks != 0 ) ||\r
- (blocks->shadowBlocks != 0 ) )\r
- {\r
- reg = &(flashHw->LMLR.R);\r
- sreg = &(flashHw->SLMLR.R);\r
-\r
- // Check if sector is locked\r
- if( !(*reg & 0x80000000 )) {\r
- // Unlock the sector with password\r
- *reg = FLASH_LMLR_PASSWORD;\r
- }\r
- if( !(*sreg & 0x80000000 )) {\r
- // Unlock the sector with password\r
- *sreg = FLASH_SLMLR_PASSWORD;\r
- }\r
-\r
- // set/clear them\r
- if( logic ) {\r
- *reg |= ((blocks->midEnabledBlocks<<16)& H7F_LML_MLOCK) +\r
- (blocks->lowEnabledBlocks & H7F_LML_LLOCK) +\r
- (blocks->shadowBlocks & H7F_LML_SLOCK);\r
- } else {\r
- *reg &= ((~blocks->midEnabledBlocks<<16) & H7F_LML_MLOCK) |\r
- ((~blocks->lowEnabledBlocks) & H7F_LML_LLOCK) |\r
- ((~blocks->shadowBlocks) & H7F_LML_SLOCK) ;\r
- }\r
- if( logic ) {\r
- *sreg |= ((blocks->midEnabledBlocks<<16)& H7F_LML_MLOCK) +\r
- (blocks->lowEnabledBlocks & H7F_LML_LLOCK) +\r
- (blocks->shadowBlocks & H7F_LML_SLOCK);\r
- } else {\r
- *sreg &= ((~blocks->midEnabledBlocks<<16) & H7F_LML_MLOCK) |\r
- ((~blocks->lowEnabledBlocks) & H7F_LML_LLOCK) |\r
- ((~blocks->shadowBlocks) & H7F_LML_SLOCK) ;\r
- }\r
- }\r
-#if 0\r
- else {\r
- reg = &(flashHw->LMLR.R);\r
- // Set all\r
- *reg |= 0x8003003f;\r
- }\r
-#endif\r
-\r
- if( (blocks->highEnabledBlocks != 0 )) {\r
- reg = &(flashHw->HLR.R);\r
-\r
- if( !(*reg & 0x80000000 )) {\r
- // Unlock\r
- *reg = FLASH_HLR_PASSWORD;\r
- }\r
- // clear\r
- // *reg &= ~(H7F_HBL_HBLOCK);\r
- // Set\r
- if( logic ) {\r
- *reg |= ((blocks->highEnabledBlocks)& H7F_HBL_HBLOCK);\r
- } else {\r
- *reg &= ((~blocks->highEnabledBlocks)& H7F_HBL_HBLOCK);\r
- }\r
- }\r
-#if 0\r
- else {\r
- reg = &(flashHw->HLR.R);\r
- // Set all\r
- *reg |= 0x800000ff;\r
- }\r
-#endif\r
-}\r
-\r
-\r
-\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-#ifndef FLS_H7F_H_\r
-#define FLS_H7F_H_\r
-\r
-#define FLS_ERASE_SECTION __attribute__ ((section (".fls_erase")));\r
-#define FLS_WRITE_SECTION __attribute__ ((section (".fls_write")));\r
-\r
-#define H7F_BUSY 0x1000\r
-\r
-typedef struct {\r
- UINT32 dest;\r
- UINT32 size;\r
- UINT32 source;\r
- UINT32 pageSize;\r
- UINT32 sourceIndex;\r
- UINT32 temp;\r
- UINT32 state;\r
-} Fls_ProgInfoType;\r
-\r
-typedef struct {\r
- UINT32 state;\r
-} Fls_EraseInfoType;\r
-\r
-typedef struct {\r
- UINT32 lowEnabledBlocks;\r
- UINT32 midEnabledBlocks;\r
- UINT32 highEnabledBlocks;\r
- // 1 - primary, 2 - secondary\r
- UINT32 shadowBlocks;\r
-} Fls_EraseBlockType;\r
-\r
-// TODO : document API\r
-UINT32 Fls_H7F_FlashErase ( PSSD_CONFIG pSSDConfig,\r
- BOOL shadowFlag,\r
- UINT32 lowEnabledBlocks,\r
- UINT32 midEnabledBlocks,\r
- UINT32 highEnabledBlocks,\r
- Fls_EraseInfoType *eraseInfo) FLS_ERASE_SECTION;\r
-\r
-UINT32 Fls_H7F_EraseStatus ( PSSD_CONFIG pSSDConfig ) FLS_ERASE_SECTION ;\r
-\r
-UINT32 Fls_H7F_Program ( PSSD_CONFIG pSSDConfig, Fls_ProgInfoType *pInfo ) FLS_WRITE_SECTION ;\r
-\r
-void Fls_H7F_SetLock(Fls_EraseBlockType*,UINT8);\r
-\r
-#endif /*FLS_H7F_H_*/\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Copyright (C) 2009-2011 ArcCore AB <contact@arccore.com>
+ * Licensed under ArcCore Embedded Software License Agreement.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+/*
+ * flash_h7f_c90.c
+ *
+ * Created on: 29 aug 2011
+ * Author: mahi
+ *
+ * Interface for the low level flash written by freescale (flash_ll_h7f_c90.c )
+ *
+ * This file aims to support support all mpc55xx as well as mpc56xx.
+ */
+
+/* ----------------------------[includes]------------------------------------*/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <string.h>
+#include <assert.h>
+#include "flash_ll_h7f_c90.h"
+#include "typedefs.h"
+#include "io.h"
+//#include "flash_mpc5xxx.h"
+#include "Fls_Cfg.h"
+
+#define USE_DEBUG_PRINTF
+#include "debug.h"
+
+#define ASSERT(_x) assert(_x)
+
+/* ----------------------------[private define]------------------------------*/
+
+#define PFLASH_CTRL_BASE 0xFFE8_8000
+#define PFCR0 (PFLASH_CTRL_BASE + 0x1c)
+#define PFCR1 (PFLASH_CTRL_BASE + 0x20)
+#define PFAPR (PFLASH_CTRL_BASE + 0x24)
+
+#define NVLML_LME (1<<31)
+
+
+//#define FLASH_BANK_CNT 3
+#define PASSWORD_LOW_MID 0xA1A11111UL
+#define PASSWORD_HIGH 0xB2B22222UL
+#define PASSWORD_SECONDARY_LOW_MID 0xC3C33333UL
+
+/* ----------------------------[private macro]-------------------------------*/
+
+/* Check if two ranges overlap (_a0->_a1 is first range ) */
+#define OVERLAP(_a0,_a1, _b0, _b1 ) ( ( ((_a0) <= (_b0)) && ((_b0) <= (_a1)) ) || \
+ ( ((_b0) <= (_a0)) && ((_a0) <= (_b1)) ) )
+
+/* ----------------------------[private typedef]-----------------------------*/
+/* ----------------------------[private function prototypes]-----------------*/
+/* ----------------------------[private variables]---------------------------*/
+
+/* ----------------------------[private functions]---------------------------*/
+/* ----------------------------[public functions]----------------------------*/
+
+/**
+ * Convert address to strange block format that freescale likes.
+ *
+ * @param addr
+ * @param size
+ * @param fb
+ * @return
+ */
+static bool getAffectedBlocks( const FlashType *bPtr, uintptr_t addr, size_t size, uint32_t (*fb)[ADDR_SPACE_CNT] ) {
+ uint16_t addrSpace;
+ bool anyAffected = false;
+
+
+ memset(fb, 0, sizeof(*fb) );
+
+ /* Check if sector range overlaps */
+ for (int sector = 0; sector < bPtr->sectCnt; sector++)
+ {
+ if (OVERLAP( addr,addr+size-1,
+ bPtr->sectAddr[sector],bPtr->sectAddr[sector+1]-1))
+ {
+ addrSpace = bPtr->addrSpace[sector];
+ (*fb)[ADDR_SPACE_GET(addrSpace)] |= (1 << ADDR_SPACE_GET_SECTOR(addrSpace));
+ anyAffected = true;
+ }
+ }
+ return anyAffected;
+}
+
+
+/**
+ * Setup the flash
+ */
+
+void Flash_Init(void) {
+
+ /* TODO: Does freescale setup the platform flash controller with sane
+ * values, or not?
+ */
+}
+
+uint32_t Flash_Lock(const FlashType *fPtr, uint32_t op, uintptr_t from, uint32_t size) {
+ uint32_t flashBlocks[ADDR_SPACE_CNT];
+ int bank;
+ const FlashType *bPtr;
+ uint32_t regAddr;
+ uint32_t lock;
+
+ LDEBUG_PRINTF("Flash_lock from:%p size:%ul\n");
+
+ for (bank = 0; bank < FLASH_BANK_CNT; bank++) {
+ bPtr = &fPtr[bank];
+
+ getAffectedBlocks(bPtr, from, size, &flashBlocks);
+
+ /* ---------- Low/Mid ---------- */
+ lock = (flashBlocks[ADDR_SPACE_MID]<<14) | flashBlocks[ADDR_SPACE_LOW];
+ if( lock != 0 ) {
+ regAddr = bPtr->regBase + C90FL_LML;
+
+ /* Unlock LML (enable LME bit) */
+ if ( (READ32(regAddr) & NVLML_LME) == 0 ) {
+ WRITE32(regAddr,PASSWORD_LOW_MID);
+ }
+ /* lock/unlock */
+ if( op & FLASH_OP_UNLOCK ) {
+ WRITE32(regAddr,(~lock) & READ32(regAddr) );
+ } else {
+ WRITE32(regAddr,(lock) | READ32(regAddr) );
+ }
+
+ regAddr = bPtr->regBase + C90FL_SLL;
+ /* Unlock secondary, SLL (enable LME bit) */
+ if ( (READ32(regAddr) & NVLML_LME) == 0 ) {
+ WRITE32(regAddr,PASSWORD_SECONDARY_LOW_MID);
+ }
+ /* lock/unlock */
+ if( op & FLASH_OP_UNLOCK ) {
+ WRITE32(regAddr,(~lock) & READ32(regAddr) );
+ } else {
+ WRITE32(regAddr,(lock) | READ32(regAddr) );
+ }
+
+ }
+
+ /* ---------- high ----------*/
+ lock = flashBlocks[ADDR_SPACE_HIGH];
+ if( lock != 0 ) {
+ regAddr = bPtr->regBase + C90FL_HBL;
+ /* Unlock LML (enable LME bit) */
+ if ( (READ32(regAddr) & NVLML_LME) == 0 ) {
+ WRITE32(regAddr,PASSWORD_HIGH);
+ }
+
+ /* lock/unlock */
+ if( op & FLASH_OP_UNLOCK ) {
+ WRITE32(regAddr,(~lock) & READ32(regAddr) );
+ } else {
+ WRITE32(regAddr,(lock) | READ32(regAddr) );
+ }
+ }
+ }
+ return 0;
+}
+
+/**
+ *
+ * @param fPtr
+ * @param dest
+ * @param size
+ * @return
+ */
+uint32_t Flash_Erase( const FlashType *fPtr, uintptr_t dest, uint32_t size, flashCbType cb) {
+ uint32_t rv;
+ uint32_t flashBlocks[ADDR_SPACE_CNT];
+ const FlashType *bPtr;
+ bool affected;
+
+ /* FSL functions are for each bank, so loop over banks */
+ for (int bank = 0; bank < FLASH_BANK_CNT; bank++) {
+ bPtr = &fPtr[bank];
+
+ affected = getAffectedBlocks(bPtr, dest, size, &flashBlocks);
+ if( affected == false ) {
+ continue;
+ }
+
+ rv = FSL_FlashEraseStart(bPtr->regBase, dest, flashBlocks[0],
+ flashBlocks[1], flashBlocks[2]);
+
+ if (rv != EE_OK) {
+ return EE_ERROR_PE_OPT;
+ }
+
+ /* Poll status */
+ while ((rv = FSL_FlashCheckStatus(bPtr->regBase)) != EE_OK) {
+
+ if (rv == EE_ERROR_PE_OPT) {
+ return rv;
+ }
+
+ if( cb != NULL ) {
+ cb();
+ }
+
+ }
+ }
+ return EE_OK;
+}
+
+
+#if 0
+/**
+ *
+ * @param to
+ * @param from
+ * @param size
+ * @return
+ */
+uint32_t Flash_ProgramStart( const FlashType *fPtr, uint32_t *to, uint32_t * from, uint32_t * size, flashCbType cb) {
+ uint32_t rv;
+ uint16_t fSize = size;
+ uint32_t fDest = (uint32_t) to;
+ uint32_t fSource = (uint32_t) from;
+ uint32_t flashBlocks[ADDR_SPACE_CNT];
+ uint32_t maxToProg;
+ const FlashType *bPtr;
+ bool affected;
+
+
+ /* Check double word alignment */
+ ASSERT((size % 8) == 0 );
+
+ /* FSL functions are for each bank, so loop over banks */
+ for (int bank = 0; bank < FLASH_BANK_CNT; bank++) {
+ bPtr = &fPtr[bank];
+
+ affected = getAffectedBlocks(bPtr, to, size, &flashBlocks);
+ if( affected == false ) {
+ /* This bank was not affected */
+ continue;
+ }
+
+ /* Program to the end of bank */
+ maxToProg = MIN(fSize, (bPtr->sectAddr[0] + bPtr->bankSize - fDest));
+ fSize -= maxToProg;
+
+ while(maxToProg) {
+ /* Program page */
+ rv = FSL_FlashProgramStart(bPtr->regBase, &fDest, &maxToProg, &fSource);
+
+ if (rv != EE_OK) {
+ return EE_ERROR_PE_OPT;
+ }
+
+#if 0
+ /* Poll status */
+ while ((rv = FSL_FlashCheckStatus(bPtr->regBase)) != EE_OK) {
+
+ if (rv == EE_ERROR_PE_OPT) {
+ return rv;
+ }
+
+ if( cb != NULL ) {
+ cb();
+ }
+ }
+#endif
+ }
+ }
+ return EE_OK;
+}
+#endif
+
+
+/**
+ *
+ * @param to
+ * @param from
+ * @param size
+ * @return
+ */
+uint32_t Flash_ProgramPageStart( const FlashType *fPtr, uint32_t *to, uint32_t * from, uint32_t * size, flashCbType cb) {
+ uint32_t flashBlocks[ADDR_SPACE_CNT];
+ const FlashType *bPtr;
+ bool affected;
+
+
+ /* Check double word alignment */
+ ASSERT((*size % 8) == 0 );
+
+ /* FSL functions are for each bank, so loop over banks */
+ for (int bank = 0; bank < FLASH_BANK_CNT; bank++) {
+ bPtr = &fPtr[bank];
+
+ affected = getAffectedBlocks(bPtr, *to, *size, &flashBlocks);
+ if( affected == false ) {
+ /* This bank was not affected */
+ continue;
+ }
+
+ return FSL_FlashProgramStart(bPtr->regBase, to, size, from);
+ }
+
+ return EE_OK;
+}
+uint32_t Flash_CheckStatus( const FlashType *fPtr ) {
+ return FSL_FlashCheckStatus(fPtr->regBase);
+}
+
+uint32_t Flash_SectorAligned( const FlashType *fPtr, uintptr_t addr ) {
+ uint32_t rv = EE_ERROR_MISMATCH;
+ const FlashType *bPtr;
+
+ for (int bank = 0; bank < FLASH_BANK_CNT; bank++) {
+ bPtr = &fPtr[bank];
+
+ /* In range of bank */
+ if( (addr >= bPtr->sectAddr[0]) &&
+ (addr <= (bPtr->sectAddr[bPtr->sectCnt])) )
+ {
+ for (int sector = 0; sector < bPtr->sectCnt; sector++)
+ {
+ if( addr == bPtr->sectAddr[sector] ) {
+ rv = EE_OK;
+ break;
+ }
+ }
+ break;
+ }
+ }
+ return rv;
+}
+
+
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Copyright (C) 2009-2011 ArcCore AB <contact@arccore.com>
+ * Licensed under ArcCore Embedded Software License Agreement.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+/*
+ * Inital driver by:
+ * COPYRIGHT :(c) 2009, Freescale & STMicroelectronics
+ *
+ * Modified to fit purpose:
+ * Copyright (C) ArcCore AB <contact@arccore.com>
+ *
+ */
+/* ----------------------------[includes]------------------------------------*/
+#include <stdint.h>
+#include <stdbool.h>
+#include "typedefs.h"
+#include "flash_ll_h7f_c90.h"
+#include "cpu.h"
+#include "io.h"
+
+/* ----------------------------[private define]------------------------------*/
+/* Module Configuration Register */
+#define C90FL_MCR_EER 0x00008000 /* ECC Event Error */
+#define C90FL_MCR_RWE 0x00004000 /* Read While Write Event Error */
+#define C90FL_MCR_DONE 0x00000400 /* State Machine Status */
+#define C90FL_MCR_PEG 0x00000200 /* Program/Erase Good */
+#define C90FL_MCR_PGM 0x00000010 /* Program */
+#define C90FL_MCR_PSUS 0x00000008 /* Program Suspend */
+#define C90FL_MCR_ERS 0x00000004 /* Erase */
+#define C90FL_MCR_ESUS 0x00000002 /* Erase Suspend */
+#define C90FL_MCR_EHV 0x00000001 /* Enable High Voltage */
+
+/* const definition*/
+#define DATAID_SIZE 2
+#define CTABLE_ITEM_SIZE 4
+#define PROGRAMMABLE_SIZE 8
+#define WORD_SIZE 4
+#define DWORD_SIZE 8
+#define PAGE_SIZE 16 /* OK */
+#if defined(C90_DFO)
+ #define PAGE_SIZE_BPS 4 /* Page buffer size for C90DFO flash */
+#else
+ #define PAGE_SIZE_BPS 8 /* Page buffer size for C90LC flash*/
+#endif
+
+/* macro for 64-bit data comparison*/
+#define CREATE_WORD64(high, low) (vuint64_t)((vuint64_t)(high) << 32 | (low))
+
+/* data record status state*/
+#define ERASED_HIGH 0xFFFFFFFF
+#define ERASED_LOW 0xFFFFFFFF
+#define RECORD_STATUS_ERASED CREATE_WORD64(ERASED_HIGH, ERASED_LOW)
+
+/* ----------------------------[private macro]-------------------------------*/
+
+/* read and write macros*/
+#define SET8(address, value) (*(uint8_t*)(address) |= (value))
+#define CLEAR8(address, value) (*(uint8_t*)(address) &= ~(value))
+
+#define SET16(address, value) (*(vuint16_t*)(address) |= (value))
+#define CLEAR16(address, value) (*(vuint16_t*)(address) &= ~(value))
+
+#define SET32(address, value) (*(vuint32_t*)(address) |= (value))
+#define CLEAR32(address, value) (*(vuint32_t*)(address) &= ~(value))
+
+#define SET64(address, value) (*(vuint64_t*)(address) |= (value))
+#define CLEAR64(address, value) (*(vuint64_t*)(address) &= ~(value))
+
+/* ----------------------------[private typedef]-----------------------------*/
+/* ----------------------------[private function prototypes]-----------------*/
+/* ----------------------------[private variables]---------------------------*/
+/* ----------------------------[private functions]---------------------------*/
+/* ----------------------------[public functions]----------------------------*/
+
+
+
+/* Flag to keep track of ECC Error Module*/
+typedef enum
+{
+ NONE = 0,
+ EE_MODULE = 1,
+ OTHER_MODULE = 2
+}EE_ModuleType;
+
+extern volatile EE_ModuleType eccErrorModule_Flag;
+
+/* Flag to keep track of ECC Error Status*/
+extern uint8_t volatile eccErrorStatus_Flag;
+
+
+/**
+ * Program a page
+ *
+ * @param c90flRegBase
+ * @param dest
+ * @param size
+ * @param source
+ * @return
+ */
+uint32_t FSL_FlashProgramStart (uint32_t c90flRegBase, uint32_t* dest, uint32_t* size, uint32_t* source)
+{
+ uint32_t counter; /* loop counter*/
+ uint32_t sourceIndex; /* source address index*/
+ uint32_t temp; /* temporary variable*/
+ uint64_t buffer[4]; /* internal source data buffer*/
+
+ /* Anything to program?*/
+ if ( *size == 0 )
+ {
+ return (EE_OK);
+ }
+
+ /* check the high voltage operation*/
+ if (READ32(c90flRegBase) & (C90FL_MCR_ERS | C90FL_MCR_PGM))
+ {
+ /* if any P/E operation in progress, return error*/
+ return (EE_INFO_HVOP_INPROGRESS);
+ }
+
+ /* calculate the size to be programmed within the page boundary*/
+ temp = *dest;
+ temp = ((temp / PAGE_SIZE_BPS) + 1) * PAGE_SIZE_BPS - temp;
+
+ /* there are remained data need programming*/
+ /* padding for not alignment data*/
+ for ( counter = 0; counter < (sizeof(buffer) / DWORD_SIZE); counter++)
+ {
+ buffer[counter] = CREATE_WORD64(ERASED_HIGH, ERASED_LOW);
+ }
+
+ /* copy one page to page buffer*/
+ for (sourceIndex = 0; (sourceIndex < temp) && (*size > 0); sourceIndex++)
+ {
+ /* copy data*/
+ WRITE8(((uint32_t)buffer + sourceIndex), FSL_FlashRead8(*source));
+
+ /* update source data pointer*/
+ *source += 1;
+
+ *size -= 1;
+ }
+
+ /* program this page*/
+ temp = ((sourceIndex + DWORD_SIZE - 1) / DWORD_SIZE);
+
+ /* Set MCR PGM bit*/
+ SET32(c90flRegBase, C90FL_MCR_PGM);
+
+ /* Program data within one page*/
+ for (sourceIndex = 0; sourceIndex < temp; sourceIndex++)
+ {
+#if defined(C90_DFO)
+ /* Programming interlock write*/
+ WRITE32(*dest, (uint32_t)(buffer[sourceIndex]>>32));
+
+ *dest += DWORD_SIZE/2;
+#else
+ /* Programming interlock write*/
+ WRITE64(*dest, buffer[sourceIndex]);
+
+ *dest += DWORD_SIZE;
+#endif
+ }
+
+ /* Set MCR EHV bit*/
+ SET32(c90flRegBase, C90FL_MCR_EHV);
+
+ return (EE_OK);
+}
+
+uint32_t FSL_FlashEraseStart (uint32_t c90flRegBase, uint32_t interlockWriteAddress, uint32_t lowEnabledBlock, uint32_t midEnabledBlock, uint32_t highEnabledBlock)
+{
+
+ /* check the high voltage operation*/
+ if (READ32(c90flRegBase) & (C90FL_MCR_ERS | C90FL_MCR_PGM))
+ {
+ /* if any P/E operation in progress, return error*/
+ return (EE_INFO_HVOP_INPROGRESS);
+ }
+
+ /* Set MCR ERS bit*/
+ SET32(c90flRegBase, C90FL_MCR_ERS);
+
+ /* prepare low enabled blocks*/
+ lowEnabledBlock &= 0x0000FFFF;
+
+ /* prepare middle enabled blocks*/
+ midEnabledBlock &= 0xF;
+ midEnabledBlock = midEnabledBlock << 16;
+
+ /* prepare high enabled blocks*/
+ highEnabledBlock &= 0x0FFFFFFF;
+
+ /* write the block selection registers*/
+ WRITE32 ((c90flRegBase + C90FL_LMS), (lowEnabledBlock | midEnabledBlock));
+ WRITE32 ((c90flRegBase + C90FL_HBS), highEnabledBlock);
+
+ /* Interlock write*/
+ WRITE32(interlockWriteAddress, 0xFFFFFFFF);
+
+ /* Set MCR EHV bit*/
+ SET32(c90flRegBase, C90FL_MCR_EHV);
+
+ return (EE_OK);
+}
+
+
+uint32_t FSL_FlashCheckStatus (uint32_t c90flRegBase)
+{
+ uint32_t returnCode; /* return code*/
+
+ /* initialize return code*/
+ returnCode = EE_OK;
+
+ /* Check if MCR DONE is set*/
+ if (READ32(c90flRegBase) & C90FL_MCR_DONE)
+ {
+ /* check the operation status*/
+ if(!(READ32(c90flRegBase) & C90FL_MCR_PEG))
+ {
+ /* high voltage operation failed*/
+ returnCode = EE_ERROR_PE_OPT;
+ }
+
+ /* end the high voltage operation*/
+ CLEAR32(c90flRegBase, C90FL_MCR_EHV);
+
+ /* check for program operation*/
+ if (READ32(c90flRegBase) & C90FL_MCR_PGM)
+ {
+ /* finish the program operation*/
+ CLEAR32(c90flRegBase, C90FL_MCR_PGM);
+ }
+ else
+ {
+ /* finish the erase operation*/
+ CLEAR32(c90flRegBase, C90FL_MCR_ERS);
+ }
+
+ return (returnCode);
+ }
+
+ return (EE_INFO_HVOP_INPROGRESS);
+}
+
+#if 0
+uint32_t FSL_DataVerify (uint32_t c90flRegBase, bool blankCheck,
+ uint32_t* dest, uint32_t* size, uint32_t* source,
+ uint32_t *compareAddress, uint64_t *compareData,
+ void(*CallBack)(void))
+{
+ uint32_t destIndex; /* destination address index*/
+ uint32_t counter; /* loop counter*/
+ uint32_t suspendState; /* suspend state*/
+ uint32_t returnCode; /* return code*/
+ uint64_t destData; /* dest data (double word type)*/
+ uint64_t sourceData; /* source data (byte type)*/
+
+ /* initialize return code*/
+ returnCode = EE_OK;
+
+ /* Clear comapreAddress and compareData arguments*/
+ *compareAddress = 0;
+ *compareData = 0;
+
+ /* check high voltage operation and try to suspend it*/
+ suspendState = FSL_FlashSuspend(c90flRegBase);
+
+ /* init sourceData, default is for blank checking*/
+ sourceData = CREATE_WORD64(ERASED_HIGH, ERASED_LOW);
+
+ /* Verify data word by word*/
+ for (destIndex = 0; (destIndex < DATA_VERIFY_NUMBER) && (*size > 0); destIndex += DWORD_SIZE)
+ {
+ /* callback service*/
+ if ((destIndex % CALLBACK_VERIFY_BYTES_NUMBER) == 0)
+ {
+ if(NULL_CALLBACK != CallBack)
+ {
+ CallBack();
+ }
+ }
+
+ /* get the data first*/
+ destData = FSL_FlashRead64(*dest);
+
+ /* check if it is blank check or data verfication*/
+ if (!blankCheck)
+ {
+ /* data verification*/
+ /* read source data*/
+ sourceData = FSL_FlashRead64(*source);
+
+ /* only updated source while performing data verify*/
+ *source += DWORD_SIZE;
+ }
+
+ /* check if the size is not double word length*/
+ if (*size < 8 )
+ {
+ /* fetch the correct data depending on the actual size,*/
+ for (counter = 0; counter < *size; counter++)
+ {
+ if (*(uint8_t*)((uint32_t)(&destData) + counter) != *(uint8_t*)((uint32_t)(&sourceData) + counter))
+ {
+ /* if not match, set error return code*/
+ returnCode = EE_ERROR_MISMATCH;
+ break;
+ }
+ }
+
+ /* for end of the loop only*/
+ *size = DWORD_SIZE;
+ }
+ else
+ {
+ /* compare the data against the Flash content*/
+ if (destData != sourceData)
+ {
+ /* if not match, set error return code*/
+ returnCode = EE_ERROR_MISMATCH;
+ }
+ }
+
+ /* check return code*/
+ if (returnCode == EE_ERROR_MISMATCH)
+ {
+ /* data mismatch*/
+ *compareAddress = *dest;
+ *compareData = destData;
+ break;
+ }
+
+ /* update the dest*/
+ *dest += DWORD_SIZE;
+
+ /* update the size*/
+ *size -= DWORD_SIZE;
+ }
+
+ /* check if it needs resume*/
+ FSL_FlashResume(c90flRegBase, suspendState);
+
+ return (returnCode);
+}
+
+uint32_t FSL_FlashSuspend (uint32_t c90flRegBase)
+{
+ uint32_t returnCode; /* return code*/
+ uint32_t MCRValue; /* MCR register value*/
+
+ /* initialize the return code*/
+ returnCode = EE_OK;
+
+ /* get the current MCR value*/
+ MCRValue = READ32(c90flRegBase);
+
+ /* no P/E sequence: PGM=0 and ERS=0*/
+
+ /* possible stages for program sequece:*/
+ /* a. interlock write; (PGM=1;EHV=0; PSUS=0;DONE=1; ignore PEG) OR (ERS=1;ESUS=1)*/
+ /* b. high voltage active; (PGM=1;EHV=1; PSUS=0;DONE=0; ignore PEG) OR (ERS=1;ESUS=1)*/
+ /* c. entering suspend state; (PGM=1;EHV=1; PSUS=1;DONE=0; ignore PEG) OR (ERS=1;ESUS=1)*/
+ /* d. in suspend state; (PGM=1;EHV=1/0;PSUS=1;DONE=1; ignore PEG) OR (ERS=1;ESUS=1)*/
+ /* e. resuming from suspend state; (PGM=1;EHV=1; PSUS=0;DONE=1; ignore PEG) OR (ERS=1;ESUS=1)*/
+ /* f. high voltage stopped; (PGM=1;EHV=1; PSUS=0;DONE=1; valid PEG) OR (ERS=1;ESUS=1)*/
+ /* g. abort period. (PGM=1;EHV=0; PSUS=0;DONE=0; ignore PEG) OR (ERS=1;ESUS=1)*/
+
+ /* possible stages for erase sequece:*/
+ /* a. interlock write; (ERS=1;EHV=0; ESUS=0;DONE=1; ignore PEG) AND (PGM=0;PSUS=0)*/
+ /* b. high voltage active; (ERS=1;EHV=1; ESUS=0;DONE=0; ignore PEG) AND (PGM=0;PSUS=0)*/
+ /* c. entering suspend state; (ERS=1;EHV=1; ESUS=1;DONE=0; ignore PEG) AND (PGM=0;PSUS=0)*/
+ /* d. in suspend state; (ERS=1;EHV=1/0;ESUS=1;DONE=1; ignore PEG) AND (PGM=0;PSUS=0)*/
+ /* e. resuming from suspend state; (ERS=1;EHV=1; ESUS=0;DONE=1; ignore PEG) AND (PGM=0;PSUS=0)*/
+ /* f. high voltage stopped; (ERS=1;EHV=1; ESUS=0;DONE=1; valid PEG) AND (PGM=0;PSUS=0)*/
+ /* g. abort period. (ERS=1;EHV=0; ESUS=0;DONE=0; ignore PEG) AND (PGM=0;PSUS=0)*/
+
+ /* b. high voltage active*/
+ /* e. resuming from suspend state*/
+ /* f. high voltage stopped*/
+ if ( (MCRValue & C90FL_MCR_EHV) &&
+ ( ((MCRValue & C90FL_MCR_PGM) && !(MCRValue & C90FL_MCR_PSUS)) ||
+ ((MCRValue & C90FL_MCR_ERS) && !(MCRValue & C90FL_MCR_ESUS)) ) )
+ {
+ if (MCRValue & C90FL_MCR_PGM)
+ {
+ /* program suspend*/
+ C90FLMCR_EED_BIT_SET (c90flRegBase, C90FL_MCR_PSUS); /* set MCR-PSUS bit*/
+ returnCode = EE_INFO_PROGRAM_SUSPEND;
+ }
+ else
+ {
+ /* erase suspend*/
+ C90FLMCR_EED_BIT_SET (c90flRegBase, C90FL_MCR_ESUS); /* set MCR-ESUS bit*/
+ returnCode = EE_INFO_ERASE_SUSPEND;
+ }
+ }
+
+ /* Wait until MCR-DONE = 1*/
+ while (!(READ32(c90flRegBase) & C90FL_MCR_DONE))
+ {
+ }
+
+ /* Set MCR-EHV to 0*/
+ C90FLMCR_EED_BIT_CLEAR (c90flRegBase, C90FL_MCR_EHV);
+
+ return (returnCode);
+}
+
+uint32_t FSL_FlashResume (uint32_t c90flRegBase, uint32_t suspendStatus)
+{
+ uint32_t mask; /* bit mask value*/
+ uint32_t count; /* loop counter*/
+
+ /* initialize the loop counter*/
+ count = FLASH_RESUME_WAIT;
+
+ /* check the suspend state*/
+ if (suspendStatus == EE_INFO_PROGRAM_SUSPEND)
+ {
+ /* need resume programming*/
+ mask = C90FL_MCR_PSUS;
+ }
+ else if (suspendStatus == EE_INFO_ERASE_SUSPEND)
+ {
+ /* need resume erasing*/
+ mask = C90FL_MCR_ESUS;
+ }
+ else
+ {
+ /* nothing to resume*/
+ return (EE_OK);
+ }
+
+ /* Set MCR-EHV bit*/
+ C90FLMCR_EED_BIT_SET (c90flRegBase, C90FL_MCR_EHV);
+
+ /* clear the MCR-ESUS bit or MCR-PSUS bit*/
+ C90FLMCR_EED_BIT_CLEAR (c90flRegBase, mask);
+
+ /* wait the MCR-DONE bit goes low*/
+ while ( (READ32(c90flRegBase) & C90FL_MCR_DONE) && (count--) > 0)
+ {
+ }
+
+ return (EE_OK);
+}
+
+uint32_t FSL_FlashEraseAbort (uint32_t c90flRegBase)
+{
+ uint32_t returnCode = EE_OK; /* return code*/
+
+ if(READ32(c90flRegBase) & C90FL_MCR_ERS)
+ {
+ /* Set MCR-EHV to 0*/
+ C90FLMCR_EED_BIT_CLEAR (c90flRegBase, C90FL_MCR_EHV);
+
+ /* Wait until MCR-DONE = 1*/
+ while (!(READ32(c90flRegBase) & C90FL_MCR_DONE))
+ {
+ }
+
+ /* finish the erase operation*/
+ CLEAR32(c90flRegBase, C90FL_MCR_ERS);
+ }
+ return (returnCode);
+}
+
+uint32_t FSL_FlashRead (uint32_t c90flRegBase, uint32_t* dest, uint32_t* size, uint32_t* buffer, void(*CallBack)(void))
+{
+ uint32_t suspendState; /* suspend state*/
+ uint32_t counter; /* loop counter*/
+
+ /* check high voltage operation*/
+ suspendState = FSL_FlashSuspend(c90flRegBase);
+
+ /* read data*/
+ for (counter = 0; (*size > 0) && (counter < DATA_READ_NUMBER); counter++)
+ {
+ /* callback service*/
+ if ((counter % CALLBACK_READ_BYTES_NUMBER) == 0)
+ {
+ if(NULL_CALLBACK != CallBack)
+ {
+ CallBack();
+ }
+ }
+
+ WRITE8(*buffer, FSL_FlashRead8(*dest));
+ (*dest) += 1;
+ (*buffer) += 1;
+ (*size) -= 1;
+ }
+
+ /* check if it needs resume*/
+ FSL_FlashResume(c90flRegBase, suspendState);
+
+ return (EE_OK);
+}
+//put Flash read functions in non-VLE sections
+//#pragma section data_type ".text"
+
+/*exception handler*/
+void EER_exception_handler(void)
+{
+ if (eccErrorModule_Flag == EE_MODULE)
+ {
+ eccErrorStatus_Flag = true;
+ }
+ else
+ {
+ /*do nothing*/
+ }
+ return;
+}
+
+
+/*put Flash read functions in non-VLE sections*/
+/*#pragma section data_type ".text"*/
+#endif
+uint8_t FSL_FlashRead8(uint32_t address)
+{
+ return((uint8_t)(*(uint8_t*)(address)));
+}
+
+uint64_t FSL_FlashRead64(uint32_t address)
+{
+ return((uint64_t)(*(vuint64_t*)(address)));
+}
+
+
+
+
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Copyright (C) 2009-2011 ArcCore AB <contact@arccore.com>
+ * Licensed under ArcCore Embedded Software License Agreement.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+/* Inital code by:
+ * COPYRIGHT :(c) 2009, Freescale & STMicroelectronics
+ *
+ * Modified to fit purpose:
+ * Copyright (C) ArcCore AB <contact@arccore.com>
+ */
+
+#ifndef FLASH_H7F_C90_H_
+#define FLASH_H7F_C90_H_
+
+#include "Std_Types.h"
+#include "flash.h"
+
+/* Offsets of C90FL Control Registers*/
+#define C90FL_MCR 0x0000 /* Module Configuration Register */
+#define C90FL_LML 0x0004 /* Low/Mid Address Sapce Block Locking Register */
+#define C90FL_HBL 0x0008 /* High Address Sapce Block Locking Register */
+#define C90FL_SLL 0x000C /* Secondary Low/Mid Address Space Block Locking Register */
+#define C90FL_LMS 0x0010 /* Low/Mid Address Space Block Select Register */
+#define C90FL_HBS 0x0014 /* High Address Space Block Select Register */
+
+/* macros for scheduling*/
+//#define NUMBER_OF_SEARCHING_RECORD_IN_BLOCK 0x2000
+#define DATA_VERIFY_NUMBER 0x5000
+#define DATA_READ_NUMBER 0x5000
+
+/* macros for CallBack period controlling*/
+#define CALLBACK_READ_BYTES_NUMBER 0x0020
+//#define CALLBACK_SEARCHING_BYTES_NUMBER 0x001A
+#define CALLBACK_VERIFY_BYTES_NUMBER 0x0020
+//#define CALLBACK_FILL_BUFFER 0x0060
+
+/* NULL callback */
+#define NULL_CALLBACK ((void *) 0xFFFFFFFF)
+
+/* return code definition*/
+#define EE_OK 0x00000000
+#define EE_FIRST_TIME_INITIALIZATION 0x00000001
+#define EE_INFO_HVOP_INPROGRESS 0x00000002
+#define EE_INFO_PROGRAM_SUSPEND 0x00000004
+#define EE_INFO_ERASE_SUSPEND 0x00000010
+#define EE_ERROR_WRITE_IN_PROGRESS 0x00000020
+#define EE_ERROR_PE_OPT 0x00000040
+#define EE_ERROR_MISMATCH 0x00000080
+#define EE_ERROR_BLOCK_STATUS 0x00000100
+#define EE_ERROR_RECORD_STATUS 0x00000200
+#define EE_ERROR_BLOCK_CONFIG 0x00000400
+#define EE_ERROR_DATA_NOT_FOUND 0x00000800
+#define EE_ERROR_NOT_IN_CACHE 0x00001000
+#define EE_ERROR_NO_ENOUGH_SPACE 0x00002000
+
+/* macros for Flash suspend and resume*/
+#define C90FLMCR_EED_BIT_SET(MCRAddress, mask) \
+ WRITE32(MCRAddress, ((mask | READ32(MCRAddress)) & (~(C90FL_MCR_EER | C90FL_MCR_RWE))))
+
+#define C90FLMCR_EED_BIT_CLEAR(MCRAddress, mask) \
+ WRITE32(MCRAddress, (((~mask) & READ32(MCRAddress)) & (~(C90FL_MCR_EER | C90FL_MCR_RWE))))
+
+#define FLASH_RESUME_WAIT 15
+
+/* structure declaration*/
+typedef struct
+{
+ uint64_t dataStatus; /* the data record status*/
+ uint16_t dataID; /* the unique data ID*/
+ uint16_t dataSize; /* the data size*/
+ uint32_t wordData; /* the first 4 bytes data*/
+}DATA_RECORD_HEAD;
+
+
+typedef struct
+{
+ uint32_t enabledBlock; /* the block bit map in specific space*/
+ uint32_t blockStartAddr; /* the block start address*/
+ uint32_t blockSize; /* the block size*/
+ uint32_t blankSpace; /* the address pointer to the blank space*/
+ uint8_t blockSpace; /* the space (low, middle or high) for the block*/
+}BLOCK_CONFIG;
+
+
+uint32_t FSL_FlashProgramStart (uint32_t c90flRegBase, uint32_t* dest, uint32_t* size, uint32_t* source);
+uint32_t FSL_FlashEraseStart (uint32_t c90flRegBase, uint32_t interlockWriteAddress, uint32_t lowEnabledBlock, uint32_t midEnabledBlock, uint32_t highEnabledBlock);
+uint32_t FSL_FlashCheckStatus (uint32_t c90flRegBase);
+uint32_t FSL_DataVerify (uint32_t c90flRegBase, bool blankCheck, uint32_t* dest, uint32_t* size, uint32_t* source, uint32_t *compareAddress, uint64_t *compareData, void(*CallBack)(void));
+uint32_t FSL_FlashSuspend (uint32_t c90flRegBase);
+uint32_t FSL_FlashResume (uint32_t c90flRegBase, uint32_t resumeType);
+uint32_t FSL_FlashRead (uint32_t c90flRegBase, uint32_t* dest, uint32_t* size, uint32_t* buffer, void(*CallBack)(void));
+uint32_t FSL_FlashEraseAbort (uint32_t c90flRegBase);
+
+
+uint32_t FSL_SearchRecordInBlock (BLOCK_CONFIG* blockConf, uint32_t c90flRegBase, uint32_t bufferAddress, uint32_t bufferSize, uint16_t startID, uint32_t* startAddrInBlock, uint16_t* nextStartID, void(*CallBack)(void));
+uint8_t FSL_FlashRead8(uint32_t address);
+uint64_t FSL_FlashRead64(uint32_t address);
+void FSL_ReadRecordHead(uint32_t address, DATA_RECORD_HEAD *pLocRecHead);
+uint32_t readAndClearEei(void);
+void restoreEei(uint32_t value);
+void EER_exception_handler(void);
+
+#endif /* FLASH_H7F_C90_H_ */
typedef volatile int32_t vint32_t;\r
typedef volatile uint32_t vuint32_t;\r
\r
+ typedef volatile signed long long vint64_t;\r
+ typedef volatile unsigned long long vuint64_t;\r
+\r
+\r
#else\r
#ifdef __ghs__ //GreenHills\r
#include <stdint.h>\r
typedef volatile int32_t vint32_t;\r
typedef volatile uint32_t vuint32_t;\r
\r
+ typedef volatile signed long long vint64_t;\r
+ typedef volatile unsigned long long vuint64_t;\r
+\r
+\r
#else\r
\r
// This is needed for compilers that don't have a stdint.h file\r
\r
typedef volatile signed int vint32_t;\r
typedef volatile unsigned int vuint32_t; \r
+\r
+ typedef volatile signed long long vint64_t;\r
+ typedef volatile unsigned long long vuint64_t;\r
+\r
#endif\r
#endif\r
#endif\r
# Flash\r
obj-$(USE_FLS) += Fls.o\r
obj-$(USE_FLS) += Fls_Cfg.o\r
-ifeq ($(CFG_MPC5606S),y)\r
-obj-$(CFG_MPC55XX)-$(USE_FLS) += Fls_C90FL.o\r
-else\r
-obj-$(CFG_MPC55XX)-$(USE_FLS) += Fls_H7F.o\r
-endif\r
+obj-$(CFG_MPC55XX)-$(USE_FLS) += flash_h7f_c90.o\r
+obj-$(CFG_MPC55XX)-$(USE_FLS) += flash_ll_h7f_c90.o\r
+\r
\r
# Bring in the freescale driver source \r
inc-$(CFG_MPC55XX) += $(ROOTDIR)/$(ARCH_PATH-y)/delivery/mpc5500_h7f/include\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#include "Fls.h"\r
+#include "flash.h"\r
+#include <stdlib.h>\r
+\r
+\r
+#if defined(CFG_MPC5606S)\r
+\r
+/* TODO: This can actually be read from the flash instead */\r
+const FlashType flashInfo[] = {\r
+ /* NO RWW */\r
+\r
+ /* Bank 0, Array 0 (LOW) */\r
+ [0].sectCnt = 8,\r
+ [0].bankSize = 0x80000,\r
+// [0].bankRange = BANK_RANGE_CODE_LOW,\r
+ [0].regBase = 0xC3F88000UL,\r
+ [0].sectAddr[0] = 0, /* 0, B0F0, LOW */\r
+ [0].addrSpace[0] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 0,\r
+ [0].sectAddr[1] = 0x08000, /* 1, B0F1, LOW */\r
+ [0].addrSpace[1] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 1,\r
+ [0].sectAddr[2] = 0x0c000, /* 2, B0F2, LOW */\r
+ [0].addrSpace[2] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 2,\r
+ [0].sectAddr[3] = 0x10000, /* 3, B0F3, LOW */\r
+ [0].addrSpace[3] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 3,\r
+ [0].sectAddr[4] = 0x18000, /* 4, B0F4, LOW */\r
+ [0].addrSpace[4] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 4,\r
+ [0].sectAddr[5] = 0x20000, /* 5, B0F5, LOW */\r
+ [0].addrSpace[5] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 5,\r
+ [0].sectAddr[6] = 0x40000, /* 6, B0F6, MID */\r
+ [0].addrSpace[6] = ADDR_SPACE_SET(ADDR_SPACE_MID) + 0,\r
+ [0].sectAddr[7] = 0x60000, /* 7, B0F7, MID */\r
+ [0].addrSpace[7] = ADDR_SPACE_SET(ADDR_SPACE_MID) + 1,\r
+ [0].sectAddr[8] = 0x80000, /* End, NOT a sector */\r
+\r
+ /* Bank 1, Data */\r
+ [1].sectCnt = 4,\r
+ [1].bankSize = 0x810000 - 0x800000,\r
+ [1].regBase = 0xC3F8C000UL,\r
+ [1].sectAddr[0] = 0x800000, /* LOW */\r
+ [1].addrSpace[0] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 0,\r
+ [1].sectAddr[1] = 0x804000, /* LOW */\r
+ [1].addrSpace[1] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 1,\r
+ [1].sectAddr[2] = 0x808000, /* LOW */\r
+ [1].addrSpace[2] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 2,\r
+ [1].sectAddr[3] = 0x80c000, /* LOW */\r
+ [1].addrSpace[3] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 3,\r
+ [1].sectAddr[4] = 0x810000, /* End, NOT a sector */\r
+\r
+ /* Bank 2, Array 1 (MID)*/\r
+ [2].sectCnt = 4,\r
+ [2].bankSize = 0x100000-0x80000,\r
+ [2].regBase = 0xC3FB0000UL,\r
+ [2].sectAddr[0] = 0x80000, /* 0, B2F0, LOW */\r
+ [2].addrSpace[0] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 0,\r
+ [2].sectAddr[1] = 0xa0000, /* 1, B2F1, LOW */\r
+ [2].addrSpace[1] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 1,\r
+ [2].sectAddr[2] = 0xc0000, /* 2, B2F2, MID */\r
+ [2].addrSpace[2] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 2,\r
+ [2].sectAddr[3] = 0xe0000, /* 3, B2F3, MID */\r
+ [2].addrSpace[3] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 3,\r
+ [2].sectAddr[4] = 0x100000, /* End, NOT a sector */\r
+};\r
+#elif defined(CFG_MPC5668G)\r
+ /* RWW between partitions*\r
+ *\r
+ * LOW 8*16KB + 2*64KB = 256KB\r
+ * MID 2*128KB = 256KB\r
+ * HIGH 2*256KB = 1.5MB\r
+ * 2*256KB\r
+ * 2*256KB\r
+ */\r
+\r
+const FlashType flashInfo[] = {\r
+ /* LOW */\r
+ [0].sectCnt = 18,\r
+ [0].bankSize = 0x200000,\r
+ [0].regBase = 0xffff8000UL,\r
+ [0].sectAddr[0] = 0, /* 0, B0F0, LOW */\r
+ [0].addrSpace[0] = ADDR_SPACE(0, ADDR_SPACE_LOW, 1 ),\r
+ [0].sectAddr[1] = 0x00004000, /* 1, B0F1, LOW */\r
+ [0].addrSpace[1] = ADDR_SPACE(1, ADDR_SPACE_LOW, 1 ),\r
+ [0].sectAddr[2] = 0x00008000, /* 2, B0F2, LOW */\r
+ [0].addrSpace[2] = ADDR_SPACE(2, ADDR_SPACE_LOW, 1 ),\r
+ [0].sectAddr[3] = 0x0000c000, /* 3, B0F3, LOW */\r
+ [0].addrSpace[3] = ADDR_SPACE(3, ADDR_SPACE_LOW, 1 ),\r
+ [0].sectAddr[4] = 0x00010000, /* 4, B0F4, LOW */\r
+ [0].addrSpace[4] = ADDR_SPACE(4, ADDR_SPACE_LOW, 2 ),\r
+ [0].sectAddr[5] = 0x00014000, /* 5, B0F5, LOW */\r
+ [0].addrSpace[5] = ADDR_SPACE(5, ADDR_SPACE_LOW, 2 ),\r
+ [0].sectAddr[6] = 0x00018000, /* 6, B0F6, LOW */\r
+ [0].addrSpace[6] = ADDR_SPACE(6, ADDR_SPACE_LOW, 2 ),\r
+ [0].sectAddr[7] = 0x0001c000, /* 7, B0F7, LOW */\r
+ [0].addrSpace[7] = ADDR_SPACE(7, ADDR_SPACE_LOW, 2 ),\r
+ [0].sectAddr[8] = 0x00020000, /* 8, B0F8, LOW */\r
+ [0].addrSpace[8] = ADDR_SPACE(8, ADDR_SPACE_LOW, 3 ),\r
+ [0].sectAddr[9] = 0x00030000, /* 9, B0F9, LOW */\r
+ [0].addrSpace[9] = ADDR_SPACE(9, ADDR_SPACE_LOW, 3 ),\r
+\r
+ /* MID */\r
+ [0].sectAddr[10] = 0x00040000, /* 0, B0F9, LOW */\r
+ [0].addrSpace[10] = ADDR_SPACE(0, ADDR_SPACE_MID, 4 ),\r
+ [0].sectAddr[11] = 0x00060000, /* 1, B0F9, LOW */\r
+ [0].addrSpace[11] = ADDR_SPACE(1, ADDR_SPACE_MID, 4 ),\r
+\r
+ /* HIGH */\r
+ [0].sectAddr[12] = 0x00080000, /* 0, B0F9, LOW */\r
+ [0].addrSpace[12] = ADDR_SPACE(0, ADDR_SPACE_HIGH, 5 ),\r
+ [0].sectAddr[13] = 0x000c0000, /* 1, B0F9, LOW */\r
+ [0].addrSpace[13] = ADDR_SPACE(1, ADDR_SPACE_HIGH, 5 ),\r
+ [0].sectAddr[14] = 0x00100000, /* 2, B0F9, LOW */\r
+ [0].addrSpace[14] = ADDR_SPACE(2, ADDR_SPACE_HIGH, 6 ),\r
+ [0].sectAddr[15] = 0x00140000, /* 3, B0F9, LOW */\r
+ [0].addrSpace[15] = ADDR_SPACE(3, ADDR_SPACE_HIGH, 6 ),\r
+ [0].sectAddr[16] = 0x00180000, /* 4, B0F9, LOW */\r
+ [0].addrSpace[16] = ADDR_SPACE(4, ADDR_SPACE_HIGH, 7 ),\r
+ [0].sectAddr[17] = 0x001c0000, /* 5, B0F9, LOW */\r
+ [0].addrSpace[17] = ADDR_SPACE(5, ADDR_SPACE_HIGH, 7 ),\r
+ [0].sectAddr[18] = 0x00200000, /* End, NOT a sector */\r
+};\r
+#elif defined(CFG_MPC5516)\r
+ /* RWW between partitions*\r
+ *\r
+ * LOW 8*16KB + 2*64KB = 256KB\r
+ * MID 2*128KB = 256KB\r
+ * HIGH 2*256KB = 1.5MB\r
+ * 2*256KB\r
+ * 2*256KB\r
+ */\r
+\r
+const FlashType flashInfo[] = {\r
+ /* LOW 0-9 */\r
+ [0].sectCnt = 16,\r
+ [0].bankSize = 0x100000,\r
+ [0].regBase = 0xffff8000UL,\r
+ [0].sectAddr[0] = 0, /* 0, B0F0, LOW */\r
+ [0].addrSpace[0] = ADDR_SPACE(0, ADDR_SPACE_LOW, 1 ),\r
+ [0].sectAddr[1] = 0x00004000, /* 1, B0F1, LOW */\r
+ [0].addrSpace[1] = ADDR_SPACE(1, ADDR_SPACE_LOW, 1 ),\r
+ [0].sectAddr[2] = 0x00008000, /* 2, B0F2, LOW */\r
+ [0].addrSpace[2] = ADDR_SPACE(2, ADDR_SPACE_LOW, 1 ),\r
+ [0].sectAddr[3] = 0x0000c000, /* 3, B0F3, LOW */\r
+ [0].addrSpace[3] = ADDR_SPACE(3, ADDR_SPACE_LOW, 1 ),\r
+ [0].sectAddr[4] = 0x00010000, /* 4, B0F4, LOW */\r
+ [0].addrSpace[4] = ADDR_SPACE(4, ADDR_SPACE_LOW, 2 ),\r
+ [0].sectAddr[5] = 0x00014000, /* 5, B0F5, LOW */\r
+ [0].addrSpace[5] = ADDR_SPACE(5, ADDR_SPACE_LOW, 2 ),\r
+ [0].sectAddr[6] = 0x00018000, /* 6, B0F6, LOW */\r
+ [0].addrSpace[6] = ADDR_SPACE(6, ADDR_SPACE_LOW, 2 ),\r
+ [0].sectAddr[7] = 0x0001c000, /* 7, B0F7, LOW */\r
+ [0].addrSpace[7] = ADDR_SPACE(7, ADDR_SPACE_LOW, 2 ),\r
+ [0].sectAddr[8] = 0x00020000, /* 8, B0F8, LOW */\r
+ [0].addrSpace[8] = ADDR_SPACE(8, ADDR_SPACE_LOW, 3 ),\r
+ [0].sectAddr[9] = 0x00030000, /* 9, B0F9, LOW */\r
+ [0].addrSpace[9] = ADDR_SPACE(9, ADDR_SPACE_LOW, 3 ),\r
+\r
+ /* MID */\r
+ [0].sectAddr[10] = 0x00040000, /* 0, B0F10, MID */\r
+ [0].addrSpace[10] = ADDR_SPACE(0, ADDR_SPACE_MID, 4 ),\r
+ [0].sectAddr[11] = 0x00060000, /* 1, B0F11, MID */\r
+ [0].addrSpace[11] = ADDR_SPACE(1, ADDR_SPACE_MID, 4 ),\r
+\r
+ /* HIGH */\r
+ [0].sectAddr[12] = 0x00080000, /* 0, B0F12, HIGH */\r
+ [0].addrSpace[12] = ADDR_SPACE(0, ADDR_SPACE_HIGH, 5 ),\r
+ [0].sectAddr[13] = 0x000a0000, /* 1, B0F13, HIGH */\r
+ [0].addrSpace[13] = ADDR_SPACE(1, ADDR_SPACE_HIGH, 5 ),\r
+ [0].sectAddr[14] = 0x000c0000, /* 2, B0F14, HIGH */\r
+ [0].addrSpace[14] = ADDR_SPACE(2, ADDR_SPACE_HIGH, 6 ),\r
+ [0].sectAddr[15] = 0x000e0000, /* 3, B0F15, HIGH */\r
+ [0].addrSpace[15] = ADDR_SPACE(3, ADDR_SPACE_HIGH, 6 ),\r
+ [0].sectAddr[16] = 0x00100000, /* End, NOT a sector */\r
+};\r
+#else\r
+#error CPU NOT supported\r
+#endif\r
+\r
+\r
+const Fls_ConfigType FlsConfigSet[]=\r
+{\r
+ {\r
+#if ( FLS_AC_LOAD_ON_JOB_START == STD_ON)\r
+ .FlsAcWrite = __FLS_ERASE_RAM__,\r
+ .FlsAcErase = __FLS_WRITE_RAM__,\r
+#else\r
+ .FlsAcWrite = NULL,\r
+ .FlsAcErase = NULL,\r
+#endif\r
+ .FlsJobEndNotification = NULL,\r
+ .FlsJobErrorNotification = NULL,\r
+ .FlsInfo = flashInfo,\r
+// .FlsSectorList = &fls_evbSectorList[0],\r
+// .FlsSectorListSize = sizeof(fls_evbSectorList)/sizeof(Fls_SectorType),\r
+// .FlsBlockToPartitionMap = Fls_BlockToPartitionMap,\r
+ }\r
+};\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+/** @addtogroup Fls Flash Driver\r
+ * @{ */\r
+\r
+/** @file Fls_Cfg.h\r
+ * Definitions of configuration parameters for Flash Driver.\r
+ */\r
+\r
+\r
+\r
+#ifndef FLS_CFG_H_\r
+#define FLS_CFG_H_\r
+\r
+#define USE_FLS_INFO STD_ON\r
+\r
+\r
+/* STD container : Fls\r
+ * FlsConfigSet 1..*\r
+ * FlsGeneral 1\r
+ * FlsPublishedInformation 1\r
+ */\r
+\r
+#include "MemIf_Types.h"\r
+\r
+/* FlsGeneral, 3.0 OK */\r
+#define FLS_VARIANT_PB STD_OFF\r
+#define FLS_AC_LOAD_ON_JOB_START STD_OFF /* NO SUPPORT */\r
+#define FLS_BASE_ADDRESS 0x00000000\r
+#define FLS_CANCEL_API STD_OFF /* NO SUPPORT */\r
+#define FLS_COMPARE_API STD_ON\r
+#define FLS_DEV_ERROR_DETECT STD_ON\r
+#define FLS_DRIVER_INDEX 0 /* NO SUPPORT */\r
+#define FLS_GET_JOB_RESULT_API STD_ON\r
+#define FLS_GET_STATUS_API STD_ON\r
+#define FLS_SET_MODE_API STD_OFF /* NO SUPPORT */\r
+//#define FLS_TOTAL_SIZE\r
+#define FLS_USE_INTERRUPTS STD_OFF /* NO SUPPORT */\r
+#define FLS_VERSION_INFO_API STD_ON\r
+\r
+/* FlsPublishedInformation, 3.0 OK */\r
+#define FLS_AC_LOCATION_ERASE 0 /* NO SUPPORT */\r
+#define FLS_AC_LOCATION_WRITE 0 /* NO SUPPORT */\r
+#define FLS_AC_SIZE_ERASE 0 /* NO SUPPORT */\r
+#define FLS_AC_SIZE_WRITE 0 /* NO SUPPORT */\r
+#define FLS_ERASE_TIME 0 /* NO SUPPORT */\r
+#define FLS_ERASED_VALUE 0xff /* NO SUPPORT */\r
+#define FLS_EXPECTED_HW_ID 0 /* NO SUPPORT */\r
+#define FLS_SPECIFIED_ERASE_CYCLES 0 /* NO SUPPORT */\r
+#define FLS_WRITE_TIME 0 /* NO SUPPORT */\r
+\r
+/* MCU Specific */\r
+#if defined(CFG_MPC5606S)\r
+\r
+#define FLASH_BANK_CNT 3\r
+#define FLASH_PAGE_SIZE 8\r
+#define FLASH_MAX_SECTORS 15\r
+#define FLS_TOTAL_SIZE (48*1024)\r
+\r
+#elif defined(CFG_MPC5668G)\r
+\r
+#define FLASH_BANK_CNT 1\r
+#define FLASH_PAGE_SIZE 8\r
+#define FLASH_MAX_SECTORS 19\r
+#define FLS_TOTAL_SIZE (2*1024*1024)\r
+\r
+#elif defined(CFG_MPC5516)\r
+\r
+#define FLASH_BANK_CNT 1\r
+#define FLASH_PAGE_SIZE 8\r
+#define FLASH_MAX_SECTORS 16\r
+#define FLS_TOTAL_SIZE (1*1024*1024)\r
+\r
+#else\r
+#error CPU not supported\r
+#endif\r
+\r
+#if (USE_FLS_INFO==STD_ON)\r
+\r
+typedef struct Flash {\r
+ uint32_t size;\r
+ uint32_t sectCnt;\r
+ uint32_t bankSize;\r
+ uint32_t regBase;\r
+ uint32_t sectAddr[FLASH_MAX_SECTORS+1];\r
+ uint16_t addrSpace[FLASH_MAX_SECTORS+1];\r
+} FlashType;\r
+\r
+\r
+#else\r
+typedef struct {\r
+ Fls_LengthType FlsNumberOfSectors;\r
+ Fls_LengthType FlsPageSize;\r
+ Fls_LengthType FlsSectorSize;\r
+ Fls_AddressType FlsSectorStartaddress;\r
+} Fls_SectorType;\r
+#endif\r
+\r
+\r
+struct Flash;\r
+\r
+typedef struct {\r
+ void (*FlsAcErase)(); /* NO SUPPORT */\r
+ void (*FlsAcWrite)(); /* NO SUPPORT */\r
+ // FlsCallCycle N/A in core.\r
+ void (*FlsJobEndNotification)();\r
+ void (*FlsJobErrorNotification)();\r
+ uint32_t FlsMaxReadFastMode; /* NO SUPPORT */\r
+ uint32_t FlsMaxReadNormalMode; /* NO SUPPORT */\r
+ uint32_t FlsMaxWriteFastMode; /* NO SUPPORT */\r
+ uint32_t FlsMaxWriteNormalMode; /* NO SUPPORT */\r
+ uint32_t FlsProtection; /* NO SUPPORT */\r
+#if (USE_FLS_INFO==STD_ON)\r
+ const struct Flash *FlsInfo;\r
+#else\r
+ const Fls_SectorType *FlsSectorList;\r
+#endif\r
+// const uint32 FlsSectorListSize; /* NO SUPPORT */\r
+} Fls_ConfigSetType;\r
+\r
+typedef Fls_ConfigSetType Fls_ConfigType;\r
+\r
+extern const Fls_ConfigSetType FlsConfigSet[];\r
+\r
+#endif /*FLS_CFG_H_*/\r
+/** @} */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+
+
+
+
+
+
+#include "Fls.h"\r
+#include <stdlib.h>\r
+\r
+\r
+#define KB *1024\r
+\r
+\r
+const Fls_SectorType fls_SST25xx_SectorList[] = {\r
+ { // L0->L7\r
+ .FlsSectorStartaddress = (Fls_AddressType)0x00000000, // Start address of this sector\r
+ .FlsPageSize = (Fls_LengthType)1, // Read page size of 128 bits (4 words), (8 bytes)\r
+ .FlsSectorSize = (Fls_LengthType)(4 KB), // 16Kbyte\r
+ // Number of continuous sectors with the above characteristics.\r
+ .FlsNumberOfSectors = (uint32)512,// L0->L7 , 8 sectors\r
+ },\r
+};\r
+\r
+// Partitions start at 1\r
+// uint8 Fls_BlockToPartitionMap[] = { 1,1,1,1,2,2,2,2,3,3,4,4,5,5,6,6,7,7,8,8 };\r
+\r
+const Fls_ConfigType FlsSST25xxConfigSet[]=\r
+{\r
+ {\r
+#if 0\r
+#if ( FLS_AC_LOAD_ON_JOB_START == STD_ON)\r
+ .FlsAcWrite = __FLS_ERASE_RAM__,\r
+ .FlsAcErase = __FLS_WRITE_RAM__,\r
+#else\r
+ .FlsAcWrite = NULL,\r
+ .FlsAcErase = NULL,\r
+#endif\r
+#endif\r
+ .FlsMaxReadFastMode = 64,\r
+ .FlsMaxReadNormalMode = 1,\r
+ .FlsMaxWriteFastMode = 1,\r
+ .FlsMaxWriteNormalMode = 1,\r
+\r
+ .FlsJobEndNotification = NULL,\r
+ .FlsJobErrorNotification = NULL,\r
+\r
+ .FlsSectorList = &fls_SST25xx_SectorList[0],\r
+ .FlsSectorListSize = sizeof(fls_SST25xx_SectorList)/sizeof(Fls_SectorType),\r
+#if 0\r
+ .FlsBlockToPartitionMap = Fls_BlockToPartitionMap,\r
+#endif\r
+ }\r
+};\r
+\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+
+
+
+
+
+
+\r
+#ifndef FLS_SST25XX_CFG_H_\r
+#define FLS_SST25XX_CFG_H_\r
+\r
+// Take in the original types\r
+\r
+\r
+#include "Fls_Cfg.h"\r
+\r
+\r
+extern const Fls_ConfigType FlsSST25xxConfigSet[];\r
+/*\r
+ * Fls General container\r
+ */\r
+\r
+// The flash driver shall load the flash access code to RAM whenever an\r
+// erase or write job is started and unload (overwrite) it after that job has\r
+// been finished or canceled. true: Flash access code loaded on job start /\r
+// unloaded on job end or error. false: Flash access code not loaded to /\r
+// unloaded from RAM at all.\r
+#define FLS_SST25XX_AC_LOAD_ON_JOB_START STD_OFF\r
+\r
+// The flash memory start address (see also FLS118).\r
+// FLS169: This parameter defines the lower boundary for read / write /\r
+// erase and compare jobs.\r
+#define FLS_SST25XX_BASE_ADDRESS 0x00000000\r
+\r
+// Compile switch to enable and disable the Fls_Cancel function. true: API\r
+// supported / function provided. false: API not supported / function not pro-\r
+// vided\r
+#define FLS_SST25XX_CANCEL_API STD_OFF\r
+\r
+// Compile switch to enable and disable the Fls_Compare function. true: API\r
+// supported / function provided. false: API not supported / function not pro-\r
+// vided\r
+#define FLS_SST25XX_COMPARE_API STD_ON\r
+\r
+// Pre-processor switch for enabling the development error detection and\r
+// reporting (see FLS077).\r
+\r
+#define FLS_SST25XX_DEV_ERROR_DETECT STD_ON\r
+\r
+// Index of the driver, used by FEE.\r
+#define FLS_SST25XX_DRIVER_INDEX 100\r
+\r
+// Compile switch to enable and disable the Fls_GetJobResult function. true:\r
+// API supported / function provided. false: API not supported / function not\r
+// provided\r
+#define FLS_SST25XX_GET_JOB_RESULT_API STD_OFF\r
+\r
+// Compile switch to enable and disable the Fls_GetStatus function. true: API\r
+// supported / function provided. false: API not supported / function not pro-\r
+// vided\r
+#define FLS_SST25XX_GET_STATUS_API STD_ON\r
+\r
+// Compile switch to enable and disable the Fls_SetMode function. true: API\r
+// supported / function provided. false: API not supported / function not pro-\r
+// vided\r
+#define FLS_SST25XX_SET_MODE_API STD_ON\r
+\r
+// The total amount of flash memory in bytes (see also FLS118).\r
+// FLS170: This parameter in conjunction with FLS_SST25XX_BASE_ADDRESS\r
+// defines the upper boundary for read / write / erase and compare jobs\r
+#define FLS_SST25XX_TOTAL_SIZE 0x200000 // 16Mbit->2Mb, 0x0000_0000 to 0x0020_0000\r
+#if 0\r
+#define FLS_SST25XX_READ_PAGE_SIZE 0x8 // Read page size of 128 bits (4 words) (8 bytes)\r
+#endif\r
+\r
+// Job processing triggered by hardware interrupt.\r
+// true: Job processing triggered by interrupt (hardware controlled).\r
+// false: Job processing not triggered by interrupt (software controlled)\r
+\r
+// NOT supported by Freescale hardware\r
+#define FLS_SST25XX_USE_INTERRUPTS STD_OFF\r
+\r
+#define FLS_SST25XX_VERSION_INFO_API STD_ON\r
+\r
+\r
+#endif /* FLS_SST25XX_CFG_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+#warning "This default file may only be used as an example!"\r
+\r
+#include "Fls.h"\r
+#include <stdlib.h>\r
+\r
+\r
+#define KB *1024\r
+\r
+\r
+const Fls_SectorType fls_evbSectorList[] = {\r
+ { // B0F0\r
+ .FlsSectorStartaddress = (Fls_AddressType)0x00000000, // Start address of this sector\r
+ .FlsPageSize = (Fls_LengthType)8, // Read page size of 128 bits (4 words), (8 bytes)\r
+ .FlsSectorSize = (Fls_LengthType)(32 KB), // 32Kbyte\r
+ // Number of continuous sectors with the above characteristics.\r
+ .FlsNumberOfSectors = (uint32)1,// B0F0 , 1 sectors\r
+ },\r
+ { // B0F1, B0F2\r
+ .FlsSectorStartaddress = (Fls_AddressType)0x00008000,\r
+ .FlsPageSize = (Fls_LengthType)8, // Read page size of 128 bits (4 words), (8 bytes)\r
+ .FlsSectorSize = (Fls_LengthType)(16 KB), // 16Kbyte\r
+ .FlsNumberOfSectors = (uint32)2,// B0F1, B0F2, 2 sectors\r
+ },\r
+ { // B0F3, B0F4\r
+ .FlsSectorStartaddress = (Fls_AddressType)0x00010000,\r
+ .FlsPageSize = (Fls_LengthType)8, // Read page size of 128 bits (4 words), (8 bytes)\r
+ .FlsSectorSize = (Fls_LengthType)(32 KB), // 32Kbyte\r
+ .FlsNumberOfSectors = (uint32)2,// B0F3, B0F4, 2 sectors\r
+ },\r
+ { // B0F5, B0F6, B0F7\r
+ .FlsSectorStartaddress = (Fls_AddressType)0x00020000,\r
+ .FlsPageSize = (Fls_LengthType)8, // Read page size of 128 bits (4 words), (8 bytes)\r
+ .FlsSectorSize = (Fls_LengthType)(128 KB), // 128Kbyte\r
+ .FlsNumberOfSectors = (uint32)3,// B0F5, B0F6, B0F7, 3 sectors\r
+ },\r
+ { // B2F0, B2F1, B2F2, B2F3\r
+ .FlsSectorStartaddress = (Fls_AddressType)0x00080000,\r
+ .FlsPageSize = (Fls_LengthType)8, // Read page size of 128 bits (4 words), (8 bytes)\r
+ .FlsSectorSize = (Fls_LengthType)(128 KB), // 128Kbyte\r
+ .FlsNumberOfSectors = (uint32)4,// B2F0, B2F1, B2F2, B2F3, 4 sectors\r
+ },\r
+ { // B1F0, B1F1, B1F2, B1F3\r
+ .FlsSectorStartaddress = (Fls_AddressType)0x00800000,\r
+ .FlsPageSize = (Fls_LengthType)8, // Read page size of 128 bits (4 words), (8 bytes)\r
+ .FlsSectorSize = (Fls_LengthType)(16 KB), // 16Kbyte\r
+ .FlsNumberOfSectors = (uint32)4,// B1F0, B1F1, B1F2, B1F3, 4 sectors\r
+ },\r
+\r
+};\r
+\r
+/*\r
+ * Block to partition map\r
+ */\r
+uint8 Fls_BlockToPartitionMap[] = { 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 };\r
+\r
+const Fls_ConfigType FlsConfigSet[]=\r
+{\r
+ {\r
+#if ( FLS_AC_LOAD_ON_JOB_START == STD_ON)\r
+ .FlsAcWrite = __FLS_ERASE_RAM__,\r
+ .FlsAcErase = __FLS_WRITE_RAM__,\r
+#else\r
+ .FlsAcWrite = NULL,\r
+ .FlsAcErase = NULL,\r
+#endif\r
+ .FlsJobEndNotification = NULL,\r
+ .FlsJobErrorNotification = NULL,\r
+\r
+ .FlsSectorList = &fls_evbSectorList[0],\r
+ .FlsSectorListSize = sizeof(fls_evbSectorList)/sizeof(Fls_SectorType),\r
+ .FlsBlockToPartitionMap = Fls_BlockToPartitionMap,\r
+ }\r
+};\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+/** @addtogroup Fls Flash Driver\r
+ * @{ */\r
+\r
+/** @file Fls_Cfg.h\r
+ * Definitions of configuration parameters for Flash Driver.\r
+ */\r
+\r
+#warning "This default file may only be used as an example!"\r
+\r
+#ifndef FLS_CFG_H_\r
+#define FLS_CFG_H_\r
+\r
+#include "MemIf_Types.h"\r
+\r
+\r
+/** Indicate that we are building Post Build, NOT Pre-Compile */\r
+#define FLS_VARIANT_PB STD_ON\r
+\r
+/*\r
+ * Fls General container\r
+ */\r
+/** The flash driver shall load the flash access code to RAM whenever an\r
+ * erase or write job is started and unload (overwrite) it after that job has\r
+ * been finished or canceled. true: Flash access code loaded on job start /\r
+ * unloaded on job end or error. false: Flash access code not loaded to /\r
+ * unloaded from RAM at all. */\r
+#define FLS_AC_LOAD_ON_JOB_START STD_OFF\r
+\r
+/** The flash memory start address (see also FLS118).\r
+ * FLS169: This parameter defines the lower boundary for read / write /\r
+ * erase and compare jobs. */\r
+#define FLS_BASE_ADDRESS 0x00000000\r
+\r
+/** Compile switch to enable and disable the Fls_Cancel function. true: API\r
+ * supported / function provided. false: API not supported / function not pro-\r
+ * vided */\r
+#define FLS_CANCEL_API STD_OFF\r
+\r
+/** Compile switch to enable and disable the Fls_Compare function. true: API\r
+ * supported / function provided. false: API not supported / function not pro-\r
+ * vided */\r
+#define FLS_COMPARE_API STD_ON\r
+\r
+/** Pre-processor switch for enabling the development error detection and\r
+ * reporting (see FLS077). */\r
+#define FLS_DEV_ERROR_DETECT STD_ON\r
+\r
+/** Index of the driver, used by FEE. */\r
+#define FLS_DRIVER_INDEX 100\r
+\r
+/** Compile switch to enable and disable the Fls_GetJobResult function. true:\r
+ * API supported / function provided. false: API not supported / function not\r
+ * provided */\r
+#define FLS_GET_JOB_RESULT_API STD_ON\r
+\r
+/** Compile switch to enable and disable the Fls_GetStatus function. true: API\r
+ * supported / function provided. false: API not supported / function not pro-\r
+ * vided */\r
+#define FLS_GET_STATUS_API STD_ON\r
+\r
+/** Compile switch to enable and disable the Fls_SetMode function. true: API\r
+ * supported / function provided. false: API not supported / function not pro-\r
+ * vided */\r
+#define FLS_SET_MODE_API STD_OFF\r
+\r
+/** The total amount of flash memory in bytes (see also FLS118).\r
+ * FLS170: This parameter in conjunction with FLS_BASE_ADDRESS\r
+ * defines the upper boundary for read / write / erase and compare jobs */\r
+#define FLS_TOTAL_SIZE 0x810000\r
+/** Read page size of 128 bits (4 words) (8 bytes) */\r
+#define FLS_READ_PAGE_SIZE 0x8\r
+\r
+\r
+// Job processing triggered by hardware interrupt. true: Job processing rig-\r
+// gered by interrupt (hardware controlled). false: Job processing not trig-\r
+// gered by interrupt (software controlled)\r
+\r
+/** NOT supported by Freescale hardware */\r
+#define FLS_USE_INTERRUPTS STD_OFF\r
+\r
+#define FLS_VERSION_INFO_API STD_ON\r
+\r
+\r
+#if ( FLS_AC_LOAD_ON_JOB_START == STD_ON )\r
+/* Sections that are provided by linker */\r
+extern void __FLS_ERASE_RAM__(void);\r
+extern void __FLS_WRITE_RAM__(void);\r
+extern void __FLS_ERASE_ROM__(void);\r
+extern void __FLS_WRITE_ROM__(void);\r
+extern char __FLS_SIZE__;\r
+#endif\r
+\r
+/** Configuration description of a flashable sector */\r
+typedef struct {\r
+ /** Number of continuous sectors with the above characteristics. */\r
+ Fls_LengthType FlsNumberOfSectors;\r
+\r
+ /** Size of one page of this sector. Implementation Type: Fls_LengthType. */\r
+ Fls_LengthType FlsPageSize;\r
+\r
+ /** Size of this sector. Implementation Type: Fls_LengthTyp */\r
+ Fls_LengthType FlsSectorSize;\r
+\r
+ /** Start address of this sector */\r
+ Fls_AddressType FlsSectorStartaddress;\r
+\r
+} Fls_SectorType;\r
+\r
+\r
+/** Container for runtime configuration parameters of the flash driver.\r
+ * Implementation Type: Fls_ConfigType. */\r
+typedef struct {\r
+ /** Address offset in RAM to which the erase flash access code shall be\r
+ * loaded. Used as function pointer to access the erase flash access code. */\r
+ void (*FlsAcErase)();\r
+\r
+ /** Address offset in RAM to which the write flash access code shall be\r
+ * loaded. Used as function pointer to access the write flash access code. */\r
+ void (*FlsAcWrite)();\r
+//#if 0\r
+// // Cycle time of calls of the flash driver's main function.\r
+// float FlsCallCycle;\r
+//#endif\r
+ /** Mapped to the job end notification routine provided by some upper layer\r
+ * module, typically the Fee module. */\r
+ void (*FlsJobEndNotification)();\r
+\r
+ /** Mapped to the job error notification routine provided by some upper layer\r
+ * module, typically the Fee module. */\r
+ void (*FlsJobErrorNotification)();\r
+\r
+ /** The maximum number of bytes to read or compare in one cycle of the\r
+ * flash driver's job processing function in fast mode. */\r
+ uint32 FlsMaxReadFastMode;\r
+\r
+ /** The maximum number of bytes to read or compare in one cycle of the\r
+ * flash driver's job processing function in normal mode. */\r
+ uint32 FlsMaxReadNormalMode;\r
+\r
+ /** The maximum number of bytes to write in one cycle of the flash driver's job\r
+ * processing function in fast mode. */\r
+ uint32 FlsMaxWriteFastMode;\r
+\r
+ /** The maximum number of bytes to write in one cycle of the flash driver's job\r
+ * processing function in normal mode. */\r
+ uint32 FlsMaxWriteNormalMode;\r
+\r
+ /** Erase/write protection settings. Only relevant if supported by hardware. */\r
+ uint32 FlsProtection;\r
+\r
+ /** List of flash:able sectors and pages */\r
+ const Fls_SectorType *FlsSectorList;\r
+\r
+ /** Size of List of the FlsSectorList */\r
+ const uint32 FlsSectorListSize;\r
+\r
+ uint8 *FlsBlockToPartitionMap;\r
+\r
+\r
+} Fls_ConfigType;\r
+\r
+\r
+extern const Fls_ConfigType FlsConfigSet[];\r
+\r
+#if 0\r
+/** N/A since PPC have PIC */\r
+#define FLS_AC_LOCATION_ERASE\r
+#define FLS_AC_LOCATION_WRITE\r
+/** N/A since we have internal flash */\r
+#define FLS_EXPECTED_HW_ID\r
+#endif\r
+\r
+#define FLS_AC_SIZE_ERASE (__FLS_WRITE_ROM__ - __FLS_ERASE_ROM__)\r
+#define FLS_AC_SIZE_WRITE (__FLS_END_ROM__ - __FLS_ERASE_ROM__)\r
+#define FLS_ERASED_VALUE 0xff\r
+\r
+#define FLS_SPECIFIED_ERASE_CYCLES 0 /* TODO */\r
+#define FLS_WRITE_TIME 0 /* TODO */\r
+\r
+\r
+#endif /*FLS_CFG_H_*/\r
+/** @} */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Copyright (C) 2009-2011 ArcCore AB <contact@arccore.com>
+ * Licensed under ArcCore Embedded Software License Agreement.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+/*
+ * flash.h
+ *
+ * Created on: 29 aug 2011
+ * Author: mahi
+ */
+
+#ifndef FLASH_H_
+#define FLASH_H_
+
+#include "flash_ll_h7f_c90.h"
+
+#define FLASH_OP_LOCK 0
+#define FLASH_OP_UNLOCK 1
+#define FLASH_OP_MASK 1
+
+#define ADDR_SPACE_CNT 3
+#define ADDR_SPACE_LOW 0
+#define ADDR_SPACE_MID 1
+#define ADDR_SPACE_HIGH 2
+#define ADDR_SPACE_GET(_x) (((_x)>>8)&3)
+#define ADDR_SPACE_SET(_x) (((_x)&3)<<8)
+#define ADDR_SPACE_GET_SECTOR(_x) ((_x) & 0xff )
+#define ADDR_SPACE_GET_PART(_x) (((_x)>>10)&3)
+#define ADDR_SPACE_SET_PART(_x) (((_x)&3)<<10)
+
+#define ADDR_SPACE(_sector,_space,_partition) \
+ ( ADDR_SPACE_SET_PART(_partition) | \
+ ADDR_SPACE_SET(_space ) | (_sector) )
+
+struct Flash;
+
+typedef void (*flashCbType)( void );
+
+void Flash_Init( void );
+uint32_t Flash_Lock(const struct Flash *fPtr, uint32_t op, uintptr_t from, uint32_t size);
+uint32_t Flash_Erase(const struct Flash *fPtr, uintptr_t dest, uint32_t size, flashCbType sb);
+//uint32_t Flash_Program(const struct Flash *fPtr, uintptr_t to, uintptr_t from,uint32_t size, flashCbType sb);
+uint32_t Flash_ProgramPageStart(const struct Flash *fPtr, uint32_t *to, uint32_t *from,uint32_t *size, flashCbType sb);
+uint32_t Flash_CheckStatus( const struct Flash *fPtr );
+uint32_t Flash_SectorAligned( const struct Flash *fPtr, uintptr_t addr );
+
+#endif /* FLASH_H_ */
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Copyright (C) 2009-2011 ArcCore AB <contact@arccore.com>
+ * Licensed under ArcCore Embedded Software License Agreement.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+#ifndef IO_H_
+#define IO_H_
+
+#define WRITE8(address, value) (*(uint8_t*)(address) = (value))
+#define READ8(address) ((uint8_t)(*(uint8_t*)(address)))
+
+#define WRITE16(address, value) (*(vuint16_t*)(address) = (value))
+#define READ16(address) ((uint16_t)(*(vuint16_t*)(address)))
+
+#define WRITE32(address, value) (*(vuint32_t*)(address) = (value))
+#define READ32(address) ((uint32_t)(*(vuint32_t*)(address)))
+
+#define WRITE64(address, value) (*(vuint64_t*)(address) = (value))
+#define READ64(address) ((uint64_t)(*(vuint64_t*)(address)))
+
+
+#endif /* IO_H_ */
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