}\r
\r
\r
+//lint -esym(904, Com_TriggerIPduSend) //PC-Lint Exception of rule 14.7\r
void Com_TriggerIPduSend(PduIdType ComTxPduId) {\r
PDU_ID_CHECK(ComTxPduId, 0x17);\r
\r
}\r
}\r
\r
+//lint -esym(904, Com_RxIndication) //PC-Lint Exception of rule 14.7\r
void Com_RxIndication(PduIdType ComRxPduId, const uint8* SduPtr) {\r
PDU_ID_CHECK(ComRxPduId, 0x14, E_NOT_OK);\r
\r
pduBufferBytes_swap[i] = pduBufferBytes[7 - i];\r
}\r
startBitOffset = intelBitNrToPduOffset(bitPosition, bitSize, 64);\r
- //lint -save -esym(960,12.5) PC-Lint Exception: OK. PC-Lint misunderstands MISRA rule 12.5.\r
+ //lint -save -esym(960,12.5) PC-Lint Exception: OK. PC-Lint Wrong interpretation of MISRA rule 12.5.\r
Com_ReadDataSegment(\r
signalDataBytes, pduBufferBytes_swap, destSize,\r
startBitOffset, bitSize,\r
do {\r
shiftReg = *(signalDataPtr - signalByteNr) & 0x00FFu;\r
clearReg = 0x00FF;\r
+ //lint -save -e701 -e734 //PC-Lint Wrong interpretation of MISRA rule 10.5.\r
shiftReg <<= pduAlignmentShift;\r
clearReg <<= pduAlignmentShift;\r
+ //lint -restore\r
if (pduByteNr == pduByteLength) {\r
shiftReg &= pduStartByteMask;\r
clearReg &= pduStartByteMask;\r
&& (pduByteNr <= pduByteLength) ) {\r
shiftReg = *(signalDataPtr - signalByteNr) & 0x00FFu;\r
clearReg = 0x00FF;\r
+ //lint -save -e701 -e734 //PC-Lint Wrong interpretation of MISRA rule 10.5.\r
shiftReg <<= pduAlignmentShift;\r
clearReg <<= pduAlignmentShift;\r
shiftReg >>= 8;\r
clearReg >>= 8;\r
+ //lint -restore\r
if (pduByteNr == pduByteLength) {\r
shiftReg &= pduStartByteMask;\r
clearReg &= pduStartByteMask;\r