PPC: Sleep mode and wakeup pin now working

[arc.git] / include / ppc / asm_ppc.h

diff --git a/include/ppc/asm_ppc.h b/include/ppc/asm_ppc.h
index 0cba2d8ee46ab651bf1ba788c45a242d3f786c91..cd434b788c2f943de1085458288efa711291685b 100644 (file)
--- a/include/ppc/asm_ppc.h
+++ b/include/ppc/asm_ppc.h
@@ -60,6 +60,14 @@
 #define SPR_SPEFSCR            512\r
 #define SPR_MCSR               572\r
 \r
+#define SPR_MAS0      624\r
+#define SPR_MAS1      625\r
+#define SPR_MAS2      626\r
+#define SPR_MAS3      627\r
+#define SPR_MAS4      628\r
+#define SPR_MAS6      630\r
+\r
+\r
 #define ESR_PTR                (1<<(38-32))\r
 \r
 #define SPR_XER                1\r
@@ -67,6 +75,34 @@
 \r
 #define INTC_SSCIR7 0xFFF48027\r
 \r
+/* MAS bits */\r
+#define MAS1_TSIZE_4K                  (1<<8)\r
+#define MAS1_TSIZE_16K                 (2<<8)\r
+#define MAS1_TSIZE_64K                 (3<<8)\r
+#define MAS1_TSIZE_256K                        (4<<8)\r
+#define MAS1_TSIZE_1M                  (5<<8)\r
+#define MAS1_TSIZE_4M                  (6<<8)\r
+#define MAS1_TSIZE_16M                 (7<<8)\r
+#define MAS1_TSIZE_64M                 (8<<8)\r
+#define MAS1_TSIZE_256M                        (8<<9)\r
+\r
+#define MAS2_VLE       (1<<5)\r
+#define MAS2_W         (1<<4)\r
+#define MAS2_I         (1<<3)\r
+#define MAS2_M         (1<<2)\r
+#define MAS2_G         (1<<1)\r
+#define MAS2_E         (1<<0)\r
+\r
+#define MAS3_UX                (1<<5)\r
+#define MAS3_SX                (1<<4)\r
+#define MAS3_UW                (1<<3)\r
+#define MAS3_SW                (1<<2)\r
+#define MAS3_UR                (1<<1)\r
+#define MAS3_SR                (1<<0)\r
+\r
+#define MAS3_FULL_ACCESS (MAS3_UX+MAS3_UW+MAS3_UR+MAS3_SX+MAS3_SW+MAS3_SR)\r
+\r
+\r
 #if defined(_ASSEMBLER_)\r
 /*\r
  * PPC vs VLE assembler:\r
@@ -79,11 +115,11 @@
 \r
 #if defined(CFG_VLE)\r
 #define LOAD_IND_32( reg, addr) \\r
-       lis    reg, addr@ha;     \\r
-    lwz    reg, addr@l(reg)\r
+       e_lis    reg, addr@ha;     \\r
+    e_lwz    reg, addr@l(reg)\r
 \r
 #define LOAD_ADDR_32(reg, addr ) \\r
-    e_add2is   reg, addr@ha; \\r
+    e_lis       reg, addr@ha; \\r
     e_add16i    reg, reg, addr@l\r
 \r
 #else\r
@@ -140,11 +176,14 @@
 #define lis            e_lis\r
 #define li             e_li\r
 #define lwz        e_lwz\r
+#define lbz            e_lbz\r
 #define lbzu   e_lbzu\r
 #define stwu   e_stwu\r
 #define stw            e_stw\r
+#define stb            e_stb\r
 #define stbu   e_stbu\r
 #define b              e_b\r
+#define bne            e_bne\r
 //#define addi e_addi          /* true ?*/\r
 #define addi   e_add16i                /* true ?*/\r
 //#define addis        e_add16i\r
@@ -153,6 +192,7 @@
 #define rfi            se_rfi\r
 #define stb            e_stb\r
 #define cmplwi e_cmpl16i\r
+#define cmpwi  se_cmpi\r
 #define ori            e_ori\r
 #define beq            e_beq\r
 //#define bne-         e_bne-\r
@@ -163,6 +203,8 @@
 #define stmw   e_stmw\r
 #define bdnz   e_bdnz\r
 #define        bl              e_bl\r
+#define        bc              e_bc\r
+#define mr             se_mr\r
 #endif\r
 \r
 #endif /* _ASSEMBLER_ */\r