\r
#define PORT_NOT_CONFIGURED 0x00000000\r
\r
-#define PORT_0_BASE ((Port_RegisterType *)0xFFF7BC30)\r
-#define PORT_1_BASE ((Port_RegisterType *)0xFFF7BC50)\r
-#define PORT_2_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_0_BASE ((Port_RegisterType *)0xFFF7BC30) // GIO Emulation B register\r
+#define PORT_1_BASE ((Port_RegisterType *)0xFFF7BC50) // GIO Pull Select Register A ??\r
+#define PORT_2_BASE ((Port_RegisterType *)0xFFF7B848) // N2HET1\r
#define PORT_3_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
#define PORT_4_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
#define PORT_5_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
#define PORT_6_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
#define PORT_7_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
-#define PORT_8_BASE ((Port_RegisterType *)0xFFF7DDE0)\r
-#define PORT_9_BASE ((Port_RegisterType *)0xFFF7DFE0)\r
-#define PORT_10_BASE ((Port_RegisterType *)0xFFF7E1E0)\r
+#define PORT_8_BASE ((Port_RegisterType *)0xFFF7DDE0) // DCAN1 TX IO Control Register\r
+#define PORT_9_BASE ((Port_RegisterType *)0xFFF7DFE0) // DCAN2 TX IO Control Register\r
+#define PORT_10_BASE ((Port_RegisterType *)0xFFF7E1E0) // DCAN3 TX IO Control Register\r
#define PORT_NUMBER_OF_PORTS 11\r
\r
static Port_RegisterType * const Port_Base[] =\r
static Port_StateType _portState = PORT_UNINITIALIZED;\r
static const Port_ConfigType * _configPtr = &PortConfigData;\r
\r
-#if (PORT_DEV_ERROR_DETECT)\r
+#if PORT_DEV_ERROR_DETECT == STD_ON\r
#define VALIDATE_PARAM_CONFIG(_ptr,_api) \\r
if( (_ptr)==((void *)0) ) { \\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_CONFIG ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#define VALIDATE_STATE_INIT(_api)\\r
if(PORT_INITIALIZED!=_portState){\\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_UNINIT ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#define VALIDATE_PARAM_PIN(_pin, _api)\\r
if(GET_PIN_PORT(_pin) >= PORT_NUMBER_OF_PORTS || Port_Base[GET_PIN_PORT(_pin)] == PORT_NOT_CONFIGURED || GET_PIN_PIN(_pin) > 7 ){\\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_PIN ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#else\r
};\r
#endif\r
\r
-void Port_Init(const Port_ConfigType *configType) {\r
- VALIDATE_PARAM_CONFIG(configType, PORT_INIT_ID);\r
+void Port_RefreshPin(uint16 pinNumber) {\r
+ uint8 port = GET_PIN_PORT(_configPtr->pins[pinNumber].pin);\r
+ uint32 mask = GET_PIN_MASK(_configPtr->pins[pinNumber].pin);\r
+ uint16 conf = _configPtr->pins[pinNumber].conf;\r
\r
- // Bring GIO register out of reset.\r
- gioREG->GCR0 = 1;\r
+ if (conf & PORT_FUNC) {\r
+ // Don't do anything, let each driver configure???\r
+ return;\r
+ }\r
\r
- for (uint16 i = 0; i < PORT_NUMBER_OF_PINS; i++) {\r
- uint8 port = GET_PIN_PORT(configType->pins[i].pin);\r
- uint32 mask = GET_PIN_MASK(configType->pins[i].pin);\r
- uint16 conf = configType->pins[i].conf;\r
+ // Set pin direction\r
+ if (conf & PORT_PIN_OUT) {\r
+ Port_Base[port]->DIR |= mask;\r
\r
- if (conf & PORT_FUNC) {\r
- // Don't do anything, let each driver configure???\r
- continue;\r
+ // Set open drain\r
+ if (conf & PORT_ODE_ENABLE) {\r
+ Port_Base[port]->PDR |= mask;\r
+ } else {\r
+ Port_Base[port]->PDR &= ~mask;\r
}\r
\r
- // Set pin direction\r
- if (conf & PORT_PIN_IN) {\r
- Port_Base[port]->DIR &= ~mask;\r
+ } else {\r
+ Port_Base[port]->DIR &= ~mask;\r
+ }\r
+\r
+ // Set pull up or down or nothing.\r
+ if (conf & PORT_PULL_NONE) {\r
+ Port_Base[port]->PULDIS |= mask;\r
+\r
+ } else {\r
+ Port_Base[port]->PULDIS &= ~mask;\r
+ if (conf & PORT_PULL_UP) {\r
+ Port_Base[port]->PSL |= mask;\r
\r
} else {\r
- Port_Base[port]->DIR |= mask;\r
-\r
- // Set open drain\r
- if (conf & PORT_ODE_ENABLE) {\r
- Port_Base[port]->PDR |= mask;\r
- } else {\r
- Port_Base[port]->PDR &= ~mask;\r
- }\r
+ Port_Base[port]->PSL &= ~mask;\r
}\r
+ }\r
+}\r
\r
- // Set pull up or down or nothing.\r
- if (conf & PORT_PULL_NONE) {\r
- Port_Base[port]->PULDIS |= mask;\r
\r
- } else {\r
- Port_Base[port]->PULDIS &= ~mask;\r
- if (conf & PORT_PULL_UP) {\r
- Port_Base[port]->PSL |= mask;\r
\r
- } else {\r
- Port_Base[port]->PSL &= ~mask;\r
- }\r
- }\r
+void Port_Init(const Port_ConfigType *configType) {\r
+ VALIDATE_PARAM_CONFIG(configType, PORT_INIT_ID);\r
+\r
+ _configPtr = (Port_ConfigType *)configType;\r
+\r
+ // Bring GIO register out of reset.\r
+ gioREG->GCR0 = 1;\r
+\r
+ /* Hack to connect N2HET1[27] (function 2) to pin A9 */\r
+ *(volatile uint32*)0xFFFFEB10 &= ~0xFF000000;\r
+ *(volatile uint32*)0xFFFFEB10 |= ~0x04000000;\r
+\r
+ for (uint16 i = 0; i < PORT_NUMBER_OF_PINS; i++) {\r
+ Port_RefreshPin(i);\r
}\r
- cleanup:return;\r
+\r
+ _portState = PORT_INITIALIZED;\r
+\r
+ return;\r
}\r
\r
#if ( PORT_SET_PIN_DIRECTION_API == STD_ON )\r
void Port_SetPinDirection( Port_PinType pin, Port_PinDirectionType direction )\r
{\r
- VALIDATE_STATE_INIT(PORT_SET_PIN_DIRECTION_ID);\r
- VALIDATE_PARAM_PIN(pin, PORT_SET_PIN_DIRECTION_ID);\r
- // TODO IMPLEMENT!\r
+ VALIDATE_STATE_INIT(PORT_SET_PIN_DIRECTION_ID);\r
+ VALIDATE_PARAM_PIN(pin, PORT_SET_PIN_DIRECTION_ID);\r
+\r
+ uint8 port = GET_PIN_PORT(pin);\r
+ uint32 mask = GET_PIN_MASK(pin);\r
+\r
+ if (direction & PORT_PIN_IN) {\r
+ Port_Base[port]->DIR |= mask;\r
\r
-cleanup:return;\r
+ } else {\r
+ Port_Base[port]->DIR &= ~mask;\r
+\r
+ }\r
+\r
+ return;\r
}\r
#endif\r
\r
void Port_RefreshPortDirection( void )\r
{\r
- // TODO IMPLEMENT!\r
+ VALIDATE_STATE_INIT(PORT_REFRESH_PORT_DIRECTION_ID);\r
+ for (uint16 i = 0; i < PORT_NUMBER_OF_PINS; i++) {\r
+ if (!(_configPtr->pins[i].conf & PORT_DIRECTION_CHANGEABLE)) {\r
+ Port_RefreshPin(i);\r
+ }\r
+ }\r
+ return;\r
}\r
\r
+\r
#if PORT_VERSION_INFO_API == STD_ON\r
void Port_GetVersionInfo(Std_VersionInfoType* versionInfo)\r
{\r
VALIDATE_STATE_INIT(PORT_GET_VERSION_INFO_ID);\r
memcpy(versionInfo, &_Port_VersionInfo, sizeof(Std_VersionInfoType));\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
\r
#if (PORT_SET_PIN_MODE_API == STD_ON)\r
void Port_SetPinMode(Port_PinType Pin, Port_PinModeType Mode) {\r
+ VALIDATE_STATE_INIT(PORT_SET_PIN_MODE_ID);\r
+ VALIDATE_PARAM_PIN(Pin, PORT_SET_PIN_MODE_ID);\r
+\r
uint8 port = GET_PIN_PORT(Pin);\r
uint8 pin = GET_PIN_PIN(Pin);\r
uint32 mask = GET_PIN_MASK(Pin);\r
-/*\r
- Port_PinType pin = Pin & 0x1F;\r
- Port_PinType port = Pin >> 8;\r
- Port_PinType mask = 1 << pin;\r
-*/\r
+\r
Port_Base[port]->FUN &= ~mask;\r
Port_Base[port]->FUN |= ((Mode & 1) << pin);\r
+ return;\r
}\r
#endif\r
projects / arc.git / blobdiff