1 /* -------------------------------- Arctic Core ------------------------------
2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
6 * This source code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by the
8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * -------------------------------- Arctic Core ------------------------------*/
22 extern TaskType Os_Arc_CreateIsr( void (*entry)(void ), uint8_t prio, const char *name );
23 extern void *Irq_VectorTable[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS];
26 static inline void Irq_Setup() {
27 vimREG->FIRQPR0 = 0x0;
28 vimREG->FIRQPR1 = 0x0;
31 void Irq_Init( void ) {
39 * @param stack_p Ptr to the current stack.
41 * The stack holds C, NVGPR, VGPR and the EXC frame.
44 #define MAX_WAIT_COUNT 1000
45 void *Irq_Entry( void *stack_p )
49 // This is the current hardware interrupt channel that we are processing.
50 volatile sint8 channel;
52 // This is the current OS-interrupt vector that we are processing.
53 volatile sint8 virtualChannel;
55 // Get the highest pending interrupt.
56 volatile uint32 c = 0;
58 channel = IrqGetCurrentInterruptSource();
60 } while (channel < 0 && c < MAX_WAIT_COUNT);
62 if (c >= MAX_WAIT_COUNT) {
63 // No interrupt is pending
67 // In most cases the OS-channel is the same as the hardware channel.
68 virtualChannel = channel;
70 // Special case for software interrupts.
72 // Get the emulated interrupt channel.
73 virtualChannel = systemREG1->SSISR1;
76 stack = (uint32_t *)stack_p;
77 struct OsPcb * pcb = (struct OsPcb *)Irq_VectorTable[virtualChannel];
78 // Save the hardware channel in the PCB, so that Os_Isr knows which interrupt channel to deactivate.
79 pcb->vector = channel;
80 stack = Os_Isr(stack, (void *)pcb);
87 * Attach an ISR type 1 to the interrupt controller.
94 void Irq_AttachIsr1( void (*entry)(void), void *int_ctrl, uint32_t vector, uint8_t prio) {
96 // TODO: Use NVIC_InitVector(vector, osPrioToCpuPio(pcb->prio)); here
100 * NVIC prio have priority 0-15, 0-highest priority.
101 * Autosar does it the other way around, 0-Lowest priority
112 static inline int osPrioToCpuPio( uint8_t prio ) {
119 * Attach a ISR type 2 to the interrupt controller.
125 void Irq_AttachIsr2(TaskType tid,void *int_ctrl,IrqType vector ) {
128 pcb = os_find_task(tid);
129 Irq_VectorTable[vector] = (void *)pcb;
130 IrqActivateChannel(vector);
132 // TOdo replace NVIC_InitVector(vector, osPrioToCpuPio(pcb->prio));
136 * Generates a soft interrupt, ie sets pending bit.
137 * This could also be implemented using ISPR regs.
141 void Irq_GenerateSoftInt( IrqType vector ) {
142 IrqActivateChannel(SSI);
143 systemREG1->SSISR1 = (0x75 << 8) | vector;
147 * Get the current priority from the interrupt controller.
151 uint8_t Irq_GetCurrentPriority( Cpu_t cpu) {
155 // SCB_ICSR contains the active vector