1 /* -------------------------------- Arctic Core ------------------------------
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2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
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4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
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6 * This source code is free software; you can redistribute it and/or modify it
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7 * under the terms of the GNU General Public License version 2 as published by the
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8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
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10 * This program is distributed in the hope that it will be useful, but
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11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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14 * -------------------------------- Arctic Core ------------------------------*/
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27 * =================================================
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28 * We have two context's large and small. Large is saved on
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29 * interrupt and small is saved for everything else.
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34 * -------------------------------
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35 * 0--1 : context indicator, 0xde - small, 0xad - large
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41 * 16-- : General regs r14--r31
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44 * 16-- : General regs r0--r31
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51 #define SPR_CSRR0 58
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52 #define SPR_CSRR1 59
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54 #define SPR_SPRG0_RW_S 272
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55 #define SPR_SPRG1_RW_S 273
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60 #define SPR_SPEFSCR 512
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61 #define SPR_MCSR 572
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63 #define SPR_MAS0 624
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64 #define SPR_MAS1 625
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65 #define SPR_MAS2 626
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66 #define SPR_MAS3 627
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67 #define SPR_MAS4 628
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68 #define SPR_MAS6 630
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71 #define ESR_PTR (1<<(38-32))
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76 #define INTC_SSCIR7 0xFFF48027
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78 #if defined(_ASSEMBLER_)
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80 * PPC vs VLE assembler:
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81 * Most PPC assembler instructions can be pre-processed to VLE assembler.
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82 * I can't find any way to load a 32-bit immediate with just search/replace (number
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83 * of operators differ for addis and e_add2is )
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84 * Thats why there are different load macros below.
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88 #if defined(CFG_VLE)
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89 #define LOAD_IND_32( reg, addr) \
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90 e_lis reg, addr@ha; \
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91 e_lwz reg, addr@l(reg)
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93 #define LOAD_ADDR_32(reg, addr ) \
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94 e_lis reg, addr@ha; \
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95 e_add16i reg, reg, addr@l
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98 #define LOAD_IND_32( reg, addr) \
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100 lwz reg, addr@l(reg)
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102 #define LOAD_ADDR_32(reg, addr ) \
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103 addis reg, 0, addr@ha; \
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104 addi reg, reg, addr@l
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146 #if defined(CFG_VLE)
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152 #define lbzu e_lbzu
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153 #define stwu e_stwu
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156 #define stbu e_stbu
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159 //#define addi e_addi /* true ?*/
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160 #define addi e_add16i /* true ?*/
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161 //#define addis e_add16i
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162 #define subi e_subi /* true ?*/
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166 #define cmplwi e_cmpl16i
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167 #define cmpwi se_cmpi
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170 //#define bne- e_bne-
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173 #define extrwi e_extrwi
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174 #define blrl se_blrl
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175 #define stmw e_stmw
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176 #define bdnz e_bdnz
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182 #endif /* _ASSEMBLER_ */
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184 #endif /*PPC_ASM_H_*/
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