1 /* -------------------------------- Arctic Core ------------------------------
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2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
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4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
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6 * This source code is free software; you can redistribute it and/or modify it
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7 * under the terms of the GNU General Public License version 2 as published by the
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8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
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10 * This program is distributed in the hope that it will be useful, but
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11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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14 * -------------------------------- Arctic Core ------------------------------*/
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18 //#include "System.h"
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19 #include "mpc55xx.h"
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20 #include "Modules.h"
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29 #define ADC_USES_DMA
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32 #if ( defined(ADC_USES_DMA) && !defined(USE_DMA) )
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33 #error Adc is configured to use Dma but the module is not enabled.
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36 #define ADC_GROUP0 0
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48 vuint32_t ADC_REG:16;
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49 vuint32_t ADC_REG_ADDR:8;
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51 }Adc_RegisterWriteType;
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63 vuint32_t MESSAGE_TAG:4;
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65 vuint32_t ADC_REG_ADDR:8;
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67 }Adc_RegisterReadType;
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77 ADC_EQADC_NBR_OF_QUEUES
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78 }Adc_eQADCQueueType;
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82 EQADC_CFIFO_STATUS_IDLE = 0,
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83 EQADC_CFIFO_STATUS_WAITINGFOR_TRIGGER = 0x2,
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84 EQADC_CFIFO_STATUS_TRIGGERED = 0x3
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85 }Adc_EQADCQueueStatusType;
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87 typedef int16_t Adc_EQADCRegister;
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96 }Adc_EQADCRegisterType;
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98 /* Command queue for calibration sequence. See 31.5.6 in reference manual. */
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99 const Adc_CommandType AdcCalibrationCommandQueue [] =
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101 /* Four samples of 25 % of (VRh - VRl). */
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103 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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104 .B.CHANNEL_NUMBER = 44
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107 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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108 .B.CHANNEL_NUMBER = 44
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111 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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112 .B.CHANNEL_NUMBER = 44
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115 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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116 .B.CHANNEL_NUMBER = 44
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118 /* Four samples of 75 % of (VRh - VRl). */
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120 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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121 .B.CHANNEL_NUMBER = 43
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124 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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125 .B.CHANNEL_NUMBER = 43
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128 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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129 .B.CHANNEL_NUMBER = 43
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132 .B.EOQ = 1, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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133 .B.CHANNEL_NUMBER = 43
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137 /* DMA configuration for calibration sequence. */
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138 const Dma_TcdType AdcCalibrationDMACommandConfig =
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140 .SADDR = (uint32_t)AdcCalibrationCommandQueue,
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142 .SSIZE = DMA_TRANSFER_SIZE_32BITS,
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144 .DSIZE = DMA_TRANSFER_SIZE_32BITS,
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145 .SOFF = sizeof(Adc_CommandType),
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146 .NBYTESu.B.NBYTES = sizeof(Adc_CommandType),
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148 .DADDR = (vint32_t)&EQADC.CFPR[0].R,
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167 const Dma_TcdType AdcCalibrationDMAResultConfig =
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169 .SADDR = (vint32_t)&EQADC.RFPR[0].R + 2,
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171 .SSIZE = DMA_TRANSFER_SIZE_16BITS,
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173 .DSIZE = DMA_TRANSFER_SIZE_16BITS,
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175 .NBYTESu.B.NBYTES = sizeof(Adc_ValueGroupType),
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177 .DADDR = 0, /* Dynamic address, written later. */
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180 .DOFF = sizeof(Adc_ValueGroupType),
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202 /* Function prototypes. */
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203 static void Adc_ConfigureEQADC (const Adc_ConfigType *ConfigPtr);
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204 static void Adc_ConfigureEQADCInterrupts (void);
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205 static void Adc_EQADCCalibrationSequence (void);
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206 static void Adc_WriteEQADCRegister (Adc_EQADCRegisterType reg, Adc_EQADCRegister value);
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207 static Adc_EQADCRegister Adc_ReadEQADCRegister (Adc_EQADCRegisterType reg);
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209 void Adc_GroupConversionComplete (Adc_GroupType group);
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211 /* Development error checking. */
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212 static Std_ReturnType Adc_CheckReadGroup (Adc_GroupType group);
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213 static Std_ReturnType Adc_CheckStartGroupConversion (Adc_GroupType group);
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214 static Std_ReturnType Adc_CheckStopGroupConversion (Adc_GroupType group);
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215 static Std_ReturnType Adc_CheckInit (const Adc_ConfigType *ConfigPtr);
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216 #if (ADC_DEINIT_API == STD_ON)
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217 static Std_ReturnType Adc_CheckDeInit (void);
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219 static Std_ReturnType Adc_CheckSetupResultBuffer (Adc_GroupType group);
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220 static Std_ReturnType Adc_CheckGetStreamLastPointer (Adc_GroupType group);
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222 /* static variable declarations */
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223 static Adc_StateType adcState = ADC_UNINIT;
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224 static const Adc_ConfigType *AdcConfigPtr; /* Pointer to configuration structure. */
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226 /* Validate functions used for development error check */
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227 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
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228 Std_ReturnType ValidateInit(Adc_APIServiceIDType api)
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230 Std_ReturnType res = E_OK;
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231 if(!(ADC_INIT == adcState)) {
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232 Det_ReportError(MODULE_ID_ADC,0,api,ADC_E_UNINIT );
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237 Std_ReturnType ValidateGroup(Adc_GroupType group,Adc_APIServiceIDType api)
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239 Std_ReturnType res = E_OK;
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240 if(!((group >= 0) && (group < AdcConfig->nbrOfGroups))) {
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241 Det_ReportError(MODULE_ID_ADC,0,api,ADC_E_PARAM_GROUP );
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248 #if (ADC_DEINIT_API == STD_ON)
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249 Std_ReturnType Adc_DeInit (const Adc_ConfigType *ConfigPtr)
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253 Adc_eQADCQueueType queue;
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254 Adc_GroupType group;
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255 boolean queueStopped;
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257 if (E_OK == Adc_CheckDeInit())
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259 /* Stop all queues. */
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260 for (queue = ADC_EQADC_QUEUE_0; queue < ADC_EQADC_NBR_OF_QUEUES; queue++)
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262 /* Disable queue. */
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263 EQADC.CFCR[queue].B.MODE = 0;
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265 /* Wait for queue to enter idle state. */
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266 queueStopped = FALSE;
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267 /* TODO replace switch with bit pattern. */
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268 while (!queueStopped)
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272 case ADC_EQADC_QUEUE_0:
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273 queueStopped = (EQADC.CFSR.B.CFS0 == EQADC_CFIFO_STATUS_IDLE);
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275 case ADC_EQADC_QUEUE_1:
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276 queueStopped = (EQADC.CFSR.B.CFS1 == EQADC_CFIFO_STATUS_IDLE);
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278 case ADC_EQADC_QUEUE_2:
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279 queueStopped = (EQADC.CFSR.B.CFS2 == EQADC_CFIFO_STATUS_IDLE);
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281 case ADC_EQADC_QUEUE_3:
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282 queueStopped = (EQADC.CFSR.B.CFS3 == EQADC_CFIFO_STATUS_IDLE);
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284 case ADC_EQADC_QUEUE_4:
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285 queueStopped = (EQADC.CFSR.B.CFS4 == EQADC_CFIFO_STATUS_IDLE);
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287 case ADC_EQADC_QUEUE_5:
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288 queueStopped = (EQADC.CFSR.B.CFS5 == EQADC_CFIFO_STATUS_IDLE);
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291 /* We should never get here... Terminate loop. */
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292 queueStopped = TRUE;
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297 /* Disable eDMA requests for commands and results. */
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298 EQADC.IDCR[queue].B.CFFS = 0;
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299 EQADC.IDCR[queue].B.RFDS = 0;
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301 /* Disable FIFO fill requests. */
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302 EQADC.IDCR[queue].B.CFFE = 0;
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303 EQADC.IDCR[queue].B.RFDE = 0;
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305 /* Disable interrupts. */
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306 EQADC.IDCR[queue].B.RFOIE = 0;
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307 EQADC.IDCR[queue].B.CFUIE = 0;
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308 EQADC.IDCR[queue].B.TORIE = 0;
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309 EQADC.IDCR[queue].B.EOQIE = 0;
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312 /* Stop all DMA channels connected to EQADC. */
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313 for (group = ADC_GROUP0; group < AdcConfigPtr->nbrOfGroups; group++)
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315 Dma_StopChannel (AdcConfigPtr->groupConfigPtr [group].dmaCommandChannel);
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316 Dma_StopChannel (AdcConfigPtr->groupConfigPtr [group].dmaResultChannel);
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318 /* Set group status to idle. */
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319 AdcConfigPtr->groupConfigPtr[group].status->groupStatus = ADC_IDLE;
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322 /* Disable EQADC. */
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323 Adc_WriteEQADCRegister (ADC0_CR, 0);
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325 /* Clean internal status. */
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326 AdcConfigPtr = (Adc_ConfigType *)NULL;
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327 adcState = ADC_UNINIT;
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333 Std_ReturnType Adc_Init (const Adc_ConfigType *ConfigPtr)
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335 Std_ReturnType returnValue;
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336 Adc_InternalChannelIdType channel;
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337 Adc_InternalChannelIdType channelId;
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338 Adc_GroupType group;
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339 Adc_CommandType *commandQueue;
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340 Adc_CommandType command;
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342 if (E_OK == Adc_CheckInit(ConfigPtr))
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344 /* First of all, store the location of the configuration data. */
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345 AdcConfigPtr = ConfigPtr;
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347 /* Start configuring the eQADC queues. */
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348 for (group = ADC_GROUP0; group < ConfigPtr->nbrOfGroups; group++)
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350 /* Loop through all channels and make the command queue. */
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351 for (channel = 0; channel < ConfigPtr->groupConfigPtr[group].numberOfChannels; channel++)
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353 /* Get physical channel. */
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354 channelId = ConfigPtr->groupConfigPtr[group].channelList[channel];
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356 commandQueue = ConfigPtr->groupConfigPtr[group].commandBuffer;
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358 /* Begin with empty command. */
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361 /* Physical channel number. */
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362 command.B.CHANNEL_NUMBER = channelId;
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364 command.B.LST = ConfigPtr->channelConfigPtr [channel].adcChannelConvTime;
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365 /* Calibration feature. */
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366 command.B.CAL = ConfigPtr->channelConfigPtr [channel].adcChannelCalibrationEnable;
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367 /* Result buffer FIFO. The number of groups must not be greater than the number of queues. */
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368 command.B.MESSAGE_TAG = group;
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370 /* Write command to command queue. */
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371 commandQueue [channel].R = command.R;
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373 /* Last channel in group. Write EOQ and configure eQADC FIFO. */
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374 if (channel == (ConfigPtr->groupConfigPtr[group].numberOfChannels - 1))
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376 commandQueue [channel].B.EOQ = 1;
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382 Adc_ConfigureEQADC (ConfigPtr);
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384 /* Perform calibration of the ADC. */
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385 Adc_EQADCCalibrationSequence ();
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387 /* Configure DMA channels. */
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388 for (group = ADC_GROUP0; group < ConfigPtr->nbrOfGroups; group++)
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391 ConfigPtr->groupConfigPtr[group].status->groupStatus = ADC_IDLE;
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393 Dma_ConfigureChannel ((Dma_TcdType *)ConfigPtr->groupConfigPtr [group].groupDMAResults, ConfigPtr->groupConfigPtr [group].dmaResultChannel);
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394 Dma_ConfigureChannel ((Dma_TcdType *)ConfigPtr->groupConfigPtr [group].groupDMACommands, ConfigPtr->groupConfigPtr [group].dmaCommandChannel);
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397 /* Start DMA channels. */
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398 for (group = ADC_GROUP0; group < ConfigPtr->nbrOfGroups; group++)
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400 /* Invalidate queues. */
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401 EQADC.CFCR[group].B.CFINV = 1;
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403 Dma_StartChannel (ConfigPtr->groupConfigPtr [group].dmaResultChannel);
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404 Dma_StartChannel (ConfigPtr->groupConfigPtr [group].dmaCommandChannel);
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407 Adc_ConfigureEQADCInterrupts ();
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409 /* Move on to INIT state. */
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410 adcState = ADC_INIT;
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411 returnValue = E_OK;
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415 returnValue = E_NOT_OK;
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418 return (returnValue);
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421 Std_ReturnType Adc_SetupResultBuffer (Adc_GroupType group, Adc_ValueGroupType *bufferPtr)
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423 Std_ReturnType returnValue = E_NOT_OK;
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425 /* Check for development errors. */
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426 if (E_OK == Adc_CheckSetupResultBuffer (group))
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428 AdcConfigPtr->groupConfigPtr[group].status->resultBufferPtr = bufferPtr;
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430 returnValue = E_OK;
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433 return (returnValue);
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436 Adc_StreamNumSampleType Adc_GetStreamLastPointer(Adc_GroupType group, Adc_ValueGroupType** PtrToSamplePtr)
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438 Adc_StreamNumSampleType nofSample = 0;
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439 Adc_GroupDefType *groupPtr = (Adc_GroupDefType *)&AdcConfigPtr->groupConfigPtr[group];
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442 /* Check for development errors. */
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443 if ( (E_OK == Adc_CheckGetStreamLastPointer (group)) &&
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444 (groupPtr->status->groupStatus != ADC_BUSY) )
\r
446 /* Set resultPtr to application buffer. */
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447 if(groupPtr->status->currSampleCount > 0){
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448 *PtrToSamplePtr = &groupPtr->status->resultBufferPtr[groupPtr->status->currSampleCount-1];
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451 if ((ADC_CONV_MODE_ONESHOT == groupPtr->conversionMode) &&
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452 (ADC_STREAM_COMPLETED == groupPtr->status->groupStatus))
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454 /** @req ADC327. */
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455 groupPtr->status->groupStatus = ADC_IDLE;
\r
457 else if ((ADC_CONV_MODE_CONTINOUS == groupPtr->conversionMode) &&
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458 (ADC_ACCESS_MODE_STREAMING == groupPtr->accessMode) &&
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459 (ADC_STREAM_BUFFER_LINEAR == groupPtr->streamBufferMode) &&
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460 (ADC_STREAM_COMPLETED == groupPtr->status->groupStatus))
\r
462 /** @req ADC327. */
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463 groupPtr->status->groupStatus = ADC_IDLE;
\r
465 else if ( (ADC_CONV_MODE_CONTINOUS == groupPtr->conversionMode) &&
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466 ((ADC_STREAM_COMPLETED == groupPtr->status->groupStatus) ||
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467 (ADC_COMPLETED == groupPtr->status->groupStatus)) )
\r
469 /* Restart continous mode, and reset result buffer */
\r
470 if ((ADC_CONV_MODE_CONTINOUS == groupPtr->conversionMode) &&
\r
471 (ADC_STREAM_COMPLETED == groupPtr->status->groupStatus))
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473 /* Start continous conversion again */
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474 Adc_StartGroupConversion(group);
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479 else{/* Keep status. */}
\r
483 /* Some condition not met */
\r
484 *PtrToSamplePtr = NULL;
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491 #if (ADC_READ_GROUP_API == STD_ON)
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492 Std_ReturnType Adc_ReadGroup (Adc_GroupType group, Adc_ValueGroupType *dataBufferPtr)
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494 Std_ReturnType returnValue = E_OK;
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496 Adc_GroupDefType *groupPtr = (Adc_GroupDefType *)&AdcConfigPtr->groupConfigPtr[group];
\r
498 if (E_OK == Adc_CheckReadGroup (group))
\r
500 /* Copy the result to application buffer. */
\r
501 for (channel = 0; channel < groupPtr->numberOfChannels; channel++)
\r
503 if(groupPtr->status->currSampleCount > 0){
\r
504 dataBufferPtr[channel] = (&(groupPtr->status->resultBufferPtr[groupPtr->status->currSampleCount-1]))[channel];
\r
506 dataBufferPtr[channel] = groupPtr->status->resultBufferPtr[channel];
\r
510 if ((ADC_CONV_MODE_ONESHOT == groupPtr->conversionMode) &&
\r
511 (ADC_STREAM_COMPLETED == groupPtr->status->groupStatus))
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513 /** @req ADC330. */
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514 groupPtr->status->groupStatus = ADC_IDLE;
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516 else if ((ADC_CONV_MODE_CONTINOUS == groupPtr->conversionMode) &&
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517 (ADC_STREAM_BUFFER_LINEAR == groupPtr->streamBufferMode) &&
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518 (ADC_ACCESS_MODE_STREAMING == groupPtr->accessMode) &&
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519 (ADC_STREAM_COMPLETED == groupPtr->status->groupStatus))
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521 /** @req ADC330. */
\r
522 groupPtr->status->groupStatus = ADC_IDLE;
\r
524 else if ((ADC_CONV_MODE_CONTINOUS == groupPtr->conversionMode) &&
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525 ((ADC_STREAM_COMPLETED == groupPtr->status->groupStatus) ||
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526 (ADC_COMPLETED == groupPtr->status->groupStatus)))
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529 /* Restart continous mode, and reset result buffer */
\r
530 if ((ADC_CONV_MODE_CONTINOUS == groupPtr->conversionMode) &&
\r
531 (ADC_STREAM_COMPLETED == groupPtr->status->groupStatus))
\r
533 /* Start continous conversion again */
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534 Adc_StartGroupConversion(group);
\r
539 else{/* Keep status. */}
\r
543 /* An error have been raised from Adc_CheckReadGroup(). */
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544 returnValue = E_NOT_OK;
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547 return (returnValue);
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551 Adc_StatusType Adc_GetGroupStatus (Adc_GroupType group)
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553 Adc_StatusType returnValue;
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555 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
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556 if( (ValidateInit(ADC_GETGROUPSTATUS_ID) == E_NOT_OK) ||
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557 (ValidateGroup(group, ADC_GETGROUPSTATUS_ID) == E_NOT_OK))
\r
559 returnValue = ADC_IDLE;
\r
563 returnValue = AdcConfigPtr->groupConfigPtr[group].status->groupStatus;
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566 returnValue = AdcConfigPtr->groupConfigPtr[group].status->groupStatus;
\r
568 return (returnValue);
\r
571 void Adc_GroupConversionComplete (Adc_GroupType group)
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573 Adc_GroupDefType *adcGroup = (Adc_GroupDefType *)&AdcConfigPtr->groupConfigPtr[group];
\r
575 if(ADC_ACCESS_MODE_SINGLE == adcGroup->accessMode )
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577 adcGroup->status->groupStatus = ADC_STREAM_COMPLETED;
\r
578 /* Call notification if enabled. */
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579 #if (ADC_GRP_NOTIF_CAPABILITY == STD_ON)
\r
580 if (adcGroup->status->notifictionEnable && adcGroup->groupCallback != NULL)
\r
582 adcGroup->groupCallback();
\r
585 /* Disable trigger. */
\r
586 EQADC.CFCR[group].B.MODE = 0;
\r
590 if(ADC_STREAM_BUFFER_LINEAR == adcGroup->streamBufferMode)
\r
592 adcGroup->status->currSampleCount++;
\r
593 if(adcGroup->status->currSampleCount < adcGroup->streamNumSamples)
\r
595 adcGroup->status->currResultBufPtr += adcGroup->numberOfChannels;
\r
596 adcGroup->status->groupStatus = ADC_COMPLETED;
\r
598 #if defined (ADC_USES_DMA)
\r
599 /* Increase current result buffer ptr */
\r
600 Dma_ConfigureDestinationAddress((uint32_t)adcGroup->status->currResultBufPtr, adcGroup->dmaResultChannel);
\r
603 /* Set single scan enable bit */
\r
604 EQADC.CFCR[group].B.SSE = 1;
\r
608 /* All sample completed. */
\r
609 adcGroup->status->groupStatus = ADC_STREAM_COMPLETED;
\r
611 /* Call notification if enabled. */
\r
612 #if (ADC_GRP_NOTIF_CAPABILITY == STD_ON)
\r
613 if (adcGroup->status->notifictionEnable && adcGroup->groupCallback != NULL){
\r
614 adcGroup->groupCallback();
\r
617 /* Disable trigger. */
\r
618 EQADC.CFCR[group].B.MODE = 0;
\r
621 else if(ADC_STREAM_BUFFER_CIRCULAR == adcGroup->streamBufferMode)
\r
623 adcGroup->status->currSampleCount++;
\r
624 if(adcGroup->status->currSampleCount < adcGroup->streamNumSamples)
\r
626 adcGroup->status->currResultBufPtr += adcGroup->numberOfChannels;
\r
627 #if defined (ADC_USES_DMA)
\r
628 /* Increase current result buffer ptr */
\r
629 Dma_ConfigureDestinationAddress((uint32_t)adcGroup->status->currResultBufPtr, adcGroup->dmaResultChannel);
\r
631 adcGroup->status->groupStatus = ADC_COMPLETED;
\r
633 /* Set single scan enable bit */
\r
634 EQADC.CFCR[group].B.SSE = 1;
\r
638 /* Sample completed. */
\r
639 /* Disable trigger. */
\r
640 EQADC.CFCR[group].B.MODE = 0;
\r
641 adcGroup->status->groupStatus = ADC_STREAM_COMPLETED;
\r
642 /* Call notification if enabled. */
\r
643 #if (ADC_GRP_NOTIF_CAPABILITY == STD_ON)
\r
644 if (adcGroup->status->notifictionEnable && adcGroup->groupCallback != NULL)
\r
646 adcGroup->groupCallback();
\r
658 void Adc_Group0ConversionComplete (void)
\r
660 /* ISR for FIFO 0 end of queue. Clear interrupt flag. */
\r
661 EQADC.FISR[ADC_EQADC_QUEUE_0].B.EOQF = 1;
\r
662 Adc_GroupConversionComplete(0);
\r
664 void Adc_Group1ConversionComplete (void)
\r
666 /* ISR for FIFO 0 end of queue. Clear interrupt flag. */
\r
667 EQADC.FISR[ADC_EQADC_QUEUE_1].B.EOQF = 1;
\r
668 Adc_GroupConversionComplete(1);
\r
670 void Adc_Group2ConversionComplete (void)
\r
672 /* ISR for FIFO 0 end of queue. Clear interrupt flag. */
\r
673 EQADC.FISR[ADC_EQADC_QUEUE_2].B.EOQF = 1;
\r
674 Adc_GroupConversionComplete(2);
\r
676 void Adc_Group3ConversionComplete (void)
\r
678 /* ISR for FIFO 0 end of queue. Clear interrupt flag. */
\r
679 EQADC.FISR[ADC_EQADC_QUEUE_3].B.EOQF = 1;
\r
680 Adc_GroupConversionComplete(3);
\r
682 void Adc_Group4ConversionComplete (void)
\r
684 /* ISR for FIFO 0 end of queue. Clear interrupt flag. */
\r
685 EQADC.FISR[ADC_EQADC_QUEUE_4].B.EOQF = 1;
\r
686 Adc_GroupConversionComplete(4);
\r
688 void Adc_Group5ConversionComplete (void)
\r
690 /* ISR for FIFO 0 end of queue. Clear interrupt flag. */
\r
691 EQADC.FISR[ADC_EQADC_QUEUE_5].B.EOQF = 1;
\r
692 Adc_GroupConversionComplete(5);
\r
695 void Adc_EQADCError (void)
\r
697 /* Something is wrong!! Check the cause of the error and try to correct it. */
\r
698 if (EQADC.FISR[ADC_EQADC_QUEUE_0].B.TORF)
\r
700 /* Trigger overrun on queue 0!! */
\r
703 else if (EQADC.FISR[ADC_EQADC_QUEUE_1].B.TORF)
\r
705 /* Trigger overrun on queue 1!! */
\r
708 else if (EQADC.FISR[ADC_EQADC_QUEUE_0].B.CFUF)
\r
710 /* Command underflow on queue 0!! */
\r
713 else if (EQADC.FISR[ADC_EQADC_QUEUE_1].B.CFUF)
\r
715 /* Command underflow on queue 1!! */
\r
718 else if (EQADC.FISR[ADC_EQADC_QUEUE_0].B.RFOF)
\r
720 /* Result overflow on queue 0!! */
\r
723 else if (EQADC.FISR[ADC_EQADC_QUEUE_1].B.RFOF)
\r
725 /* Result overflow on queue 1!! */
\r
730 /* Something else... TODO What have we missed above */
\r
735 /* Helper macro to make sure that the qommand queue have
\r
736 * executed the commands in the fifo.
\r
737 * First check that the H/W negate the
\r
738 * single scan bit and then wait for EOQ. */
\r
739 #define WAIT_FOR_QUEUE_TO_FINISH(q) \
\r
740 while (EQADC.FISR[q].B.SSS) \
\r
745 while (!EQADC.FISR[q].B.EOQF) \
\r
750 static void Adc_WriteEQADCRegister (Adc_EQADCRegisterType reg, Adc_EQADCRegister value)
\r
752 Adc_RegisterWriteType writeReg;
\r
753 uint32_t temp, oldMode;
\r
757 /* Write command. */
\r
759 writeReg.B.EOQ = 1;
\r
760 writeReg.B.ADC_REG = value;
\r
761 writeReg.B.ADC_REG_ADDR = reg;
\r
763 /* Invalidate queue. */
\r
764 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.CFINV = 1;
\r
767 /* Write command through FIFO. */
\r
768 EQADC.CFPR[ADC_EQADC_QUEUE_0].R = writeReg.R;
\r
771 oldMode = EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE;
\r
772 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = ADC_CONV_MODE_ONESHOT;
\r
773 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.SSE = 1;
\r
775 /* Wait for command to be executed. */
\r
776 WAIT_FOR_QUEUE_TO_FINISH(ADC_EQADC_QUEUE_0);
\r
778 /* Flush result buffer. */
\r
779 temp = EQADC.RFPR[ADC_EQADC_QUEUE_0].R;
\r
780 EQADC.FISR[ADC_EQADC_QUEUE_0].B.EOQF = 1;
\r
782 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = oldMode;
\r
786 static Adc_EQADCRegister Adc_ReadEQADCRegister (Adc_EQADCRegisterType reg)
\r
788 Adc_RegisterReadType readReg;
\r
789 Adc_EQADCRegister result;
\r
790 uint32_t oldMode, dmaRequestEnable;
\r
794 /* Read command. */
\r
797 readReg.B.ADC_REG_ADDR = reg;
\r
798 readReg.B.MESSAGE_TAG = ADC_EQADC_QUEUE_0;
\r
800 /* Make sure that DMA requests for command fill and result drain is disabled. */
\r
801 if (EQADC.IDCR[ADC_EQADC_QUEUE_0].B.RFDE || EQADC.IDCR[ADC_EQADC_QUEUE_0].B.CFFE)
\r
803 EQADC.IDCR[ADC_EQADC_QUEUE_0].B.CFFE = 0;
\r
804 EQADC.IDCR[ADC_EQADC_QUEUE_0].B.RFDE = 0;
\r
806 /* Remember to enable requests again... */
\r
807 dmaRequestEnable = TRUE;
\r
811 dmaRequestEnable = FALSE;
\r
814 /* Invalidate queue. */
\r
815 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.CFINV = 1;
\r
817 /* Write command through FIFO. */
\r
818 EQADC.CFPR[ADC_EQADC_QUEUE_0].R = readReg.R;
\r
821 oldMode = EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE;
\r
822 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = ADC_CONV_MODE_ONESHOT;
\r
823 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.SSE = 1;
\r
825 /* Wait for command to be executed. */
\r
826 WAIT_FOR_QUEUE_TO_FINISH(ADC_EQADC_QUEUE_0);
\r
828 /* Read result buffer. */
\r
829 result = EQADC.RFPR[ADC_EQADC_QUEUE_0].R;
\r
830 EQADC.FISR[ADC_EQADC_QUEUE_0].B.EOQF = 1;
\r
832 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = oldMode;
\r
834 if (dmaRequestEnable)
\r
836 EQADC.IDCR[ADC_EQADC_QUEUE_0].B.CFFE = 1;
\r
837 EQADC.IDCR[ADC_EQADC_QUEUE_0].B.RFDE = 1;
\r
845 static void Adc_ConfigureEQADC (const Adc_ConfigType *ConfigPtr)
\r
847 Adc_GroupType group;
\r
851 ADC_ENABLE = 0x8000,
\r
854 Adc_WriteEQADCRegister (ADC0_CR, (ADC_ENABLE | ConfigPtr->hwConfigPtr->adcPrescale));
\r
856 /* Disable time stamp timer. */
\r
857 Adc_WriteEQADCRegister (ADC0_TSCR, 0);
\r
859 for (group = ADC_GROUP0; group < ConfigPtr->nbrOfGroups; group++)
\r
861 /* Enable eDMA requests for commands and results. */
\r
862 EQADC.IDCR[group].B.CFFS = 1;
\r
863 EQADC.IDCR[group].B.RFDS = 1;
\r
865 /* Invalidate FIFO. */
\r
866 EQADC.CFCR[group].B.CFINV = 1;
\r
868 /* Enable FIFO fill requests. */
\r
869 EQADC.IDCR[group].B.CFFE = 1;
\r
870 EQADC.IDCR[group].B.RFDE = 1;
\r
874 void Adc_ConfigureEQADCInterrupts (void)
\r
876 Adc_GroupType group;
\r
877 ISR_INSTALL_ISR2( "Adc_Err", Adc_EQADCError, EQADC_FISR_OVER, 2, 0);
\r
878 for (group = ADC_GROUP0; group < AdcConfigPtr->nbrOfGroups; group++)
\r
880 /* Enable end of queue, queue overflow/underflow interrupts. Clear corresponding flags. */
\r
881 EQADC.FISR[group].B.RFOF = 1;
\r
882 EQADC.IDCR[group].B.RFOIE = 1;
\r
884 EQADC.FISR[group].B.CFUF = 1;
\r
885 EQADC.IDCR[group].B.CFUIE = 1;
\r
887 EQADC.FISR[group].B.TORF = 1;
\r
888 EQADC.IDCR[group].B.TORIE = 1;
\r
890 EQADC.FISR[group].B.EOQF = 1;
\r
891 EQADC.IDCR[group].B.EOQIE = 1;
\r
893 ISR_INSTALL_ISR2( "Adc_Grp0", Adc_Group0ConversionComplete, EQADC_FISR0_EOQF0, 2, 0);
\r
894 }else if(group == 1){
\r
895 ISR_INSTALL_ISR2( "Adc_Grp1", Adc_Group1ConversionComplete, EQADC_FISR1_EOQF1, 2, 0);
\r
896 }else if(group == 2){
\r
897 ISR_INSTALL_ISR2( "Adc_Grp2", Adc_Group2ConversionComplete, EQADC_FISR2_EOQF2, 2, 0);
\r
898 }else if(group == 3){
\r
899 ISR_INSTALL_ISR2( "Adc_Grp3", Adc_Group3ConversionComplete, EQADC_FISR3_EOQF3, 2, 0);
\r
900 }else if(group == 4){
\r
901 ISR_INSTALL_ISR2( "Adc_Grp4", Adc_Group4ConversionComplete, EQADC_FISR4_EOQF4, 2, 0);
\r
902 }else if(group == 5){
\r
903 ISR_INSTALL_ISR2( "Adc_Grp5", Adc_Group5ConversionComplete, EQADC_FISR5_EOQF5, 2, 0);
\r
908 #if (ADC_ENABLE_START_STOP_GROUP_API == STD_ON)
\r
909 void Adc_StartGroupConversion (Adc_GroupType group)
\r
911 Adc_GroupDefType *groupPtr = (Adc_GroupDefType *)&AdcConfigPtr->groupConfigPtr[group];
\r
913 /* Run development error check. */
\r
914 if (E_OK == Adc_CheckStartGroupConversion (group))
\r
916 /* Disable trigger. */
\r
917 EQADC.CFCR[group].B.MODE = 0;
\r
919 /* Set group state to BUSY. */
\r
920 groupPtr->status->groupStatus = ADC_BUSY;
\r
922 groupPtr->status->currSampleCount = 0;
\r
923 groupPtr->status->currResultBufPtr = groupPtr->status->resultBufferPtr; /* Set current result buffer */
\r
925 Dma_ConfigureDestinationAddress((uint32_t)groupPtr->status->resultBufferPtr, groupPtr->dmaResultChannel);
\r
927 /* Always use single shot in streaming mode */
\r
928 if( groupPtr->accessMode == ADC_ACCESS_MODE_STREAMING)
\r
930 /* Set conversion mode. */
\r
931 EQADC.CFCR[group].B.MODE = ADC_CONV_MODE_ONESHOT;
\r
932 /* Set single scan enable bit if this group is one shot. */
\r
933 EQADC.CFCR[group].B.SSE = 1;
\r
937 /* Set conversion mode. */
\r
938 EQADC.CFCR[group].B.MODE = groupPtr->conversionMode;
\r
939 /* Set single scan enable bit if this group is one shot. */
\r
940 if (AdcConfigPtr->groupConfigPtr[group].conversionMode == ADC_CONV_MODE_ONESHOT)
\r
942 EQADC.CFCR[group].B.SSE = 1;
\r
948 /* Error have been set within Adc_CheckStartGroupConversion(). */
\r
952 void Adc_StopGroupConversion (Adc_GroupType group)
\r
954 if (E_OK == Adc_CheckStopGroupConversion (group))
\r
956 uint32 groupMask = 0x3 << (group * 2);
\r
957 /* Disable trigger normal conversions for ADC */
\r
958 EQADC.CFCR[group].B.MODE = 0;
\r
959 while((EQADC.CFSR.R & groupMask) != EQADC_CFIFO_STATUS_IDLE);
\r
961 /* Invalidate FIFO. */
\r
962 EQADC.CFCR[group].B.CFINV = 1;
\r
964 /* Set group state to IDLE. */
\r
965 AdcConfigPtr->groupConfigPtr[group].status->groupStatus = ADC_IDLE;
\r
967 /* Disable group notification if enabled. */
\r
968 if(1 == AdcConfigPtr->groupConfigPtr[group].status->notifictionEnable){
\r
969 Adc_DisableGroupNotification (group);
\r
974 /* Error have been set within Adc_CheckStartGroupConversion(). */
\r
979 static void Adc_EQADCCalibrationSequence (void)
\r
981 Adc_ValueGroupType calibrationResult[sizeof(AdcCalibrationCommandQueue)/sizeof(AdcCalibrationCommandQueue[0])];
\r
982 int32_t point25Average, point75Average, i;
\r
983 Adc_EQADCRegister tempGCC, tempOCC;
\r
986 IDEAL_RES25 = 0x1000,
\r
987 IDEAL_RES75 = 0x3000,
\r
990 /* Use group 0 DMA channel for calibration. */
\r
991 Dma_ConfigureChannel ((Dma_TcdType *)&AdcCalibrationDMACommandConfig,DMA_ADC_GROUP0_COMMAND_CHANNEL);
\r
992 Dma_ConfigureChannelTranferSize (sizeof(AdcCalibrationCommandQueue)/sizeof(AdcCalibrationCommandQueue[0]),
\r
993 DMA_ADC_GROUP0_COMMAND_CHANNEL);
\r
994 Dma_ConfigureChannelSourceCorr (-sizeof(AdcCalibrationCommandQueue), DMA_ADC_GROUP0_COMMAND_CHANNEL);
\r
996 Dma_ConfigureChannel ((Dma_TcdType *)&AdcCalibrationDMAResultConfig, DMA_ADC_GROUP0_RESULT_CHANNEL);
\r
997 Dma_ConfigureChannelTranferSize (sizeof(calibrationResult)/sizeof(calibrationResult[0]),
\r
998 DMA_ADC_GROUP0_RESULT_CHANNEL);
\r
999 Dma_ConfigureChannelDestinationCorr (-sizeof(calibrationResult), DMA_ADC_GROUP0_RESULT_CHANNEL);
\r
1000 Dma_ConfigureDestinationAddress ((uint32_t)calibrationResult, DMA_ADC_GROUP0_RESULT_CHANNEL);
\r
1002 /* Invalidate queues. */
\r
1003 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.CFINV = 1;
\r
1005 Dma_StartChannel (DMA_ADC_GROUP0_COMMAND_CHANNEL);
\r
1006 Dma_StartChannel (DMA_ADC_GROUP0_RESULT_CHANNEL);
\r
1008 /* Start conversion. */
\r
1009 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = ADC_CONV_MODE_ONESHOT;
\r
1010 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.SSE = 1;
\r
1012 /* Wait for conversion to complete. */
\r
1013 while(!Dma_ChannelDone (DMA_ADC_GROUP0_RESULT_CHANNEL))
\r
1018 /* Stop DMA channels and write calibration data to ADC engine. */
\r
1019 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = ADC_CONV_MODE_DISABLED;
\r
1020 Dma_StopChannel (DMA_ADC_GROUP0_COMMAND_CHANNEL);
\r
1021 Dma_StopChannel (DMA_ADC_GROUP0_RESULT_CHANNEL);
\r
1023 /* Calculate conversion factors and write to ADC. */
\r
1024 point25Average = 0;
\r
1025 point75Average = 0;
\r
1026 for (i = 0; i < sizeof(calibrationResult)/sizeof(calibrationResult[0] / 2); i++)
\r
1028 point25Average += calibrationResult[i];
\r
1029 point75Average += calibrationResult[i + sizeof(calibrationResult)/sizeof(calibrationResult[0]) / 2];
\r
1032 /* Calculate average and correction slope and offset. */
\r
1033 point25Average /= (sizeof(calibrationResult)/sizeof(calibrationResult[0]) / 2);
\r
1034 point75Average /= (sizeof(calibrationResult)/sizeof(calibrationResult[0]) / 2);
\r
1036 tempGCC = ((IDEAL_RES75 - IDEAL_RES25) << 14) / (point75Average - point25Average);
\r
1037 tempOCC = IDEAL_RES75 - ((tempGCC * point75Average) >> 14) - 2;
\r
1039 /* GCC field is only 15 bits. */
\r
1040 tempGCC = tempGCC & ~(1 << 15);
\r
1042 /* OCC field is only 14 bits. */
\r
1043 tempOCC = tempOCC & ~(3 << 14);
\r
1045 /* Write calibration data to ADC engine. */
\r
1046 Adc_WriteEQADCRegister (ADC0_GCCR, tempGCC);
\r
1047 Adc_WriteEQADCRegister (ADC0_OCCR, tempOCC);
\r
1049 /* Read back and check calibration values. */
\r
1050 if (Adc_ReadEQADCRegister (ADC0_GCCR) != tempGCC)
\r
1054 else if (Adc_ReadEQADCRegister (ADC0_OCCR) != tempOCC)
\r
1060 #define SYSTEM_CLOCK_DIVIDE(f) ((f / 2) - 1)
\r
1062 #if (ADC_GRP_NOTIF_CAPABILITY == STD_ON)
\r
1063 void Adc_EnableGroupNotification (Adc_GroupType group)
\r
1065 Std_ReturnType res;
\r
1067 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1068 if( (ValidateInit(ADC_ENABLEGROUPNOTIFICATION_ID) == E_NOT_OK) ||
\r
1069 (ValidateGroup(group, ADC_ENABLEGROUPNOTIFICATION_ID) == E_NOT_OK))
\r
1073 else if (AdcConfigPtr->groupConfigPtr[group].groupCallback == NULL)
\r
1076 Det_ReportError(MODULE_ID_ADC,0,ADC_ENABLEGROUPNOTIFICATION_ID ,ADC_E_NOTIF_CAPABILITY );
\r
1080 /* Nothing strange. Go on... */
\r
1087 AdcConfigPtr->groupConfigPtr[group].status->notifictionEnable = 1;
\r
1091 void Adc_DisableGroupNotification (Adc_GroupType group)
\r
1093 Std_ReturnType res;
\r
1095 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1096 if( (ValidateInit(ADC_DISABLEGROUPNOTIFICATION_ID) == E_NOT_OK) ||
\r
1097 (ValidateGroup(group, ADC_DISABLEGROUPNOTIFICATION_ID) == E_NOT_OK))
\r
1101 else if (AdcConfigPtr->groupConfigPtr[group].groupCallback == NULL)
\r
1104 Det_ReportError(MODULE_ID_ADC,0,ADC_DISABLEGROUPNOTIFICATION_ID ,ADC_E_NOTIF_CAPABILITY );
\r
1108 /* Nothing strange. Go on... */
\r
1115 AdcConfigPtr->groupConfigPtr[group].status->notifictionEnable = 0;
\r
1122 /* Development error checking functions. */
\r
1123 #if (ADC_READ_GROUP_API == STD_ON)
\r
1124 static Std_ReturnType Adc_CheckReadGroup (Adc_GroupType group)
\r
1126 Std_ReturnType returnValue = E_OK;
\r
1128 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1130 if( (ValidateInit(ADC_READGROUP_ID) == E_NOT_OK) ||
\r
1131 (ValidateGroup(group, ADC_READGROUP_ID) == E_NOT_OK))
\r
1133 returnValue = E_NOT_OK;
\r
1135 else if (ADC_IDLE == AdcConfigPtr->groupConfigPtr[group].status->groupStatus)
\r
1138 returnValue = E_NOT_OK;
\r
1139 Det_ReportError(MODULE_ID_ADC,0,ADC_READGROUP_ID ,ADC_E_IDLE );
\r
1143 /* Nothing strange. Go on... */
\r
1144 returnValue = E_OK;
\r
1147 return (returnValue);
\r
1151 #if (ADC_ENABLE_START_STOP_GROUP_API == STD_ON)
\r
1152 static Std_ReturnType Adc_CheckStartGroupConversion (Adc_GroupType group)
\r
1154 Std_ReturnType returnValue = E_OK;
\r
1156 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1158 if( (ValidateInit(ADC_STARTGROUPCONVERSION_ID) == E_NOT_OK) ||
\r
1159 (ValidateGroup(group, ADC_STARTGROUPCONVERSION_ID) == E_NOT_OK))
\r
1161 returnValue = E_NOT_OK;
\r
1163 else if ( NULL == AdcConfigPtr->groupConfigPtr[group].status->resultBufferPtr )
\r
1165 /* ResultBuffer not set, ADC424 */
\r
1166 Det_ReportError(MODULE_ID_ADC,0,ADC_STARTGROUPCONVERSION_ID, ADC_E_BUFFER_UNINIT );
\r
1167 returnValue = E_NOT_OK;
\r
1169 else if (!(ADC_TRIGG_SRC_SW == AdcConfigPtr->groupConfigPtr[group].triggerSrc))
\r
1171 /* Wrong trig source, ADC133. */
\r
1172 Det_ReportError(MODULE_ID_ADC,0,ADC_STARTGROUPCONVERSION_ID, ADC_E_WRONG_TRIGG_SRC);
\r
1173 returnValue = E_NOT_OK;
\r
1175 else if (!((ADC_IDLE == AdcConfigPtr->groupConfigPtr[group].status->groupStatus) ||
\r
1176 (ADC_STREAM_COMPLETED == AdcConfigPtr->groupConfigPtr[group].status->groupStatus)))
\r
1178 /* Group status not OK, ADC351, ADC428 */
\r
1179 Det_ReportError(MODULE_ID_ADC,0,ADC_STARTGROUPCONVERSION_ID, ADC_E_BUSY );
\r
1181 //returnValue = E_NOT_OK;
\r
1182 returnValue = E_OK;
\r
1186 returnValue = E_OK;
\r
1190 return (returnValue);
\r
1193 static Std_ReturnType Adc_CheckStopGroupConversion (Adc_GroupType group)
\r
1195 Std_ReturnType returnValue = E_OK;
\r
1197 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1198 if( (ValidateInit(ADC_STOPGROUPCONVERSION_ID) == E_NOT_OK) ||
\r
1199 (ValidateGroup(group, ADC_STOPGROUPCONVERSION_ID) == E_NOT_OK))
\r
1201 returnValue = E_NOT_OK;
\r
1203 else if (!(ADC_TRIGG_SRC_SW == AdcConfigPtr->groupConfigPtr[group].triggerSrc))
\r
1205 /* Wrong trig source, ADC164. */
\r
1206 Det_ReportError(MODULE_ID_ADC,0,ADC_STOPGROUPCONVERSION_ID, ADC_E_WRONG_TRIGG_SRC);
\r
1207 returnValue = E_NOT_OK;
\r
1209 else if (ADC_IDLE == AdcConfigPtr->groupConfigPtr[group].status->groupStatus)
\r
1211 /* Group status not OK, ADC241 */
\r
1212 Det_ReportError(MODULE_ID_ADC,0,ADC_STOPGROUPCONVERSION_ID, ADC_E_IDLE );
\r
1213 returnValue = E_NOT_OK;
\r
1217 returnValue = E_OK;
\r
1221 return (returnValue);
\r
1225 static Std_ReturnType Adc_CheckInit (const Adc_ConfigType *ConfigPtr)
\r
1227 Std_ReturnType returnValue = E_OK;
\r
1229 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1230 if (!(ADC_UNINIT == adcState))
\r
1232 /* Oops, already initialised. */
\r
1233 Det_ReportError(MODULE_ID_ADC,0,ADC_INIT_ID, ADC_E_ALREADY_INITIALIZED );
\r
1234 returnValue = E_NOT_OK;
\r
1236 else if (ConfigPtr == NULL)
\r
1238 /* Wrong config! */
\r
1239 Det_ReportError(MODULE_ID_ADC,0,ADC_INIT_ID, ADC_E_PARAM_CONFIG );
\r
1240 returnValue = E_NOT_OK;
\r
1244 /* Looks good!! */
\r
1245 returnValue = E_OK;
\r
1248 return (returnValue);
\r
1251 #if (ADC_DEINIT_API == STD_ON)
\r
1252 static Std_ReturnType Adc_CheckDeInit (void)
\r
1254 Std_ReturnType returnValue = E_OK;
\r
1256 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1257 if(ValidateInit(ADC_DEINIT_ID) == E_OK)
\r
1259 for (Adc_GroupType group = ADC_GROUP0; group < AdcConfigPtr->nbrOfGroups; group++)
\r
1261 /* Check ADC is IDLE or COMPLETE*/
\r
1262 if((AdcConfigPtr->groupConfigPtr[group].status->groupStatus != ADC_IDLE) && (AdcConfigPtr->groupConfigPtr[group].status->groupStatus != ADC_STREAM_COMPLETED))
\r
1264 Det_ReportError(MODULE_ID_ADC,0,ADC_DEINIT_ID, ADC_E_BUSY );
\r
1265 returnValue = E_NOT_OK;
\r
1271 returnValue = E_NOT_OK;
\r
1274 return (returnValue);
\r
1278 static Std_ReturnType Adc_CheckSetupResultBuffer (Adc_GroupType group)
\r
1280 Std_ReturnType returnValue = E_OK;
\r
1282 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1283 if(ValidateGroup(group, ADC_SETUPRESULTBUFFER_ID) == E_NOT_OK)
\r
1285 returnValue = E_NOT_OK;
\r
1288 return (returnValue);
\r
1291 static Std_ReturnType Adc_CheckGetStreamLastPointer (Adc_GroupType group)
\r
1293 Std_ReturnType returnValue = E_OK;
\r
1295 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1296 if( (ValidateInit(ADC_GETSTREAMLASTPOINTER_ID) == E_NOT_OK) ||
\r
1297 (ValidateGroup(group, ADC_GETSTREAMLASTPOINTER_ID) == E_NOT_OK))
\r
1299 returnValue = E_NOT_OK;
\r
1301 else if(AdcConfigPtr->groupConfigPtr[group].status->groupStatus == ADC_IDLE)
\r
1302 { /** @req ADC215 Check ADC is not in IDLE */
\r
1303 Det_ReportError(MODULE_ID_ADC,0,ADC_GETSTREAMLASTPOINTER_ID, ADC_E_IDLE );
\r
1304 returnValue = E_NOT_OK;
\r
1307 return (returnValue);
\r