1 /* -------------------------------- Arctic Core ------------------------------
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2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
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4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
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6 * This source code is free software; you can redistribute it and/or modify it
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7 * under the terms of the GNU General Public License version 2 as published by the
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8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
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10 * This program is distributed in the hope that it will be useful, but
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11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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14 * -------------------------------- Arctic Core ------------------------------*/
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24 * ports: PBxx to PJxx with xx ranging from 0 to 15
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28 #include "Std_Types.h"
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30 #if defined(USE_DET)
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34 #include "mpc55xx.h"
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36 #define CHANNEL_PTR (&DioChannelConfigData)
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37 #define CHANNEL_GRP_PTR (&DioConfigData)
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38 #define PORT_PTR (&DioPortConfigData)
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41 #if ( DIO_DEV_ERROR_DETECT == STD_ON )
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42 static int Channel_Config_Contains(Dio_ChannelType channelId)
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44 Dio_ChannelType* ch_ptr=(Dio_ChannelType*)CHANNEL_PTR;
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46 while (DIO_END_OF_LIST!=*ch_ptr)
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48 if (*ch_ptr==channelId)
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55 static int Port_Config_Contains(Dio_PortType portId)
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57 Dio_PortType* port_ptr=(Dio_PortType*)PORT_PTR;
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59 while (DIO_END_OF_LIST!=*port_ptr)
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61 if (*port_ptr==portId)
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68 static int Channel_Group_Config_Contains(const Dio_ChannelGroupType* _channelGroupIdPtr)
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70 Dio_ChannelGroupType* chGrp_ptr=(Dio_ChannelGroupType*)CHANNEL_GRP_PTR;
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73 while (DIO_END_OF_LIST!=chGrp_ptr->port)
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75 if (chGrp_ptr->port==_channelGroupIdPtr->port&&
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76 chGrp_ptr->offset==_channelGroupIdPtr->offset&&
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77 chGrp_ptr->mask==_channelGroupIdPtr->mask)
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84 #define VALIDATE_CHANNEL(_channelId, _api) \
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85 if(0==Channel_Config_Contains(channelId)) { \
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86 Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_CHANNEL_ID ); \
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90 #define VALIDATE_PORT(_portId, _api)\
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91 if(0==Port_Config_Contains(_portId)) {\
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92 Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_PORT_ID ); \
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96 #define VALIDATE_CHANNELGROUP(_channelGroupIdPtr, _api)\
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97 if(0==Channel_Group_Config_Contains(_channelGroupIdPtr)) {\
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98 Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_GROUP_ID ); \
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103 #define VALIDATE_CHANNEL(_channelId, _api)
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104 #define VALIDATE_PORT(_portId, _api)
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105 #define VALIDATE_CHANNELGROUP(_channelGroupIdPtr, _api)
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108 Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId)
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110 Dio_LevelType level = STD_LOW;
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111 VALIDATE_CHANNEL(channelId, DIO_READCHANNEL_ID);
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112 if (SIU.PCR[channelId].B.IBE) {
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113 // Read level from SIU.
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114 if (SIU.GPDI [channelId].R) {
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117 } else if(SIU.PCR[channelId].B.OBE) {
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118 // Read level from SIU.
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119 if (SIU.GPDO [channelId].R) {
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123 #if ( DIO_DEV_ERROR_DETECT == STD_ON )
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129 void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)
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131 VALIDATE_CHANNEL(channelId, DIO_WRITECHANNEL_ID);
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132 // Write level to SIU.
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133 if(SIU.PCR[channelId].B.OBE) {
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134 SIU.GPDO [channelId].R = level;
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136 #if ( DIO_DEV_ERROR_DETECT == STD_ON )
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142 Dio_PortLevelType Dio_ReadPort(Dio_PortType portId)
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144 Dio_LevelType level;
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145 VALIDATE_PORT(portId, DIO_READPORT_ID);
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147 #if defined(CFG_MPC5554)||defined(CFG_MPC5567)
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148 vuint16_t *ptr = (vuint16_t *)&SIU.GPDI;
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149 #elif defined(CFG_MPC560X)
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150 vuint16_t *ptr = (vuint16_t *)&SIU.PGPDI;
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152 vuint16_t *ptr = (vuint16_t *)&SIU.PGPDI0; // The GPDI 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths
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154 level = ptr[portId]; // Read the bit pattern (16bits) to the port
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155 #if ( DIO_DEV_ERROR_DETECT == STD_ON )
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161 void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)
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163 VALIDATE_PORT(portId, DIO_WRITEPORT_ID);
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165 // find address of first port
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166 #if defined(CFG_MPC5554)||defined(CFG_MPC5567)
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167 vuint16_t *ptr = (vuint16_t *)&SIU.GPDO;
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168 #elif defined(CFG_MPC560X)
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169 vuint16_t *ptr = (vuint16_t *)&SIU.PGPDO;
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171 vuint16_t *ptr = (vuint16_t *)&SIU.PGPDO0; // The GPDO 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths
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173 ptr[portId] = level; // Write the bit pattern (16bits) to the port
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174 #if ( DIO_DEV_ERROR_DETECT == STD_ON )
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180 Dio_PortLevelType Dio_ReadChannelGroup(
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181 const Dio_ChannelGroupType *channelGroupIdPtr)
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183 Dio_LevelType level;
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184 VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_READCHANNELGROUP_ID);
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186 // find address of first port
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187 #if defined(CFG_MPC5554)||defined(CFG_MPC5567)
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188 vuint16_t *ptr = (vuint16_t *)&SIU.GPDI;
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189 #elif defined(CFG_MPC560X)
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190 uint32 *ptr = (uint32 *)&SIU.PGPDI;
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192 uint16 *ptr = (uint16 *)&SIU.PGPDI0; // The GPDI 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths
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195 #if defined(CFG_MPC560X)
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196 if(channelGroupIdPtr->port % 2)
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198 // Get masked values
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199 level = ptr[channelGroupIdPtr->port / 2] & channelGroupIdPtr->mask;
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202 level>>=channelGroupIdPtr->offset;
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206 // Get masked values
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207 level = ptr[channelGroupIdPtr->port / 2] & (channelGroupIdPtr->mask<<16);
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210 level>>=(channelGroupIdPtr->offset + 16);
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213 // Get masked values
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214 level = ptr[channelGroupIdPtr->port] & channelGroupIdPtr->mask;
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217 level<<=channelGroupIdPtr->offset;
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220 #if ( DIO_DEV_ERROR_DETECT == STD_ON )
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226 void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,
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227 Dio_PortLevelType level)
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229 #if defined(CFG_MPC560X)
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230 VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_WRITECHANNELGROUP_ID);
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231 // find address of first port of the masked register
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232 uint32 *ptr = (uint32 *)&SIU.MPGPDO[0]; // modified by Cobb.The GPDI 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths
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234 // Build the 32 bits Mask_Valule, and write to masked output register
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235 ptr[channelGroupIdPtr->port] = (vuint32_t)((((vuint32_t)channelGroupIdPtr->mask )<< 16)|((((vuint16_t)level)<<channelGroupIdPtr->offset)&0xFFFF));
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236 #if ( DIO_DEV_ERROR_DETECT == STD_ON )
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242 #if defined(CFG_MPC5516)
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243 VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_WRITECHANNELGROUP_ID);
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244 // find address of first port of the masked register
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245 uint32 *ptr = (uint32 *)&SIU.MPGPDO0; // The GPDI 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths
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247 // Build the 32 bits Mask_Valule, and write to masked output register
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248 ptr[channelGroupIdPtr->port] = (channelGroupIdPtr->mask << 16)&((level
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249 <<channelGroupIdPtr->offset)|0xFFFF);
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250 #if ( DIO_DEV_ERROR_DETECT == STD_ON )
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