1 /* -------------------------------- Arctic Core ------------------------------
\r
2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
\r
4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
\r
6 * This source code is free software; you can redistribute it and/or modify it
\r
7 * under the terms of the GNU General Public License version 2 as published by the
\r
8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
\r
10 * This program is distributed in the hope that it will be useful, but
\r
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
\r
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
\r
14 * -------------------------------- Arctic Core ------------------------------*/
\r
21 #define SCHM_MF_MEM_PERIOD 20
\r
26 #define SCHM_CYCLE_MAIN (5)
\r
28 #define SCHM_MAINFUNCTION_CYCLE_ADC SCHM_CYCLE_MAIN
\r
29 #define SCHM_MAINFUNCTION_CYCLE_CAN_WRITE SCHM_CYCLE_MAIN
\r
30 #define SCHM_MAINFUNCTION_CYCLE_CAN_READ SCHM_CYCLE_MAIN
\r
31 #define SCHM_MAINFUNCTION_CYCLE_CAN_BUSOFF SCHM_CYCLE_MAIN
\r
32 #define SCHM_MAINFUNCTION_CYCLE_CAN_WAKEUP SCHM_CYCLE_MAIN
\r
33 #define SCHM_MAINFUNCTION_CYCLE_CAN_ERROR SCHM_CYCLE_MAIN
\r
35 #define SCHM_MAINFUNCTION_CYCLE_CANNM SCHM_CYCLE_MAIN
\r
36 #define SCHM_MAINFUNCTION_CYCLE_CANSM SCHM_CYCLE_MAIN
\r
37 #define SCHM_MAINFUNCTION_CYCLE_CANTP SCHM_CYCLE_MAIN
\r
38 #define SCHM_MAINFUNCTION_CYCLE_CANTRCV SCHM_CYCLE_MAIN
\r
39 #define SCHM_MAINFUNCTION_CYCLE_COMRX SCHM_CYCLE_MAIN
\r
40 #define SCHM_MAINFUNCTION_CYCLE_COMTX SCHM_CYCLE_MAIN
\r
41 #define SCHM_MAINFUNCTION_CYCLE_COMM SCHM_CYCLE_MAIN
\r
42 #define SCHM_MAINFUNCTION_CYCLE_DCM SCHM_CYCLE_MAIN
\r
43 #define SCHM_MAINFUNCTION_CYCLE_DEM SCHM_CYCLE_MAIN
\r
44 #define SCHM_MAINFUNCTION_CYCLE_ECUM SCHM_CYCLE_MAIN
\r
45 #define SCHM_MAINFUNCTION_CYCLE_EA SCHM_CYCLE_MAIN
\r
46 #define SCHM_MAINFUNCTION_CYCLE_EEP SCHM_CYCLE_MAIN
\r
47 //#define SCHM_MAINFUNCTION_CYCLE_FEE SCHM_CYCLE_MAIN
\r
48 //#define SCHM_MAINFUNCTION_CYCLE_FLS SCHM_CYCLE_MAIN
\r
49 #define SCHM_MAINFUNCTION_CYCLE_IOHWAB SCHM_CYCLE_MAIN
\r
50 #define SCHM_MAINFUNCTION_CYCLE_NM SCHM_CYCLE_MAIN
\r
51 //#define SCHM_MAINFUNCTION_CYCLE_NvM SCHM_CYCLE_MAIN
\r
52 #define SCHM_MAINFUNCTION_CYCLE_PDUR SCHM_CYCLE_MAIN
\r
53 #define SCHM_MAINFUNCTION_CYCLE_SPI SCHM_CYCLE_MAIN
\r
54 #define SCHM_MAINFUNCTION_CYCLE_WDGM SCHM_CYCLE_MAIN
\r
57 * Schedule BSW memory
\r
60 #define SCHM_MAINFUNCTION_CYCLE_NVM SCHM_CYCLE_MAIN
\r
61 #define SCHM_MAINFUNCTION_CYCLE_FEE SCHM_CYCLE_MAIN
\r
62 #define SCHM_MAINFUNCTION_CYCLE_FLS SCHM_CYCLE_MAIN
\r
65 #endif /*SCHM_CFG_H_*/
\r