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ColdFire MCF548x

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Bootloaders

U-Boot

Current version of U-Boot (u-boot-2011.06-rc2) requires small compilation fixes: 

diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile
--- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile	2011-06-02 23:19:27.000000000 +0200
+++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile	2011-06-03 18:31:05.849143300 +0200
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 # CFLAGS += -DET_DEBUG
 
-LIB	= lib$(CPU).o
+LIB	= $(obj)lib$(CPU).o
 
 START	=
 COBJS	= cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o
diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds
--- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds	2011-06-02 23:19:27.000000000 +0200
+++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds	2011-06-03 18:28:15.013291752 +0200
@@ -56,9 +56,9 @@ SECTIONS
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
     arch/m68k/cpu/mcf547x_8x/start.o		(.text)
-    arch/m68k/lib/traps.o		(.text)
+    /*arch/m68k/lib/traps.o		(.text)
     arch/m68k/lib/interrupts.o	(.text)
-    common/dlmalloc.o		(.text)
+    common/dlmalloc.o		(.text)*/
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)

This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000. 

diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S
--- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S	2011-06-02 23:19:27.000000000 +0200
+++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S	2011-06-05 18:24:40.791112512 +0200
@@ -130,7 +130,7 @@ _start:
 	move.w #0x2700,%sr		/* Mask off Interrupt */
 
 	/* Set vector base register at the beginning of the Flash */
-	move.l	#CONFIG_SYS_FLASH_BASE, %d0
+	move.l	#CONFIG_SYS_TEXT_BASE, %d0
 	movec	%d0, %VBR
 
 	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
@@ -139,8 +139,11 @@ _start:
 	move.l	#(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0
 	movec	%d0, %RAMBAR1
 
+#ifndef CONFIG_SYS_SRAM_BOOT
+	/* Don't do this if we are running from SRAM */
 	move.l	#CONFIG_SYS_MBAR, %d0		/* set MBAR address */
 	move.c	%d0, %MBAR
+#endif
 
 	/* invalidate and disable cache */
 	move.l	#0x01040100, %d0	/* Invalidate cache cmd */
diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk
--- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk	2011-06-02 23:19:27.000000000 +0200
+++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk	2011-06-05 18:05:07.807347260 +0200
@@ -22,4 +22,8 @@
 # MA 02111-1307 USA
 #
 
-CONFIG_SYS_TEXT_BASE = 0xFF800000
+ifdef SRAM_BOOT
+	CONFIG_SYS_TEXT_BASE = 0x01000000
+else
+	CONFIG_SYS_TEXT_BASE = 0xFF800000
+endif
diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c
--- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c	2011-06-02 23:19:27.000000000 +0200
+++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c	2011-06-15 14:45:58.556427667 +0200
@@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)
 	sdram->cfg1 = CONFIG_SYS_SDRAM_CFG1;
 	sdram->cfg2 = CONFIG_SYS_SDRAM_CFG2;
 
+#ifdef CONFIG_SYS_SRAM_BOOT
+	/* This is already done; and MODE_EN in ctrl will be disabled. */
+	return dramsize;
+#endif
+
 	/* Issue PALL */
 	sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 2;
 
 	/* Issue LEMR */
 	sdram->mode = CONFIG_SYS_SDRAM_EMOD;
 	sdram->mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);

 	udelay(500);
 
 	/* Issue PALL */
diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h
--- u-boot-2011.06-rc2/include/configs/M5475EVB.h	2011-06-02 23:19:27.000000000 +0200
+++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h	2011-06-05 18:21:21.431681338 +0200
@@ -239,7 +239,7 @@
 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
 #define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
 
-#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
+#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_TEXT_BASE + 0x400)
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
 
 #define CONFIG_SYS_BOOTPARAMS_LEN	64*1024
diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h
--- u-boot-2011.06-rc2/include/configs/M5485EVB.h	2011-06-02 23:19:27.000000000 +0200
+++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h	2011-06-15 14:29:14.422206634 +0200
@@ -181,8 +181,13 @@
 #define CONFIG_SYS_CLK			CONFIG_SYS_BUSCLK
 #define CONFIG_SYS_CPU_CLK		CONFIG_SYS_CLK * 2
 
-#define CONFIG_SYS_MBAR		0xF0000000
-#define CONFIG_SYS_INTSRAM		(CONFIG_SYS_MBAR + 0x10000)
+#ifndef CONFIG_SYS_SRAM_BOOT
+#define CONFIG_SYS_MBAR		0xF0000000 /* And we use that value because of? */
+#else
+#define CONFIG_SYS_MBAR		0x10000000
+#endif
+
+#define CONFIG_SYS_INTSRAM		(CONFIG_SYS_MBAR + 0x10000) /* ??? */
 #define CONFIG_SYS_INTSRAMSZ		0x8000
 
 /*#define CONFIG_SYS_LATCH_ADDR		(CONFIG_SYS_CS1_BASE + 0x80000)*/
@@ -225,7 +230,7 @@
 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
 #define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
 
-#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
+#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_TEXT_BASE + 0x400)
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
 
 #define CONFIG_SYS_BOOTPARAMS_LEN	64*1024
diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile
--- u-boot-2011.06-rc2/Makefile	2011-06-02 23:19:27.000000000 +0200
+++ u-boot-2011.06-rc2-mod/Makefile	2011-06-15 11:54:54.643463575 +0200
@@ -758,6 +758,45 @@ M5485HFE_config :	unconfig
 	fi
 	@$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale
 
+M5485AFE_SRAM_config \
+M5485BFE_SRAM_config \
+M5485CFE_SRAM_config \
+M5485DFE_SRAM_config \
+M5485EFE_SRAM_config \
+M5485FFE_SRAM_config \
+M5485GFE_SRAM_config \
+M5485HFE_SRAM_config :	unconfig
+	@case "$@" in \
+	M5485AFE_SRAM_config)	BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \
+	M5485BFE_SRAM_config)	BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \
+	M5485CFE_SRAM_config)	BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \
+	M5485DFE_SRAM_config)	BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \
+	M5485EFE_SRAM_config)	BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \
+	M5485FFE_SRAM_config)	BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \
+	M5485GFE_SRAM_config)	BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \
+	M5485HFE_SRAM_config)	BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \
+	esac; \
+	echo "#define CONFIG_SYS_BUSCLK	100000000" > $(obj)include/config.h ; \
+	echo "#define CONFIG_SYS_BOOTSZ	$${BOOT}" >> $(obj)include/config.h ; \
+	echo "#define CONFIG_SYS_DRAMSZ	$${RAM}" >> $(obj)include/config.h ; \
+	echo "#define CONFIG_SYS_SRAM_BOOT" >> $(obj)include/config.h ; \
+	if [ "$${RAM1}" != "0" ] ; then \
+		echo "#define CONFIG_SYS_DRAMSZ1	$${RAM1}" >> $(obj)include/config.h ; \
+	fi; \
+	if [ "$${CODE}" != "0" ] ; then \
+		echo "#define CONFIG_SYS_NOR1SZ	$${CODE}" >> $(obj)include/config.h ; \
+	fi; \
+	if [ "$${VID}" == "1" ] ; then \
+		echo "#define CONFIG_SYS_VIDEO" >> $(obj)include/config.h ; \
+	fi; \
+	if [ "$${USB}" == "1" ] ; then \
+		echo "#define CONFIG_SYS_USBCTRL" >> $(obj)include/config.h ; \
+	fi
+	
+	@$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale
+	#add the ram switch to config.mk
+	echo "SRAM_BOOT = 1" >> $(obj)include/config.mk
+
 #========================================================================
 # ARM
 #========================================================================
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