HW wiki - User contributions [en]

Raspberry Pi

2016-05-26T20:08:50Z

Pisa: /* Running RTEMS Under RPi2 QEMU */

== Raspberry Pi Based Projects ==

* [http://lintarget.sourceforge.net/rpi-motor-control/index.html Raspberry Pi minimal components DC motor servo control]
* [http://lintarget.sourceforge.net/can_bus/index.html The small robotic arm control with use of Simulink CAN blocks with ERT Linux target]

== GNU/Linux Kernel and other Utilities ==

* [https://github.com/ppisa/linux-rpi fully-preemptive Linux kernel for RPi]
* [https://github.com/ppisa/rpi-utils read-only root + overlay and U-boot with DTS]

== GCC Tool-chain for Cross-Compilation ==

There are more suggestion of different arm-gnueabihf toolchains variants to use for cross-build of applications for Raspberry Pi
platform. But all of them which I have easily found do not correctly match ARMv6 BCM2835 target. The unfortunate selection
of ''arm-linux-gnueabihf'' as GNU triplet for Raspbian build clashes with official ''arm-linux-gnueabihf'' tool-chains
which target ARMv7 architecture and produced binaries are less or more incompatible with RPi hardware and GLIBC build.

I have decided to define separate/non-classing GCC architecture ''arm-rpi-linux-gnueabihf'' variant and use original
Raspbian GLIBC binaries to ensure best compatibility for build tool-chain. The simple approach is to put whole Raspbian
root filesystem copy to <tt>/usr/arm-rpi-linux-gnueabihf/sys-root</tt>. The mosts of the files are not required
in fact so reduction to subset of <tt>/lib</tt>, <tt>/lib/arm-linux-gnueabihf</tt>, <tt>/lib/arm-linux-gnueabihf/libnfsidmap</tt>,
<tt>/lib/arm-linux-gnueabihf/security</tt>, <tt>/usr/include</tt>, <tt>/usr/lib</tt>, <tt>/usr/lib/arm-rpi-linux-gnueabihf</tt>
is enough. Other option is to use ''debootstrap'' with correct parameters to install base Raspbian libraries and development files
in <tt>/usr/arm-rpi-linux-gnueabihf/sys-root</tt> directory. Some symbolic links has to be adapted to point correctly
to target files by changing paths to relative. Then <tt>libc.so</tt> prepared for relative paths and cross-compilation needs
to be provided. Create file <tt>/usr/arm-rpi-linux-gnueabihf/lib/libc.so<tt> with next content

<code>
/* GNU ld script
Use the shared library, but some functions are only in
the static library, so try that secondarily. */
OUTPUT_FORMAT(elf32-littlearm)
GROUP ( libc.so.6 libc_nonshared.a AS_NEEDED ( ld-linux.so.3 ) )
</code>

This should be enough for environment for standard binutils and GCC build. ''binutils-2.24'' has been used without any changes.
''gcc-4.9.1'' with statically included ''gmp-5.1.2'', ''mpc-1.0.1'' and ''mpfr-3.1.2'' has been patched by subset
of Debian patches

<code>
alpha-no-ev4-directive.diff
boehm-gc-getnprocs.diff
note-gnu-stack.diff
gcc-target-include-asm.diff
pr57653.diff
pr61046.diff
pr61336.diff
gcc-setmultilib-fix.diff
pr61841.diff
</code>

Then binutils and GCC has been compiled and installed with next configuration

<code>
../../../src/gcc-4.9/configure -v \
--enable-languages=c,c++ \
--prefix=/usr \
--with-system-zlib \
--without-included-gettext \
--enable-threads=posix \
--enable-shared \
--disable-nls \
--enable-clocale=gnu \
--enable-objc-gc \
--enable-mpfr \
--enable-tls \
--enable-secureplt \
--enable-targets=arm-linux-gnu \
--enable-symvers=gnu \
--enable-checking=release \
--build=x86_64-linux-gnu \
--host=x86_64-linux-gnu \
--target=arm-rpi-linux-gnueabihf \
--enable-version-specific-runtime-libs \
--disable-libgomp \
--with-headers=/usr/arm-rpi-linux-gnueabihf/sys-include \
--with-sysroot=/usr/arm-rpi-linux-gnueabihf/sys-root \
\
--enable-linker-build-id \
--enable-libstdcxx-time=yes \
--enable-gnu-unique-object \
--enable-plugin \
--enable-multiarch \
--disable-sjlj-exceptions \
--with-arch=armv6 \
--with-fpu=vfp \
--with-float=hard
</code>

The build binaries for x86_64/amd64 Debian based systems are provided in our [[Cross_compilers|DEB tool-chains collection]]

* http://rtime.felk.cvut.cz/debian/pool/main/b/binutils-2.24/binutils-arm-rpi-linux-gnueabihf_2.24-1_amd64.deb
* http://rtime.felk.cvut.cz/debian/pool/main/g/gcc-4.9.1/gcc-arm-rpi-linux-gnueabihf_4.9.1-1_amd64.deb

== Raspberry Pi JTAG debugguing ==

* RPi JTAG setup documentation http://sysprogs.com/VisualKernel/tutorials/raspberry/jtagsetup/

U-boot commands to enable JTAG pins

<code>
mw.l 0x20200000 0x04a020
mw.l 0x20200008 0x65b6c0
</code>

=== [[FTDI2232_JTAG#PiKRON.27s_JTAG_adapter|FTDI2232 JT_USB5]] RPi Connection and Configuration ===

Interconnection of 10 pin JT_USB5 cable to RPi P1 connector

{| class="wikitable"
! JT_USB5 pin !! Signal !! RPi P1 !! Type !! Description
|-
| 1 || TCK || 22 || Out || Clock Signal Output
|-
| 2 || VREF || 1 || Out || Target voltage reference 3.3 V
|-
| 3 || TDI || 7 || Out || Serial Data Out
|-
| 4 || RTCK || 16 || In/Out || General Purpose I/O
|-
| 5 || TDO || 18 || In || Serial Data In
|-
| 6 || RST || NC || || Reset
|-
| 7 || nTRST || 15 || In/Out || Test system reset
|-
| 8 || GND || 6, 9, 25 || In/Out || Target ground
|-
| 9 || TMS || 13 || Out || Select Signal Out
|-
| 10 || GND || 6, 9, 25 || In/Out || Target ground
|}

<code>
telnet_port 4444
gdb_port 3333

interface ftdi

#ftdi_device_desc "Dual RS232"
ftdi_vid_pid 0x0403 0x6010

ftdi_layout_init 0x0cf8 0x0cfb
ftdi_layout_signal nTRST -data 0x0010 -noe 0x0800
ftdi_layout_signal nSRST -ndata 0x0040 -noe 0x0400

ftdi_layout_signal nTRST -data 0x0010
ftdi_layout_signal nSRST -ndata 0x0040
ftdi_layout_signal LED -ndata 0x0800

transport select jtag

adapter_khz 500

reset_config none

if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME raspi
}

reset_config none

if { [info exists CPU_TAPID ] } {
set _CPU_TAPID $CPU_TAPID
} else {
set _CPU_TAPID 0x07b7617F
}
jtag newtap $_CHIPNAME arm -irlen 5 -expected-id $_CPU_TAPID

set _TARGETNAME $_CHIPNAME.arm
target create $_TARGETNAME arm11 -chain-position $_TARGETNAME

adapter_khz 500

init
</code>

Complete setup with U-boot TFTP based kernel load can be found at

* https://github.com/ppisa/rpi-utils/tree/master/jtag-debug

=== RTEMS Boot with use of U-boot ===

Setup of RTEMS image boot over TFTP with U-boot and static IP address

Copy '''u-boot.bin''' to RPi boot partition and setup first stage loader to run U-boot - i.e. modify '''config.txt''' select

<code>
<pre>
kernel=u-boot.bin
</pre>
</code>

Configure TFTP server on host system and convert binary to U-boot image format
( RTEMS tests applications in ELF format can be found after successful compilation in build samples subdirectory, i.e. for ticker arm-rtems4.11/c/raspberrypi/testsuites/samples/ticker/ticker.exe). Convert that to U-boot image.

<code>
<pre>
arm-rtems4.11-objcopy -R -S --strip-debug -O binary ticker.exe ticker.bin || exit 1
cat ticker.bin | gzip -9 >ticker.gz
mkimage -A arm -O rtems -T kernel -a 0x00008000 -e 0x00008000 -n "RTEMS" -d ticker.gz ticker.img
</pre>
</code>

Copy '''ticker.img''' to TFTP served directory (I use <tt>/srv/tftp/rpi/rtems</tt> on Debian).

Setup U-boot environment. One option is to use '''uEnv.txt''' file on the RPi SD-card boot partition with next content

<code>
<pre>
serverip=192.168.1.10
ipaddr=192.168.1.33
bootargs=place_for_kernel_options
bootcmd=mw.l 0x20200000 0x04a020; mw.l 0x20200008 0x65b6c0; usb start; tftp ${kernel_addr_r} 192.168.1.10:/rpi/rtems/app.img ; bootm ${kernel_addr_r}
</pre>
</code>

This sequence specifies default command invoked by '''boot''' and automatically during startup.
The direct memory locations change is there to enable JTAG debugger pins on P1 connector.

=== Running RTEMS Under RPi2 QEMU ===

RTEMS BSP for RPi2 is configured for actual RTEMS 4.12 development sources

<code>
<pre>
../../../git/rtems/configure --target=arm-rtems4.12 --prefix=/opt/rtems4.12 \
--enable-rtems-inlines --disable-multiprocessing --enable-cxx \
--enable-rdbg --enable-maintainer-mode --enable-tests=samples \
--enable-networking --enable-posix --disable-itron --disable-ada \
--disable-expada --disable-multilib --disable-docs \
--enable-rtemsbsp="raspberrypi2"
</pre>
</code>

QEMU version 2.6 introduces Raspberry Pi BSP support. But QEMU kernel parameter
does not load right plain binary kernel image. But it recognizes and loads and starts
right way U-boot images. The run of RTEMS applications build for RPi2 from
4.12 development GIT works well. The "kimage" U-boot utility has to be installed
on system (Debian package u-boot-tools). Then RTEMS ELF application image can be
prepared and run by QEMU

<code>
<pre>
EXE_NAME=rtems/arm-rtems4.12/c/raspberrypi2/testsuites/samples/ticker/ticker.exe
START_ADDR=0x00008000

arm-rtems4.12-objcopy -R -S --strip-debug -O binary "$EXE_NAME" "$EXE_NAME.bin" || exit 1
cat "$EXE_NAME.bin" | gzip -9 >"$EXE_NAME.gz"
mkimage \
-A arm -O rtems -T kernel -a $START_ADDR -e $START_ADDR -n "RTEMS" \
-d "$EXE_NAME.gz" "$EXE_NAME.img"

qemu-system-arm -M raspi2 \
-serial stdio \
-kernel "$EXE_NAME.img"
</pre>
</code>

=== Debugging RTEMS Under RPi2 QEMU ===

Start QEMU with request to wait for GDB

<code>
<pre>
qemu-system-arm \
-M raspi2 \
-serial stdio \
-s -S
</pre>
</code>

The last two options enable GDB support and stop QEMU
after initialization. I redirect serial line I/O
to console to ease capture and copy pasting.

I have not succeed with RTEMS application load through -kernel
option nor from SDcard (-sd qemu/rpi2-sd.img). I have tried plain
binary. But I have no problem to debug RTEMS start by
GDB which loads ELF application image

I start GDB with application image and qemu-debug-rpi2-app.gdb
command script

<code>
<pre>
arm-elf-gdb -x qemu-debig-rpi2-app.gdb rtems/arm-rtems4.12/c/raspberrypi2/testsuites/samples/ticker/ticker.exe
</pre>
</code>

The "qemu-debug-rpi2-app.gdb" script content is

<code>
<pre>
target remote localhost:1234
hbreak *0x0

# set breakpoint to the location where application
# is expected and QEMU jumps after initialization
hbreak *0x8000
c
# continue initialization till breakpoint at 0x8000
# is reached

# load RTEMS ELF application image
load
# set breakpoints to catch fatal exceptions
hbreak *0x0004
hbreak *0x0008
hbreak *0x000C
hbreak *0x0010
hbreak *0x001C

set $pc=0x8000
# set breakpoints of interrest for debugging
hbreak bsp_start_hook_0
hbreak bsp_start_hook_1
</pre>
</code>

GDB starts, sets breakpoint at 0x8000 and releases QEMU
from initial wait for GDB. QEMU/ARM CPU initializes and executes
till it jumps to 0x8000 and stops on breakpoint.
This returns control back to GDB. It loads application
image and sets breakpoints and waits for user.
You can step through code (si,s,ni,n commands) or let
it run at "full" emulated speed (c). It stops
at predefined breakpoints and state can be examined.

Raspberry Pi

2016-05-26T20:03:01Z

Pisa: RTEMS Rsapberry Pi 2 BSP debugging under QEMU

== Raspberry Pi Based Projects ==

* [http://lintarget.sourceforge.net/rpi-motor-control/index.html Raspberry Pi minimal components DC motor servo control]
* [http://lintarget.sourceforge.net/can_bus/index.html The small robotic arm control with use of Simulink CAN blocks with ERT Linux target]

== GNU/Linux Kernel and other Utilities ==

* [https://github.com/ppisa/linux-rpi fully-preemptive Linux kernel for RPi]
* [https://github.com/ppisa/rpi-utils read-only root + overlay and U-boot with DTS]

== GCC Tool-chain for Cross-Compilation ==

There are more suggestion of different arm-gnueabihf toolchains variants to use for cross-build of applications for Raspberry Pi
platform. But all of them which I have easily found do not correctly match ARMv6 BCM2835 target. The unfortunate selection
of ''arm-linux-gnueabihf'' as GNU triplet for Raspbian build clashes with official ''arm-linux-gnueabihf'' tool-chains
which target ARMv7 architecture and produced binaries are less or more incompatible with RPi hardware and GLIBC build.

I have decided to define separate/non-classing GCC architecture ''arm-rpi-linux-gnueabihf'' variant and use original
Raspbian GLIBC binaries to ensure best compatibility for build tool-chain. The simple approach is to put whole Raspbian
root filesystem copy to <tt>/usr/arm-rpi-linux-gnueabihf/sys-root</tt>. The mosts of the files are not required
in fact so reduction to subset of <tt>/lib</tt>, <tt>/lib/arm-linux-gnueabihf</tt>, <tt>/lib/arm-linux-gnueabihf/libnfsidmap</tt>,
<tt>/lib/arm-linux-gnueabihf/security</tt>, <tt>/usr/include</tt>, <tt>/usr/lib</tt>, <tt>/usr/lib/arm-rpi-linux-gnueabihf</tt>
is enough. Other option is to use ''debootstrap'' with correct parameters to install base Raspbian libraries and development files
in <tt>/usr/arm-rpi-linux-gnueabihf/sys-root</tt> directory. Some symbolic links has to be adapted to point correctly
to target files by changing paths to relative. Then <tt>libc.so</tt> prepared for relative paths and cross-compilation needs
to be provided. Create file <tt>/usr/arm-rpi-linux-gnueabihf/lib/libc.so<tt> with next content

<code>
/* GNU ld script
Use the shared library, but some functions are only in
the static library, so try that secondarily. */
OUTPUT_FORMAT(elf32-littlearm)
GROUP ( libc.so.6 libc_nonshared.a AS_NEEDED ( ld-linux.so.3 ) )
</code>

This should be enough for environment for standard binutils and GCC build. ''binutils-2.24'' has been used without any changes.
''gcc-4.9.1'' with statically included ''gmp-5.1.2'', ''mpc-1.0.1'' and ''mpfr-3.1.2'' has been patched by subset
of Debian patches

<code>
alpha-no-ev4-directive.diff
boehm-gc-getnprocs.diff
note-gnu-stack.diff
gcc-target-include-asm.diff
pr57653.diff
pr61046.diff
pr61336.diff
gcc-setmultilib-fix.diff
pr61841.diff
</code>

Then binutils and GCC has been compiled and installed with next configuration

<code>
../../../src/gcc-4.9/configure -v \
--enable-languages=c,c++ \
--prefix=/usr \
--with-system-zlib \
--without-included-gettext \
--enable-threads=posix \
--enable-shared \
--disable-nls \
--enable-clocale=gnu \
--enable-objc-gc \
--enable-mpfr \
--enable-tls \
--enable-secureplt \
--enable-targets=arm-linux-gnu \
--enable-symvers=gnu \
--enable-checking=release \
--build=x86_64-linux-gnu \
--host=x86_64-linux-gnu \
--target=arm-rpi-linux-gnueabihf \
--enable-version-specific-runtime-libs \
--disable-libgomp \
--with-headers=/usr/arm-rpi-linux-gnueabihf/sys-include \
--with-sysroot=/usr/arm-rpi-linux-gnueabihf/sys-root \
\
--enable-linker-build-id \
--enable-libstdcxx-time=yes \
--enable-gnu-unique-object \
--enable-plugin \
--enable-multiarch \
--disable-sjlj-exceptions \
--with-arch=armv6 \
--with-fpu=vfp \
--with-float=hard
</code>

The build binaries for x86_64/amd64 Debian based systems are provided in our [[Cross_compilers|DEB tool-chains collection]]

* http://rtime.felk.cvut.cz/debian/pool/main/b/binutils-2.24/binutils-arm-rpi-linux-gnueabihf_2.24-1_amd64.deb
* http://rtime.felk.cvut.cz/debian/pool/main/g/gcc-4.9.1/gcc-arm-rpi-linux-gnueabihf_4.9.1-1_amd64.deb

== Raspberry Pi JTAG debugguing ==

* RPi JTAG setup documentation http://sysprogs.com/VisualKernel/tutorials/raspberry/jtagsetup/

U-boot commands to enable JTAG pins

<code>
mw.l 0x20200000 0x04a020
mw.l 0x20200008 0x65b6c0
</code>

=== [[FTDI2232_JTAG#PiKRON.27s_JTAG_adapter|FTDI2232 JT_USB5]] RPi Connection and Configuration ===

Interconnection of 10 pin JT_USB5 cable to RPi P1 connector

{| class="wikitable"
! JT_USB5 pin !! Signal !! RPi P1 !! Type !! Description
|-
| 1 || TCK || 22 || Out || Clock Signal Output
|-
| 2 || VREF || 1 || Out || Target voltage reference 3.3 V
|-
| 3 || TDI || 7 || Out || Serial Data Out
|-
| 4 || RTCK || 16 || In/Out || General Purpose I/O
|-
| 5 || TDO || 18 || In || Serial Data In
|-
| 6 || RST || NC || || Reset
|-
| 7 || nTRST || 15 || In/Out || Test system reset
|-
| 8 || GND || 6, 9, 25 || In/Out || Target ground
|-
| 9 || TMS || 13 || Out || Select Signal Out
|-
| 10 || GND || 6, 9, 25 || In/Out || Target ground
|}

<code>
telnet_port 4444
gdb_port 3333

interface ftdi

#ftdi_device_desc "Dual RS232"
ftdi_vid_pid 0x0403 0x6010

ftdi_layout_init 0x0cf8 0x0cfb
ftdi_layout_signal nTRST -data 0x0010 -noe 0x0800
ftdi_layout_signal nSRST -ndata 0x0040 -noe 0x0400

ftdi_layout_signal nTRST -data 0x0010
ftdi_layout_signal nSRST -ndata 0x0040
ftdi_layout_signal LED -ndata 0x0800

transport select jtag

adapter_khz 500

reset_config none

if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME raspi
}

reset_config none

if { [info exists CPU_TAPID ] } {
set _CPU_TAPID $CPU_TAPID
} else {
set _CPU_TAPID 0x07b7617F
}
jtag newtap $_CHIPNAME arm -irlen 5 -expected-id $_CPU_TAPID

set _TARGETNAME $_CHIPNAME.arm
target create $_TARGETNAME arm11 -chain-position $_TARGETNAME

adapter_khz 500

init
</code>

Complete setup with U-boot TFTP based kernel load can be found at

* https://github.com/ppisa/rpi-utils/tree/master/jtag-debug

=== RTEMS Boot with use of U-boot ===

Setup of RTEMS image boot over TFTP with U-boot and static IP address

Copy '''u-boot.bin''' to RPi boot partition and setup first stage loader to run U-boot - i.e. modify '''config.txt''' select

<code>
<pre>
kernel=u-boot.bin
</pre>
</code>

Configure TFTP server on host system and convert binary to U-boot image format
( RTEMS tests applications in ELF format can be found after successful compilation in build samples subdirectory, i.e. for ticker arm-rtems4.11/c/raspberrypi/testsuites/samples/ticker/ticker.exe). Convert that to U-boot image.

<code>
<pre>
arm-rtems4.11-objcopy -R -S --strip-debug -O binary ticker.exe ticker.bin || exit 1
cat ticker.bin | gzip -9 >ticker.gz
mkimage -A arm -O rtems -T kernel -a 0x00008000 -e 0x00008000 -n "RTEMS" -d ticker.gz ticker.img
</pre>
</code>

Copy '''ticker.img''' to TFTP served directory (I use <tt>/srv/tftp/rpi/rtems</tt> on Debian).

Setup U-boot environment. One option is to use '''uEnv.txt''' file on the RPi SD-card boot partition with next content

<code>
<pre>
serverip=192.168.1.10
ipaddr=192.168.1.33
bootargs=place_for_kernel_options
bootcmd=mw.l 0x20200000 0x04a020; mw.l 0x20200008 0x65b6c0; usb start; tftp ${kernel_addr_r} 192.168.1.10:/rpi/rtems/app.img ; bootm ${kernel_addr_r}
</pre>
</code>

This sequence specifies default command invoked by '''boot''' and automatically during startup.
The direct memory locations change is there to enable JTAG debugger pins on P1 connector.

=== Running RTEMS Under RPi2 QEMU ===

RTEMS BSP for RPi2 is configured for actual RTEMS 4.12 development sources

<code>
<pre>
../../../git/rtems/configure --target=arm-rtems4.12 --prefix=/opt/rtems4.12 \
--enable-rtems-inlines --disable-multiprocessing --enable-cxx \
--enable-rdbg --enable-maintainer-mode --enable-tests=samples \
--enable-networking --enable-posix --disable-itron --disable-ada \
--disable-expada --disable-multilib --disable-docs \
--enable-rtemsbsp="raspberrypi2"
</pre>
</code>

QEMU version 2.6 introduces Raspberry Pi BSP support. But QEMU kernel parameter
does not load right plain binary kernel image. But it recognizes and loads and starts
right way U-boot images. The run of RTEMS applications build for RPi2 from
4.12 development GIT works well. The "kimage" U-boot utility has to be installed
on system (Debian package u-boot-tools). Then RTEMS ELF application image can be
prepared and run by QEMU

<code>
<pre>
EXE_NAME=rtems/arm-rtems4.12/c/raspberrypi2/testsuites/samples/ticker/ticker.exe

arm-rtems4.12-objcopy -R -S --strip-debug -O binary "$EXE_NAME" "$EXE_NAME.bin" || exit 1
cat "$EXE_NAME.bin" | gzip -9 >"$EXE_NAME.gz"
mkimage \
-A arm -O rtems -T kernel -a $START_ADDR -e $START_ADDR -n "RTEMS" \
-d "$EXE_NAME.gz" "$EXE_NAME.img"

qemu-system-arm -M raspi2 \
-serial stdio \
-kernel "$EXE_NAME.img"
</pre>
</code>

=== Debugging RTEMS Under RPi2 QEMU ===

Start QEMU with request to wait for GDB

<code>
<pre>
qemu-system-arm \
-M raspi2 \
-serial stdio \
-s -S
</pre>
</code>

The last two options enable GDB support and stop QEMU
after initialization. I redirect serial line I/O
to console to ease capture and copy pasting.

I have not succeed with RTEMS application load through -kernel
option nor from SDcard (-sd qemu/rpi2-sd.img). I have tried plain
binary. But I have no problem to debug RTEMS start by
GDB which loads ELF application image

I start GDB with application image and qemu-debug-rpi2-app.gdb
command script

<code>
<pre>
arm-elf-gdb -x qemu-debig-rpi2-app.gdb rtems/arm-rtems4.12/c/raspberrypi2/testsuites/samples/ticker/ticker.exe
</pre>
</code>

The "qemu-debug-rpi2-app.gdb" script content is

<code>
<pre>
target remote localhost:1234
hbreak *0x0

# set breakpoint to the location where application
# is expected and QEMU jumps after initialization
hbreak *0x8000
c
# continue initialization till breakpoint at 0x8000
# is reached

# load RTEMS ELF application image
load
# set breakpoints to catch fatal exceptions
hbreak *0x0004
hbreak *0x0008
hbreak *0x000C
hbreak *0x0010
hbreak *0x001C

set $pc=0x8000
# set breakpoints of interrest for debugging
hbreak bsp_start_hook_0
hbreak bsp_start_hook_1
</pre>
</code>

GDB starts, sets breakpoint at 0x8000 and releases QEMU
from initial wait for GDB. QEMU/ARM CPU initializes and executes
till it jumps to 0x8000 and stops on breakpoint.
This returns control back to GDB. It loads application
image and sets breakpoints and waits for user.
You can step through code (si,s,ni,n commands) or let
it run at "full" emulated speed (c). It stops
at predefined breakpoints and state can be examined.

Zynq

2016-05-24T23:53:42Z

Pisa:

* Linux kenrel for Xilinx Zynq http://rtime.felk.cvut.cz/gitweb/zynq/linux.git

* Configs, Makefiles etc. for Linux on Xilinx Zynq http://rtime.felk.cvut.cz/gitweb/zynq/linux-build.git

* eLinux Wiki Zynq category http://elinux.org/Category:Zynq

* Toolchain for Debian or Ubuntu

echo "deb http://debian.pengutronix.de/debian/ sid main contrib non-free" >/etc/apt/sources.list.d/pengutronix.list
aptitude update
aptitude install oselas.toolchain-2014.12.2-arm-cortexa8-linux-gnueabihf-gcc-4.9.2-glibc-2.20-binutils-2.24-kernel-3.16-sanitized

Build kernel

mkdir zynq
git clone git://rtime.felk.cvut.cz/zynq/linux-build.git
cd linux-build
git submodule update --init

Check that toolchain location matches CROSS_COMPILE variable in [http://rtime.felk.cvut.cz/gitweb/zynq/linux-build.git/blob/refs/heads/master:/build/xlnx_4.0.8-rt6/linux/GNUmakefile build/xlnx_4.0.8-rt6/linux/GNUmakefile]. Then invoke

cd build/xlnx_4.0.8-rt6/linux/
make

U-boot arguments for MicroZed board

bootargs=root=/dev/mmcblk0p2 rw console=ttyPS1,115200 earlyprintk

Install Debian ARMhf distribution to the media on x86 host with use of chroot and qemu

Preparation of FPGA configuration files for direct FPGA configuration by Linux or U-boot requires to prepare <code>system.bif</code>:

all:
{
system.bit
}

then <code>bootgen</code> is used to prepare binary file

bootgen -image system.bif -w -process_bitstream bin

Runtime FPGA reconfiguration

cat system.bit.bin > /dev/xdevcfg

=== Debian Linux Install ===

Debootstrap on x86 system

Install

apt-get install binfmt-support qemu qemu-user-static debootstrap

Create directory for target system

mkdir debian_armhf

debootstrap --arch=armhf --foreign --include=debian-keyring,mc,libc6-de,libstdc ++6,busybox,aptitude jessie debian-armhf/ ftp://ftp.cz.debian.org/debian/

Install static version of QEMU which is able to interpret target architecture userspace programs

cp /usr/bin/qemu-arm-static debian_armhf/usr/bin

Finish the second stage of deboostrap

LC_ALL=C LANGUAGE=C LANG=C chroot debian_armhf /debootstrap/debootstrap --second-stage
LC_ALL=C LANGUAGE=C LANG=C chroot debian_armhf dpkg --configure -a

Zynq

2016-05-20T11:07:32Z

Pisa:

Zynq

2016-05-20T11:04:01Z

Pisa:

Zynq

2016-05-07T21:34:48Z

Pisa:

Zynq

2016-05-07T21:33:26Z

Pisa:

A0B36APO Virtual Hardware

2016-05-02T00:27:58Z

Pisa: Update links to APO subject pages

[[File:apo_bazmek.jpg|thumb|right|Simple terminal used by students]]

[https://cw.fel.cvut.cz/wiki/courses/a0b36apo/start A0B36APO] (Architektury pocitacu -- Computer architectures) is a course taught by [http://cs.felk.cvut.cz/webis/courses.html Department of Computer Science and Engineering] and [http://dce.fel.cvut.cz/ Department of Control Engineering].

Students [https://cw.fel.cvut.cz/wiki/courses/a0b36apo/tutorials/10/start have to work with specialized hardware]. This page describes how to use the virtual implementation of the specialized hardware -- this can help students to work at home without the access to the real hardware.

=== Qemu ===
[https://en.wikipedia.org/wiki/Qemu Qemu] is a processor emulator which enables to run separate Operating System on Virtual Hardware.

== APOHW ==
APOHW comprises PCIe I/O card and Simple terminal (keyboard + text LCD).

[[File:apo_diagr.png|800px]]

= Using APOHW =
How to obtain the source code:
git clone git://github.com/CTU-IIG/qemu.git -b apohw

How to compile it:
./configure --enable-system --target-list=i386-softmmu --enable-sdl --enable-kvm

make

''To compile Qemu on bare Ubuntu 12.04, you will need to install zlib1g-dev, libglib2.0-dev, libsdl1.2-dev''

How to run it:
./i386-softmmu/qemu-system-i386 -device apohw \
-hda ../../debian_lenny_i386_standard.qcow2 \
--boot c \
-enable-kvm

You need to have some [http://blog.aurel32.net/46 image file with GNU/Linux installed on it]. KVM command is optional.

In another terminal then run:
telnet localhost 55555
... and perceive the miracle

= What is not implemented =
* Proper timing features of the hardware
* I/O card is PCI, not PCIe -- however memory access is the same.
* HD44780 does not support 4bit access
* HD44780 does not support display shifting
* HD44780 does not support editable CGRAM
* Buzzer

=== Bugs ===
Bug reports please send to lisovy@gmail.com

=== Useful links ===
[http://web.alfredstate.edu/weimandn/lcd/lcd_addressing/lcd_addressing_index.html HD44780 DDRAM explained]

[https://lwn.net/images/pdf/LDD3/ch12.pdf PCI drivers on Linux]

Zynq

2016-04-29T13:20:02Z

Pisa:

Zynq

2016-04-25T17:01:50Z

Pisa: Created page with " * Linux kenrel for Xilinx Zynq http://rtime.felk.cvut.cz/gitweb/zynq/linux.git * Configs, Makefiles etc. for Linux on Xilinx Zynq http://rtime.felk.cvut.cz/gitweb/zynq/linux..."

Template:Main Page/Hardware

2016-04-25T16:56:40Z

Pisa: /* Hardware */

== Hardware ==

* [[A0B36APO Virtual Hardware]]
* [[Alpha PWS500a]]
* [[AT91SAM7X256]]
* [[Boa5200]]
* [[ColdFire_DEMO52233 | ColdFire DEMO52233 (Board from Freescale)]]
* [[ColdFire_MCF548x | ColdFire MCF548x (resources and experiments)]]
* [[Dell XPS12]]
* [[FPGA]]
* [[FTDI2232 JTAG]]
* [[H8S/2638]]
* [[HC12 | Motorola HC12]]
* [[Humusoft MF6xx]]
* [[LX CPU1]]
* [[LPC21xx]]
* [[MIDAM MPC5200 DB1]] (Mikroklima)
* [[ML403 | ML403 Xilinx Virtex-4]]
* [[MSP430F5529 Launchpad]]
* [[NetFPGA]]
* [[OJ10 - welding robot]]
* [[PiMX1]] i.MX1 processor based board
* [[Raspberry Pi]] (RPi, BCM2835)
* [[STM32 VLDISCOVERY]]
* [[TC1798|TC1798 - Infineon AUDO MAX]]
* [[TMS570LS3137]]
* [[USB2CAN 8devices]]
* [[Wireless_Sensor_Networks | Wireless Sensor Networks (WSNs)]]
* [[XC2S100-kit|Xilinx Spartan II XC2S100 Demo Board]]
* [[XC2V1000-kit|Xilinx Virtex II XC2V1000 Demo Board]]
* [[Zynq|Xilinx Zynq-7000]]

TMS570LS3137

2015-07-20T15:59:53Z

Pisa: /* RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) */

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

=== NHET Assembler ===

http://www.ti.com/tool/nhet-assembler

Installer doesn't work under Wine (Debian unstable, wine-1.6.2) even after installing the following packages, which wine complained about: <tt>apt-get install p11-kit-modules:i386 gnome-keyring:i386</tt>

If it is installed under windows, the resulting ''hetp.exe'' runs under Wine correctly.

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1?? || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver) base = <tt>0xfff7e500</tt>
* On RPP board SCILIN is is used for terminal connection base = <tt>0xfff7e400</tt>
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in addition, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

=== OpenOCD setup and Flashing ===

Consult [[FTDI2232_JTAG]] page for generic OpenOCD setup for ARM targets debugging.

The OpenOCD TMS570 Flash support developed by Andrey Smirnov can be found
in OpenOCD Gerrit [http://openocd.zylin.com/#/c/2214/ http://openocd.zylin.com/#/c/2214/]

Patches with our corrections to the support have been sent to the OpenOCD
mailing-list. The complete OpenOCD sources with all required patches applied
([http://cmp.felk.cvut.cz/~pisa/tms570/ openocd-tms570-f021-wip.tar.gz]) can be found at temporal place

[http://cmp.felk.cvut.cz/~pisa/tms570/ http://cmp.felk.cvut.cz/~pisa/tms570/]

As a base for OpenOCD configuration for the TMS570 target can be used

[https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd]

The example of Flash erase and write OpenOCD commands

flash banks
flash list
# probe bank/target for actual flash size
flash probe 0
# updated information about banks
flash banks

# erase one 128kB sector starting at 1MB
flash erase_address 0x00100000 0x00020000

# test Flash write using fill pattern
flash fillw 0x00100000 0xabcd1234 128

# Check memory content
mdw 0x00100000 256

Program application starting at zero address

# probe bank/target for actual flash size
flash probe 0

# Erase the first 256kB of Flash
flash erase_address 0x00000000 0x00040000

# Program application
program application.elf

Program binary image starting at 256kB boundary and maximal length 1MB

# probe bank/target for actual flash size
flash probe 0

# Erase the area after the first 256kB of Flash
flash erase_address 0x00040000 0x00100000

# Program application
program application.bin 0x00040000

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* https://devel.rtems.org/wiki/TBR/BSP/Tms570
* https://devel.rtems.org/wiki/GSoC/2014/PortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

Raspberry Pi

2015-07-20T14:48:41Z

Pisa: /* FTDI2232 JT_USB5 RPi Connection and Configuration */

Raspberry Pi

2015-07-20T14:48:06Z

Pisa: Raspberry Pi TFTP based kernel load with JTAG enabled

TMS570LS3137

2015-07-20T14:16:22Z

Pisa: /* SCI port */

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

=== NHET Assembler ===

http://www.ti.com/tool/nhet-assembler

Installer doesn't work under Wine (Debian unstable, wine-1.6.2) even after installing the following packages, which wine complained about: <tt>apt-get install p11-kit-modules:i386 gnome-keyring:i386</tt>

If it is installed under windows, the resulting ''hetp.exe'' runs under Wine correctly.

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1?? || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver) base = <tt>0xfff7e500</tt>
* On RPP board SCILIN is is used for terminal connection base = <tt>0xfff7e400</tt>
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in addition, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

=== OpenOCD setup and Flashing ===

Consult [[FTDI2232_JTAG]] page for generic OpenOCD setup for ARM targets debugging.

The OpenOCD TMS570 Flash support developed by Andrey Smirnov can be found
in OpenOCD Gerrit [http://openocd.zylin.com/#/c/2214/ http://openocd.zylin.com/#/c/2214/]

Patches with our corrections to the support have been sent to the OpenOCD
mailing-list. The complete OpenOCD sources with all required patches applied
([http://cmp.felk.cvut.cz/~pisa/tms570/ openocd-tms570-f021-wip.tar.gz]) can be found at temporal place

[http://cmp.felk.cvut.cz/~pisa/tms570/ http://cmp.felk.cvut.cz/~pisa/tms570/]

As a base for OpenOCD configuration for the TMS570 target can be used

[https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd]

The example of Flash erase and write OpenOCD commands

flash banks
flash list
# probe bank/target for actual flash size
flash probe 0
# updated information about banks
flash banks

# erase one 128kB sector starting at 1MB
flash erase_address 0x00100000 0x00020000

# test Flash write using fill pattern
flash fillw 0x00100000 0xabcd1234 128

# Check memory content
mdw 0x00100000 256

Program application starting at zero address

# probe bank/target for actual flash size
flash probe 0

# Erase the first 256kB of Flash
flash erase_address 0x00000000 0x00040000

# Program application
program application.elf

Program binary image starting at 256kB boundary and maximal length 1MB

# probe bank/target for actual flash size
flash probe 0

# Erase the area after the first 256kB of Flash
flash erase_address 0x00040000 0x00100000

# Program application
program application.bin 0x00040000

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://www.rtems.org/wiki/index.php/Tms570
* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2015-07-20T14:15:34Z

Pisa: Remark about TMS570 SCI use on RPP

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

=== NHET Assembler ===

http://www.ti.com/tool/nhet-assembler

Installer doesn't work under Wine (Debian unstable, wine-1.6.2) even after installing the following packages, which wine complained about: <tt>apt-get install p11-kit-modules:i386 gnome-keyring:i386</tt>

If it is installed under windows, the resulting ''hetp.exe'' runs under Wine correctly.

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1?? || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver) base = <tt>0xfff7e400</tt>
* On RPP board SCILIN is is used for terminal connection base = <tt>0xfff7e500</tt>
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in addition, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

=== OpenOCD setup and Flashing ===

Consult [[FTDI2232_JTAG]] page for generic OpenOCD setup for ARM targets debugging.

The OpenOCD TMS570 Flash support developed by Andrey Smirnov can be found
in OpenOCD Gerrit [http://openocd.zylin.com/#/c/2214/ http://openocd.zylin.com/#/c/2214/]

Patches with our corrections to the support have been sent to the OpenOCD
mailing-list. The complete OpenOCD sources with all required patches applied
([http://cmp.felk.cvut.cz/~pisa/tms570/ openocd-tms570-f021-wip.tar.gz]) can be found at temporal place

[http://cmp.felk.cvut.cz/~pisa/tms570/ http://cmp.felk.cvut.cz/~pisa/tms570/]

As a base for OpenOCD configuration for the TMS570 target can be used

[https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd]

The example of Flash erase and write OpenOCD commands

flash banks
flash list
# probe bank/target for actual flash size
flash probe 0
# updated information about banks
flash banks

# erase one 128kB sector starting at 1MB
flash erase_address 0x00100000 0x00020000

# test Flash write using fill pattern
flash fillw 0x00100000 0xabcd1234 128

# Check memory content
mdw 0x00100000 256

Program application starting at zero address

# probe bank/target for actual flash size
flash probe 0

# Erase the first 256kB of Flash
flash erase_address 0x00000000 0x00040000

# Program application
program application.elf

Program binary image starting at 256kB boundary and maximal length 1MB

# probe bank/target for actual flash size
flash probe 0

# Erase the area after the first 256kB of Flash
flash erase_address 0x00040000 0x00100000

# Program application
program application.bin 0x00040000

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://www.rtems.org/wiki/index.php/Tms570
* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

Raspberry Pi

2015-07-20T13:41:35Z

Pisa: Description of U-boot load of RTEMS application image.

Raspberry Pi

2015-07-19T20:56:13Z

Pisa: /* = FTDI2232 JT_USB5 RPi Connection and Configuration */

Raspberry Pi

2015-07-19T20:55:49Z

Pisa: JTAG to Raspberry Pi connection and config

A0B36APO Virtual Hardware

2015-05-07T08:48:23Z

Pisa: Update location of QEMU with integrated APOHW support.

[[File:apo_bazmek.jpg|thumb|right|Simple terminal used by students]]

[https://edux.feld.cvut.cz/courses/A0B36APO/start A0B36APO] (Architektury pocitacu -- Computer architectures) is a course taught by [http://cs.felk.cvut.cz/webis/courses.html Department of Computer Science and Engineering] and [http://dce.fel.cvut.cz/ Department of Control Engineering].

Students [https://edux.feld.cvut.cz/courses/A0B36APO/tutorials/10/start have to work with specialized hardware]. This page describes how to use the virtual implementation of the specialized hardware -- this can help students to work at home without the access to the real hardware.

=== Qemu ===
[https://en.wikipedia.org/wiki/Qemu Qemu] is a processor emulator which enables to run separate Operating System on Virtual Hardware.

== APOHW ==
APOHW comprises PCIe I/O card and Simple terminal (keyboard + text LCD).

[[File:apo_diagr.png|800px]]

= Using APOHW =
How to obtain the source code:
git clone git://github.com/CTU-IIG/qemu.git -b apohw

How to compile it:
./configure --enable-system --target-list=i386-softmmu --enable-sdl --enable-kvm

make

''To compile Qemu on bare Ubuntu 12.04, you will need to install zlib1g-dev, libglib2.0-dev, libsdl1.2-dev''

How to run it:
./i386-softmmu/qemu-system-i386 -device apohw \
-hda ../../debian_lenny_i386_standard.qcow2 \
--boot c \
-enable-kvm

You need to have some [http://blog.aurel32.net/46 image file with GNU/Linux installed on it]. KVM command is optional.

In another terminal then run:
telnet localhost 55555
... and perceive the miracle

= What is not implemented =
* Proper timing features of the hardware
* I/O card is PCI, not PCIe -- however memory access is the same.
* HD44780 does not support 4bit access
* HD44780 does not support display shifting
* HD44780 does not support editable CGRAM
* Buzzer

=== Bugs ===
Bug reports please send to lisovy@gmail.com

=== Useful links ===
[http://web.alfredstate.edu/weimandn/lcd/lcd_addressing/lcd_addressing_index.html HD44780 DDRAM explained]

[https://lwn.net/images/pdf/LDD3/ch12.pdf PCI drivers on Linux]

Raspberry Pi

2015-03-15T23:02:54Z

Pisa:

Raspberry Pi

2015-03-15T23:02:29Z

Pisa: Pointers to RPi repositories

Raspberry Pi

2014-10-16T10:19:03Z

Pisa:

Raspberry Pi

2014-10-16T10:18:26Z

Pisa:

Raspberry Pi

2014-10-16T10:17:25Z

Pisa: Raspberry Pi projects and toolchain

Template:Main Page/Hardware

2014-10-16T09:42:19Z

Pisa:

== Hardware ==

* [[A0B36APO Virtual Hardware]]
* [[Alpha PWS500a]]
* [[AT91SAM7X256]]
* [[Boa5200]]
* [[ColdFire_DEMO52233 | ColdFire DEMO52233 (Board from Freescale)]]
* [[ColdFire_MCF548x | ColdFire MCF548x (resources and experiments)]]
* [[Dell XPS12]]
* [[FPGA]]
* [[FTDI2232 JTAG]]
* [[H8S/2638]]
* [[HC12 | Motorola HC12]]
* [[Humusoft MF6xx]]
* [[LX CPU1]]
* [[LPC21xx]]
* [[MIDAM MPC5200 DB1]] (Mikroklima)
* [[ML403 | ML403 Xilinx Virtex-4]]
* [[MSP430F5529 Launchpad]]
* [[OJ10 - welding robot]]
* [[PiMX1]] i.MX1 processor based board
* [[Raspberry Pi]] (RPi, BCM2835)
* [[STM32 VLDISCOVERY]]
* [[TC1798|TC1798 - Infineon AUDO MAX]]
* [[TMS570LS3137]]
* [[Wireless_Sensor_Networks | Wireless Sensor Networks (WSNs)]]
* [[XC2S100-kit|Xilinx Spartan II XC2S100 Demo Board]]
* [[XC2V1000-kit|Xilinx Virtex II XC2V1000 Demo Board]]

Template:Main Page/Hardware

2014-10-16T09:41:06Z

Pisa:

== Hardware ==

* [[A0B36APO Virtual Hardware]]
* [[Alpha PWS500a]]
* [[AT91SAM7X256]]
* [[Boa5200]]
* [[ColdFire_DEMO52233 | ColdFire DEMO52233 (Board from Freescale)]]
* [[ColdFire_MCF548x | ColdFire MCF548x (resources and experiments)]]
* [[Dell XPS12]]
* [[FPGA]]
* [[FTDI2232 JTAG]]
* [[H8S/2638]]
* [[HC12 | Motorola HC12]]
* [[Humusoft MF6xx]]
* [[LX CPU1]]
* [[LPC21xx]]
* [[MIDAM MPC5200 DB1]] (Mikroklima)
* [[ML403 | ML403 Xilinx Virtex-4]]
* [[MSP430F5529 Launchpad]]
* [[OJ10 - welding robot]]
* [[PiMX1]] i.MX1 processor based board
* [[Raspberry Pi]] (RPi)
* [[STM32 VLDISCOVERY]]
* [[TC1798|TC1798 - Infineon AUDO MAX]]
* [[TMS570LS3137]]
* [[Wireless_Sensor_Networks | Wireless Sensor Networks (WSNs)]]
* [[XC2S100-kit|Xilinx Spartan II XC2S100 Demo Board]]
* [[XC2V1000-kit|Xilinx Virtex II XC2V1000 Demo Board]]

Template:Main Page/Hardware

2014-10-16T09:40:09Z

Pisa: /* Hardware */

== Hardware ==

* [[A0B36APO Virtual Hardware]]
* [[Alpha PWS500a]]
* [[AT91SAM7X256]]
* [[Boa5200]]
* [[ColdFire_DEMO52233 | ColdFire DEMO52233 (Board from Freescale)]]
* [[ColdFire_MCF548x | ColdFire MCF548x (resources and experiments)]]
* [[Dell XPS12]]
* [[FPGA]]
* [[FTDI2232 JTAG]]
* [[H8S/2638]]
* [[HC12 | Motorola HC12]]
* [[Humusoft MF6xx]]
* [[LX CPU1]]
* [[LPC21xx]]
* [[MIDAM MPC5200 DB1]] (Mikroklima)
* [[ML403 | ML403 Xilinx Virtex-4]]
* [[MSP430F5529 Launchpad]]
* [[OJ10 - welding robot]]
* [[PiMX1]] i.MX1 processor based board
* [[RaspberryPi]]
* [[STM32 VLDISCOVERY]]
* [[TC1798|TC1798 - Infineon AUDO MAX]]
* [[TMS570LS3137]]
* [[Wireless_Sensor_Networks | Wireless Sensor Networks (WSNs)]]
* [[XC2S100-kit|Xilinx Spartan II XC2S100 Demo Board]]
* [[XC2V1000-kit|Xilinx Virtex II XC2V1000 Demo Board]]

TMS570LS3137

2014-09-05T09:33:20Z

Pisa: /* OpenOCD setup and Flashing */

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

=== NHET Assembler ===

http://www.ti.com/tool/nhet-assembler

Installer doesn't work under Wine (Debian unstable, wine-1.6.2) even after installing the following packages, which wine complained about: <tt>apt-get install p11-kit-modules:i386 gnome-keyring:i386</tt>

If it is installed under windows, the resulting ''hetp.exe'' runs under Wine correctly.

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1?? || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

=== OpenOCD setup and Flashing ===

Consult [[FTDI2232_JTAG]] page for generic OpenOCD setup for ARM targets debugging.

The OpenOCD TMS570 Flash support developed by Andrey Smirnov can be found
in OpenOCD Gerrit [http://openocd.zylin.com/#/c/2214/ http://openocd.zylin.com/#/c/2214/]

Patches with our corrections to the support have been sent to the OpenOCD
mailing-list. The complete OpenOCD sources with all required patches applied
([http://cmp.felk.cvut.cz/~pisa/tms570/ openocd-tms570-f021-wip.tar.gz]) can be found at temporal place

[http://cmp.felk.cvut.cz/~pisa/tms570/ http://cmp.felk.cvut.cz/~pisa/tms570/]

As a base for OpenOCD configuration for the TMS570 target can be used

[https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd]

The example of Flash erase and write OpenOCD commands

flash banks
flash list
# probe bank/target for actual flash size
flash probe 0
# updated information about banks
flash banks

# erase one 128kB sector starting at 1MB
flash erase_address 0x00100000 0x00020000

# test Flash write using fill pattern
flash fillw 0x00100000 0xabcd1234 128

# Check memory content
mdw 0x00100000 256

Program application starting at zero address

# probe bank/target for actual flash size
flash probe 0

# Erase the first 256kB of Flash
flash erase_address 0x00000000 0x00040000

# Program application
program application.elf

Program binary image starting at 256kB boundary and maximal length 1MB

# probe bank/target for actual flash size
flash probe 0

# Erase the area after the first 256kB of Flash
flash erase_address 0x00040000 0x00100000

# Program application
program application.bin 0x00040000

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://www.rtems.org/wiki/index.php/Tms570
* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-09-05T09:31:08Z

Pisa: Update TMS570 OpenOCD Flashing

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

=== NHET Assembler ===

http://www.ti.com/tool/nhet-assembler

Installer doesn't work under Wine (Debian unstable, wine-1.6.2) even after installing the following packages, which wine complained about: <tt>apt-get install p11-kit-modules:i386 gnome-keyring:i386</tt>

If it is installed under windows, the resulting ''hetp.exe'' runs under Wine correctly.

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1?? || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

=== OpenOCD setup and Flashing ===

Consult [[FTDI2232_JTAG]] page for generic OpenOCD setup for ARM targets debugging.

The OpenOCD TMS570 Flash support developed by Andrey Smirnov can be found
in OpenOCD Gerrit [http://openocd.zylin.com/#/c/2214/ http://openocd.zylin.com/#/c/2214/]

Patches with our corrections to the support have been sent to the OpenOCD
mailing-list. The complete OpenOCD sources with all required patches applied
([http://cmp.felk.cvut.cz/~pisa/tms570/ openocd-tms570-f021-wip.tar.gz]) can be found at temporal place

[http://cmp.felk.cvut.cz/~pisa/tms570/ http://cmp.felk.cvut.cz/~pisa/tms570/]

As a base for OpenOCD configuration for the TMS570 target can be used

[https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd]

The example of Flash erase and write OpenOCD commands

flash banks
flash list
# probe bank/target for actual flash size
flash probe 0
# updated information about banks
flash banks

# erase one 128kB sector starting at 1MB
flash erase_address 0x00100000 0x00020000

# test Flash write using fill pattern
flash fillw 0x00100000 0xabcd1234 128

# Check memory content
mdw 0x00100000 256

Program application starting at zero address

# probe bank/target for actual flash size
flash probe 0

# Erase the first 256kB of Flash
flash erase_address 0x00000000 0x00040000

# Program application
program application.elf

Program binary image starting at 256kB boundary and maximal length 1MB

# probe bank/target for actual flash size
flash probe 0

# Erase the first 256kB of Flash
flash erase_address 0x00040000 0x00100000

# Program application
program application.bin 0x00040000

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://www.rtems.org/wiki/index.php/Tms570
* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-08-27T14:34:21Z

Pisa: /* OpenOCD setup and Flashing */

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

=== NHET Assembler ===

http://www.ti.com/tool/nhet-assembler

Installer doesn't work under Wine (Debian unstable, wine-1.6.2) even after installing the following packages, which wine complained about: <tt>apt-get install p11-kit-modules:i386 gnome-keyring:i386</tt>

If it is installed under windows, the resulting ''hetp.exe'' runs under Wine correctly.

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1?? || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

=== OpenOCD setup and Flashing ===

Consult [[FTDI2232_JTAG]] page for generic OpenOCD setup for ARM targets debugging.

The OpenOCD TMS570 Flash support developed by Andrey Smirnov can be found
in OpenOCD Gerrit [http://openocd.zylin.com/#/c/2214/ http://openocd.zylin.com/#/c/2214/]

Patches with our corrections to the support have been sent to the OpenOCD
mailing-list. The complete OpenOCD sources with all required patches applied
([http://cmp.felk.cvut.cz/~pisa/tms570/ openocd-tms570-f021-wip.tar.gz]) can be found at temporal place

[http://cmp.felk.cvut.cz/~pisa/tms570/ http://cmp.felk.cvut.cz/~pisa/tms570/]

As a base for OpenOCD configuration for the TMS570 target can be used

[https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd]

The example of Flash erase and write OpenOCD commands

flash banks
flash list
# probe bank/target for actual flash size
flash probe 0
# updated information about banks
flash banks

# erase one 128kB sector starting at 1MB
flash erase_address 0x00100000 0x00020000

# test Flash write using fill pattern
flash fillw 0x00100000 0xabcd1234 128

# Check memory content
mdw 0x00100000 256

# Erase the first MB of Flash
flash erase_address 0x00000000 0x00100000

# Program application
program application.elf

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://www.rtems.org/wiki/index.php/Tms570
* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-08-27T14:18:49Z

Pisa:

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

=== NHET Assembler ===

http://www.ti.com/tool/nhet-assembler

Installer doesn't work under Wine (Debian unstable, wine-1.6.2) even after installing the following packages, which wine complained about: <tt>apt-get install p11-kit-modules:i386 gnome-keyring:i386</tt>

If it is installed under windows, the resulting ''hetp.exe'' runs under Wine correctly.

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1?? || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

=== OpenOCD setup and Flashing ===

The OpenOCD TMS570 Flash support developed by Andrey Smirnov can be found
in OpenOCD Gerrit [http://openocd.zylin.com/#/c/2214/ http://openocd.zylin.com/#/c/2214/]

Patches with our corrections to the support have been sent to the OpenOCD
mailing-list. The complete OpenOCD sources with all required patches applied
([http://cmp.felk.cvut.cz/~pisa/tms570/ openocd-tms570-f021-wip.tar.gz]) can be found at temporal place

[http://cmp.felk.cvut.cz/~pisa/tms570/ http://cmp.felk.cvut.cz/~pisa/tms570/]

As a base for OpenOCD configuration for the TMS570 target can be used

[https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd]

The example of Flash erase and write OpenOCD commands

flash banks
flash list
# probe bank/target for actual flash size
flash probe 0
# updated information about banks
flash banks

# erase one 128kB sector starting at 1MB
flash erase_address 0x00100000 0x00020000

# test Flash write using fill pattern
flash fillw 0x00100000 0xabcd1234 128

# Check memory content
mdw 0x00100000 256

# Erase the first MB of Flash
flash erase_address 0x00000000 0x00100000

# Program application
program application.elf

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://www.rtems.org/wiki/index.php/Tms570
* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-08-27T14:16:21Z

Pisa:

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

=== NHET Assembler ===

http://www.ti.com/tool/nhet-assembler

Installer doesn't work under Wine (Debian unstable, wine-1.6.2) even after installing the following packages, which wine complained about: <tt>apt-get install p11-kit-modules:i386 gnome-keyring:i386</tt>

If it is installed under windows, the resulting ''hetp.exe'' runs under Wine correctly.

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1?? || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

=== OpenOCD setup and Flashing ===

The OpenOCD TMS570 Flash support developed by Andrey Smirnov can be found
in OpenOCD Gerrit [[http://openocd.zylin.com/#/c/2214/|http://openocd.zylin.com/#/c/2214/]]

Patches with our corrections to the support have been sent to the OpenOCD
mailing-list. The complete OpenOCD sources with all required patches applied
([[http://cmp.felk.cvut.cz/~pisa/tms570/|openocd-tms570-f021-wip.tar.gz]]) can be found at temporal place

[[http://cmp.felk.cvut.cz/~pisa/tms570/|http://cmp.felk.cvut.cz/~pisa/tms570/]]

As a base for OpenOCD configuration for the TMS570 target can be used

[[https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd|https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd]]

The example of Flash erase and write OpenOCD commands

flash banks
flash list
# probe bank/target for actual flash size
flash probe 0
# updated information about banks
flash banks

# erase one 128kB sector starting at 1MB
flash erase_address 0x00100000 0x00020000

# test Flash write using fill pattern
flash fillw 0x00100000 0xabcd1234 128

# Check memory content
mdw 0x00100000 256

# Erase the first MB of Flash
flash erase_address 0x00000000 0x00100000

# Program application
program application.elf

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://www.rtems.org/wiki/index.php/Tms570
* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-08-27T14:15:04Z

Pisa: More about TMS570 flashing by OpenOCD

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

=== NHET Assembler ===

http://www.ti.com/tool/nhet-assembler

Installer doesn't work under Wine (Debian unstable, wine-1.6.2) even after installing the following packages, which wine complained about: <tt>apt-get install p11-kit-modules:i386 gnome-keyring:i386</tt>

If it is installed under windows, the resulting ''hetp.exe'' runs under Wine correctly.

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1?? || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

=== OpenOCD setup and Flashing ===

The OpenOCD TMS570 Flash support developed by Andrey Smirnov can be found
in OpenOCD Gerrit [http://openocd.zylin.com/#/c/2214/|http://openocd.zylin.com/#/c/2214/]

Patches with our corrections to the support have been sent to the OpenOCD
mailing-list. The complete OpenOCD sources with all required patches applied
([http://cmp.felk.cvut.cz/~pisa/tms570/|openocd-tms570-f021-wip.tar.gz]) can be found at temporal place

[http://cmp.felk.cvut.cz/~pisa/tms570/|http://cmp.felk.cvut.cz/~pisa/tms570/]

As a base for OpenOCD configuration for the TMS570 target can be used

[https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd|https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd]

The example of Flash erase and write OpenOCD commands

flash banks
flash list
# probe bank/target for actual flash size
flash probe 0
# updated information about banks
flash banks

# erase one 128kB sector starting at 1MB
flash erase_address 0x00100000 0x00020000

# test Flash write using fill pattern
flash fillw 0x00100000 0xabcd1234 128

# Check memory content
mdw 0x00100000 256

# Erase the first MB of Flash
flash erase_address 0x00000000 0x00100000

# Program application
program application.elf

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://www.rtems.org/wiki/index.php/Tms570
* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-08-27T13:17:47Z

Pisa: OpenOCD programming of Flash on TMS570

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

=== NHET Assembler ===

http://www.ti.com/tool/nhet-assembler

Installer doesn't work under Wine (Debian unstable, wine-1.6.2) even after installing the following packages, which wine complained about: <tt>apt-get install p11-kit-modules:i386 gnome-keyring:i386</tt>

If it is installed under windows, the resulting ''hetp.exe'' runs under Wine correctly.

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1?? || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

=== OpenOCD setup and Flashing ===

flash banks
flash list
flash probe 0

flash erase_address 0x00100000 0x00020000

flash fillw 0x00100000 0xabcd1234 128

mdw 0x00100000 256

flash fillw 0x00101000 0xdeadbeef 128
mdw 0x00101000 256

flash erase_address 0x00000000 0x00100000

program application.elf

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://www.rtems.org/wiki/index.php/Tms570
* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-08-14T14:37:07Z

Pisa: Link RTEMS TMS570 BSP page

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

=== NHET Assembler ===

http://www.ti.com/tool/nhet-assembler

Installer doesn't work under Wine (Debian unstable, wine-1.6.2) even after installing the following packages, which wine complained about: <tt>apt-get install p11-kit-modules:i386 gnome-keyring:i386</tt>

If it is installed under windows, the resulting ''hetp.exe'' runs under Wine correctly.

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1?? || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://www.rtems.org/wiki/index.php/Tms570
* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-07-08T08:39:53Z

Pisa: /* SDRAM setup */

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1?? || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-07-08T08:39:18Z

Pisa: SDRAM setup for HDK corrections

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || 160 / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || 80 / 80?? || 80 ||
|-
! CLK2CNTL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || 2-1 / 4-1 || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 6-1 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 2-1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 2-1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 2-1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 4-1 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 6-1 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 2-1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 5 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 312 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 2 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 0 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

FTDI2232 JTAG

2014-07-06T14:27:21Z

Pisa: OpenOCD and DDD integration

== PiKRON's JTAG adapter ==

Author: [http://volny.cz/porazil/ Petr Porazil]

[[File:jt_usb5.pdf]]

Adapter is compatible with standard 20 pin ARM JTAG connector as well as
provides reduced 10 pin connector used on [http://www.pikron.com/ PiKRON]'s LPC17xx, LPC21xx,
i.MX and other boards.

== Permit access to usb as non-root user ==

in /etc/udev/rules.d add file 45-ftdi-libftdi.rules with following content:

ACTION!="add", SUBSYSTEM!="usb_device", GOTO="kcontrol_rules_end"
ATTR(idProduct)=="bcd9", ATTR(idVendor)=="0403", MODE:="666"
LABEL="kcontrol_rules_end"

Values are checked on Stellaris board and Ubuntu 10.10. Then reload rules
:/# initctl reload-configuration udev
and reconnect your hardware.

== Older setup for LCP2148 ==

<pre>
#daemon configuration
telnet_port 4444
gdb_port 3333

# tell gdb our flash memory map
# and enable flash programming
#gdb_memory_map enable
#gdb_flash_program enable

#interface
interface ft2232
#ft2232_device_desc "JTAG"
ft2232_layout usbjtag
ft2232_vid_pid 0x0403 0x6010
#jtag_speed 3

# reset layout for ul_usb1 and jt_usb5 with ft2232
# 7 TRST NTRST IOL0
# 6 nHRST RST IOL2
# 4 RTCK SRST IOL1

#use combined on interfaces or targets that can't set TRST/SRST separately
# trst_and_srst
#reset_config trst_only srst_pulls_trst
reset_config trst_and_srst separate trst_open_drain srst_push_pull

source [find target/lpc2148.cfg]

init
reset halt
</pre>

== Setup for STM3210C-EVAL ==

<pre>
telnet_port 4444
gdb_port 3333
#set CHIPNAME STM32F107VCT6
#set WORKAREASIZE 0x10000
interface ftdi
#ftdi_device_desc "Dual RS232"
ftdi_vid_pid 0x0403 0x6010

ftdi_layout_init 0x05f8 0x0cfb
ftdi_layout_signal nTRST -data 0x0010 -noe 0x0800
ftdi_layout_signal nSRST -ndata 0x0040 -noe 0x0400

#source [find interface/ftdi/xds100v2.cfg]
source [find board/stm3210c_eval.cfg]
reset_config trst_and_srst

init;
#ftdi_set_signal PWR_RST 1; jtag arp_init

#stm32f1x.cpu arp_halt
#wait_halt
#stm32f1x.cpu curstate
</pre>

<pre>
openocd -c "source [find load-jt_usb5.cfg]" -c "program STM3210C-EVAL_FW_V1.1.0.hex"
</pre>

== Setup for TMS570LS3137 ==

The OpenOCD setup for [[TMS570LS3137]] board.
Setup files for this target are part of [http://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd rtems-tms570-utils] repository.

<pre>
telnet_port 4444
gdb_port 3333

adapter_khz 1500

source [find interface/ftdi/xds100v2.cfg]
source [find target/ti_tms570.cfg]

reset_config trst_only
init; ftdi_set_signal PWR_RST 1; jtag arp_init

reset halt
wait_halt
resume
sleep 1000
tms570.cpu arp_halt
wait_halt

# reset and prepare target by running setup code from Flash when GDB is connected
tms570.cpu configure -event gdb-attach {
cortex_r4 dbginit
reset halt
wait_halt
resume
sleep 1000
tms570.cpu arp_halt
wait_halt
}
</pre>

== OpenOCD and GDB Quirks ==

GDB level initialization commands ("gdb-openocd.init" scripst)

<pre>
#set debug remote 1
#set debug infrun 1
#set remotelogfile my_remote.log

set endian big
target remote localhost:3333

#set remote software-breakpoint-packet 0
#monitor gdb_breakpoint_override hard
load

#source gdb_initial_commands
</pre>

Wrapper to start and connect together GDB and OpenOCD and run DDD gui. The script starts OpenOCD
if needed. GDB is started then and "gdb-openocd.init" commands sequence ensures connection to OpenOCD,
loading of application image to the target (file name is the first script parameter).

<pre>
#!/bin/sh

SCRIP_DIR="$(dirname "$(readlink -f "$0")")"

nc -w 3 -z localhost 4444
if [ $? -ne 0 ]
then
echo "Starting OpenOCD"
# use next options for detailed operation log
# -d3 -l path_to_log/open_ocd.log
openocd -f "$SCRIP_DIR/openocd.cfg" &
OPENOCD_PID=$!
nc -w 10 -z localhost 4444
if [ $? -ne 0 ]
then
echo "OpenOCD start failed"
fi
fi

ddd --debugger arm-rtems4.11-gdb -x "$SCRIP_DIR/gdb-openocd.init" "$1"

kill $OPENOCD_PID
</pre>

== JT_USB5 pin assignment ==

{| class="wikitable"
! Data Bit !! Signal !! FT2232 !! JT_USB5 !! Type !! Description
|-
| Bit0 || TCK/SK || ADBUS0 || TCK || Out || Clock Signal Output
|-
| Bit1 || TDI/DO || ADBUS1 || TDI || Out || Serial Data Out
|-
| Bit2 || TDO/DI || ADBUS2 || TDO || In || Serial Data In
|-
| Bit3 || TMS/CS || ADBUS3 || TMS || Out || Select Signal Out
|-
| Bit4 || GPIOL0 || ADBUS4 || nTRST || In/Out || General Purpose I/O
|-
| Bit5 || GPIOL1 || ADBUS5 || RTCK || In/Out || General Purpose I/O
|-
| Bit6 || GPIOL2 || ADBUS6 || RST || In/Out || General Purpose I/O
|-
| Bit7 || GPIOL3 || ADBUS7 || DBGRQ || In/Out || General Purpose I/O
|-
| Bit8 || GPIOH0 || ACBUS0 || DBACK || In/Out || General Purpose I/O
|-
| Bit9 || GPIOH1 || ACBUS1 || AC1 || In/Out || General Purpose I/O
|-
| Bit10 || GPIOH2 || ACBUS2 || RXLED || In/Out || General Purpose I/O
|-
| Bit11 || GPIOH3 || ACBUS3 || TXLED || In/Out || General Purpose I/O
|}

FTDI2232 JTAG

2014-07-06T14:17:33Z

Pisa: /* Setup for TMS570LS3137 */

== PiKRON's JTAG adapter ==

Author: [http://volny.cz/porazil/ Petr Porazil]

[[File:jt_usb5.pdf]]

Adapter is compatible with standard 20 pin ARM JTAG connector as well as
provides reduced 10 pin connector used on [http://www.pikron.com/ PiKRON]'s LPC17xx, LPC21xx,
i.MX and other boards.

== Permit access to usb as non-root user ==

in /etc/udev/rules.d add file 45-ftdi-libftdi.rules with following content:

ACTION!="add", SUBSYSTEM!="usb_device", GOTO="kcontrol_rules_end"
ATTR(idProduct)=="bcd9", ATTR(idVendor)=="0403", MODE:="666"
LABEL="kcontrol_rules_end"

Values are checked on Stellaris board and Ubuntu 10.10. Then reload rules
:/# initctl reload-configuration udev
and reconnect your hardware.

== Older setup for LCP2148 ==

<pre>
#daemon configuration
telnet_port 4444
gdb_port 3333

# tell gdb our flash memory map
# and enable flash programming
#gdb_memory_map enable
#gdb_flash_program enable

#interface
interface ft2232
#ft2232_device_desc "JTAG"
ft2232_layout usbjtag
ft2232_vid_pid 0x0403 0x6010
#jtag_speed 3

# reset layout for ul_usb1 and jt_usb5 with ft2232
# 7 TRST NTRST IOL0
# 6 nHRST RST IOL2
# 4 RTCK SRST IOL1

#use combined on interfaces or targets that can't set TRST/SRST separately
# trst_and_srst
#reset_config trst_only srst_pulls_trst
reset_config trst_and_srst separate trst_open_drain srst_push_pull

source [find target/lpc2148.cfg]

init
reset halt
</pre>

== Setup for STM3210C-EVAL ==

<pre>
telnet_port 4444
gdb_port 3333
#set CHIPNAME STM32F107VCT6
#set WORKAREASIZE 0x10000
interface ftdi
#ftdi_device_desc "Dual RS232"
ftdi_vid_pid 0x0403 0x6010

ftdi_layout_init 0x05f8 0x0cfb
ftdi_layout_signal nTRST -data 0x0010 -noe 0x0800
ftdi_layout_signal nSRST -ndata 0x0040 -noe 0x0400

#source [find interface/ftdi/xds100v2.cfg]
source [find board/stm3210c_eval.cfg]
reset_config trst_and_srst

init;
#ftdi_set_signal PWR_RST 1; jtag arp_init

#stm32f1x.cpu arp_halt
#wait_halt
#stm32f1x.cpu curstate
</pre>

<pre>
openocd -c "source [find load-jt_usb5.cfg]" -c "program STM3210C-EVAL_FW_V1.1.0.hex"
</pre>

== Setup for TMS570LS3137 ==

The OpenOCD setup for [[TMS570LS3137]] board.
Setup files for this target are part of [http://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd rtems-tms570-utils] repository.

<pre>
telnet_port 4444
gdb_port 3333

adapter_khz 1500

source [find interface/ftdi/xds100v2.cfg]
source [find target/ti_tms570.cfg]

reset_config trst_only
init; ftdi_set_signal PWR_RST 1; jtag arp_init

reset halt
wait_halt
resume
sleep 1000
tms570.cpu arp_halt
wait_halt

# reset and prepare target by running setup code from Flash when GDB is connected
tms570.cpu configure -event gdb-attach {
cortex_r4 dbginit
reset halt
wait_halt
resume
sleep 1000
tms570.cpu arp_halt
wait_halt
}
</pre>

== OpenOCD and GDB Quirks ==

GDB level initialization commands

<pre>
#set debug remote 1
#set debug infrun 1
#set remotelogfile my_remote.log

set endian big
target remote localhost:3333

#set remote software-breakpoint-packet 0
#monitor gdb_breakpoint_override hard
load

#source gdb_initial_commands
</pre>

== JT_USB5 pin assignment ==

{| class="wikitable"
! Data Bit !! Signal !! FT2232 !! JT_USB5 !! Type !! Description
|-
| Bit0 || TCK/SK || ADBUS0 || TCK || Out || Clock Signal Output
|-
| Bit1 || TDI/DO || ADBUS1 || TDI || Out || Serial Data Out
|-
| Bit2 || TDO/DI || ADBUS2 || TDO || In || Serial Data In
|-
| Bit3 || TMS/CS || ADBUS3 || TMS || Out || Select Signal Out
|-
| Bit4 || GPIOL0 || ADBUS4 || nTRST || In/Out || General Purpose I/O
|-
| Bit5 || GPIOL1 || ADBUS5 || RTCK || In/Out || General Purpose I/O
|-
| Bit6 || GPIOL2 || ADBUS6 || RST || In/Out || General Purpose I/O
|-
| Bit7 || GPIOL3 || ADBUS7 || DBGRQ || In/Out || General Purpose I/O
|-
| Bit8 || GPIOH0 || ACBUS0 || DBACK || In/Out || General Purpose I/O
|-
| Bit9 || GPIOH1 || ACBUS1 || AC1 || In/Out || General Purpose I/O
|-
| Bit10 || GPIOH2 || ACBUS2 || RXLED || In/Out || General Purpose I/O
|-
| Bit11 || GPIOH3 || ACBUS3 || TXLED || In/Out || General Purpose I/O
|}

FTDI2232 JTAG

2014-07-06T14:17:10Z

Pisa: /* Setup for TMS570LS3137 */

== PiKRON's JTAG adapter ==

Author: [http://volny.cz/porazil/ Petr Porazil]

[[File:jt_usb5.pdf]]

Adapter is compatible with standard 20 pin ARM JTAG connector as well as
provides reduced 10 pin connector used on [http://www.pikron.com/ PiKRON]'s LPC17xx, LPC21xx,
i.MX and other boards.

== Permit access to usb as non-root user ==

in /etc/udev/rules.d add file 45-ftdi-libftdi.rules with following content:

ACTION!="add", SUBSYSTEM!="usb_device", GOTO="kcontrol_rules_end"
ATTR(idProduct)=="bcd9", ATTR(idVendor)=="0403", MODE:="666"
LABEL="kcontrol_rules_end"

Values are checked on Stellaris board and Ubuntu 10.10. Then reload rules
:/# initctl reload-configuration udev
and reconnect your hardware.

== Older setup for LCP2148 ==

<pre>
#daemon configuration
telnet_port 4444
gdb_port 3333

# tell gdb our flash memory map
# and enable flash programming
#gdb_memory_map enable
#gdb_flash_program enable

#interface
interface ft2232
#ft2232_device_desc "JTAG"
ft2232_layout usbjtag
ft2232_vid_pid 0x0403 0x6010
#jtag_speed 3

# reset layout for ul_usb1 and jt_usb5 with ft2232
# 7 TRST NTRST IOL0
# 6 nHRST RST IOL2
# 4 RTCK SRST IOL1

#use combined on interfaces or targets that can't set TRST/SRST separately
# trst_and_srst
#reset_config trst_only srst_pulls_trst
reset_config trst_and_srst separate trst_open_drain srst_push_pull

source [find target/lpc2148.cfg]

init
reset halt
</pre>

== Setup for STM3210C-EVAL ==

<pre>
telnet_port 4444
gdb_port 3333
#set CHIPNAME STM32F107VCT6
#set WORKAREASIZE 0x10000
interface ftdi
#ftdi_device_desc "Dual RS232"
ftdi_vid_pid 0x0403 0x6010

ftdi_layout_init 0x05f8 0x0cfb
ftdi_layout_signal nTRST -data 0x0010 -noe 0x0800
ftdi_layout_signal nSRST -ndata 0x0040 -noe 0x0400

#source [find interface/ftdi/xds100v2.cfg]
source [find board/stm3210c_eval.cfg]
reset_config trst_and_srst

init;
#ftdi_set_signal PWR_RST 1; jtag arp_init

#stm32f1x.cpu arp_halt
#wait_halt
#stm32f1x.cpu curstate
</pre>

<pre>
openocd -c "source [find load-jt_usb5.cfg]" -c "program STM3210C-EVAL_FW_V1.1.0.hex"
</pre>

== Setup for TMS570LS3137 ==

The OpenOCD setup for [[TMS570LS3137]] board.
Setup files for this target are part of [https://github.com/AoLaD/rtems-tms570-utils/tree/master/openocd rtems-tms570-utils] repository.

<pre>
telnet_port 4444
gdb_port 3333

adapter_khz 1500

source [find interface/ftdi/xds100v2.cfg]
source [find target/ti_tms570.cfg]

reset_config trst_only
init; ftdi_set_signal PWR_RST 1; jtag arp_init

reset halt
wait_halt
resume
sleep 1000
tms570.cpu arp_halt
wait_halt

# reset and prepare target by running setup code from Flash when GDB is connected
tms570.cpu configure -event gdb-attach {
cortex_r4 dbginit
reset halt
wait_halt
resume
sleep 1000
tms570.cpu arp_halt
wait_halt
}
</pre>

== OpenOCD and GDB Quirks ==

GDB level initialization commands

<pre>
#set debug remote 1
#set debug infrun 1
#set remotelogfile my_remote.log

set endian big
target remote localhost:3333

#set remote software-breakpoint-packet 0
#monitor gdb_breakpoint_override hard
load

#source gdb_initial_commands
</pre>

== JT_USB5 pin assignment ==

{| class="wikitable"
! Data Bit !! Signal !! FT2232 !! JT_USB5 !! Type !! Description
|-
| Bit0 || TCK/SK || ADBUS0 || TCK || Out || Clock Signal Output
|-
| Bit1 || TDI/DO || ADBUS1 || TDI || Out || Serial Data Out
|-
| Bit2 || TDO/DI || ADBUS2 || TDO || In || Serial Data In
|-
| Bit3 || TMS/CS || ADBUS3 || TMS || Out || Select Signal Out
|-
| Bit4 || GPIOL0 || ADBUS4 || nTRST || In/Out || General Purpose I/O
|-
| Bit5 || GPIOL1 || ADBUS5 || RTCK || In/Out || General Purpose I/O
|-
| Bit6 || GPIOL2 || ADBUS6 || RST || In/Out || General Purpose I/O
|-
| Bit7 || GPIOL3 || ADBUS7 || DBGRQ || In/Out || General Purpose I/O
|-
| Bit8 || GPIOH0 || ACBUS0 || DBACK || In/Out || General Purpose I/O
|-
| Bit9 || GPIOH1 || ACBUS1 || AC1 || In/Out || General Purpose I/O
|-
| Bit10 || GPIOH2 || ACBUS2 || RXLED || In/Out || General Purpose I/O
|-
| Bit11 || GPIOH3 || ACBUS3 || TXLED || In/Out || General Purpose I/O
|}

FTDI2232 JTAG

2014-07-06T14:13:56Z

Pisa: TMS570LS3137 OpenOCD configuration

== PiKRON's JTAG adapter ==

Author: [http://volny.cz/porazil/ Petr Porazil]

[[File:jt_usb5.pdf]]

Adapter is compatible with standard 20 pin ARM JTAG connector as well as
provides reduced 10 pin connector used on [http://www.pikron.com/ PiKRON]'s LPC17xx, LPC21xx,
i.MX and other boards.

== Permit access to usb as non-root user ==

in /etc/udev/rules.d add file 45-ftdi-libftdi.rules with following content:

ACTION!="add", SUBSYSTEM!="usb_device", GOTO="kcontrol_rules_end"
ATTR(idProduct)=="bcd9", ATTR(idVendor)=="0403", MODE:="666"
LABEL="kcontrol_rules_end"

Values are checked on Stellaris board and Ubuntu 10.10. Then reload rules
:/# initctl reload-configuration udev
and reconnect your hardware.

== Older setup for LCP2148 ==

<pre>
#daemon configuration
telnet_port 4444
gdb_port 3333

# tell gdb our flash memory map
# and enable flash programming
#gdb_memory_map enable
#gdb_flash_program enable

#interface
interface ft2232
#ft2232_device_desc "JTAG"
ft2232_layout usbjtag
ft2232_vid_pid 0x0403 0x6010
#jtag_speed 3

# reset layout for ul_usb1 and jt_usb5 with ft2232
# 7 TRST NTRST IOL0
# 6 nHRST RST IOL2
# 4 RTCK SRST IOL1

#use combined on interfaces or targets that can't set TRST/SRST separately
# trst_and_srst
#reset_config trst_only srst_pulls_trst
reset_config trst_and_srst separate trst_open_drain srst_push_pull

source [find target/lpc2148.cfg]

init
reset halt
</pre>

== Setup for STM3210C-EVAL ==

<pre>
telnet_port 4444
gdb_port 3333
#set CHIPNAME STM32F107VCT6
#set WORKAREASIZE 0x10000
interface ftdi
#ftdi_device_desc "Dual RS232"
ftdi_vid_pid 0x0403 0x6010

ftdi_layout_init 0x05f8 0x0cfb
ftdi_layout_signal nTRST -data 0x0010 -noe 0x0800
ftdi_layout_signal nSRST -ndata 0x0040 -noe 0x0400

#source [find interface/ftdi/xds100v2.cfg]
source [find board/stm3210c_eval.cfg]
reset_config trst_and_srst

init;
#ftdi_set_signal PWR_RST 1; jtag arp_init

#stm32f1x.cpu arp_halt
#wait_halt
#stm32f1x.cpu curstate
</pre>

<pre>
openocd -c "source [find load-jt_usb5.cfg]" -c "program STM3210C-EVAL_FW_V1.1.0.hex"
</pre>

== Setup for TMS570LS3137 ==

<pre>
telnet_port 4444
gdb_port 3333

adapter_khz 1500

source [find interface/ftdi/xds100v2.cfg]
source [find target/ti_tms570.cfg]

reset_config trst_only
init; ftdi_set_signal PWR_RST 1; jtag arp_init

reset halt
wait_halt
resume
sleep 1000
tms570.cpu arp_halt
wait_halt

# reset and prepare target by running setup code from Flash when GDB is connected
tms570.cpu configure -event gdb-attach {
cortex_r4 dbginit
reset halt
wait_halt
resume
sleep 1000
tms570.cpu arp_halt
wait_halt
}
</pre>

== OpenOCD and GDB Quirks ==

GDB level initialization commands

<pre>
#set debug remote 1
#set debug infrun 1
#set remotelogfile my_remote.log

set endian big
target remote localhost:3333

#set remote software-breakpoint-packet 0
#monitor gdb_breakpoint_override hard
load

#source gdb_initial_commands
</pre>

== JT_USB5 pin assignment ==

{| class="wikitable"
! Data Bit !! Signal !! FT2232 !! JT_USB5 !! Type !! Description
|-
| Bit0 || TCK/SK || ADBUS0 || TCK || Out || Clock Signal Output
|-
| Bit1 || TDI/DO || ADBUS1 || TDI || Out || Serial Data Out
|-
| Bit2 || TDO/DI || ADBUS2 || TDO || In || Serial Data In
|-
| Bit3 || TMS/CS || ADBUS3 || TMS || Out || Select Signal Out
|-
| Bit4 || GPIOL0 || ADBUS4 || nTRST || In/Out || General Purpose I/O
|-
| Bit5 || GPIOL1 || ADBUS5 || RTCK || In/Out || General Purpose I/O
|-
| Bit6 || GPIOL2 || ADBUS6 || RST || In/Out || General Purpose I/O
|-
| Bit7 || GPIOL3 || ADBUS7 || DBGRQ || In/Out || General Purpose I/O
|-
| Bit8 || GPIOH0 || ACBUS0 || DBACK || In/Out || General Purpose I/O
|-
| Bit9 || GPIOH1 || ACBUS1 || AC1 || In/Out || General Purpose I/O
|-
| Bit10 || GPIOH2 || ACBUS2 || RXLED || In/Out || General Purpose I/O
|-
| Bit11 || GPIOH3 || ACBUS3 || TXLED || In/Out || General Purpose I/O
|}

TMS570LS3137

2014-07-06T00:10:26Z

Pisa: /* SDRAM setup */

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || IS42S16400F-7BL || IS45S16320 ||
|-
| banks || 4 (2 bits) || 4 (2 bits) ||
|-
| rows || 4096 (12 bits) || 8192 (13 bits) ||
|-
| columns || 256 (8 bit) || 1024 (10 bits) ||
|-
| CL || 2/3 || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || x / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || x / 80 || 80 ||
|-
! CLK2CNTRL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || - / 4-1 || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 5 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 80 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 5 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 0 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 2000 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 3 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 3 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-07-05T23:31:25Z

Pisa: /* SDRAM setup */

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || || IS45S16320 ||
|-
| banks || || 4 (2 bits) ||
|-
| rows || || 1024 (10 bits) ||
|-
| columns || || 8192 (13 bits) ||
|-
| CL || || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || x / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || x / 80 || 80 ||
|-
! CLK2CNTRL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || - / 4-1 || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 5 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 80 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 5 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 0 / 6 || 5+3-1 ||
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 2000 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 3 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 3 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-07-05T23:20:22Z

Pisa: /* SDRAM setup */

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || || IS45S16320 ||
|-
| banks || || 4 (2 bits) ||
|-
| rows || || 1024 (10 bits) ||
|-
| columns || || 8192 (13 bits) ||
|-
| CL || || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || x / 160 || 160 ||
|-
| EMIF Clock / VCLK3 || x / 80 || 80 ||
|-
! CLK2CNTRL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || - / 4-1 || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 5 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 80 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 5 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 0 / 6 || 5+3-1 || configure refresh rate
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 2000 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 3 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 3 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-07-05T23:17:21Z

Pisa: /* SDRAM setup */

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || || IS45S16320 ||
|-
| banks || || 4 (2 bits) ||
|-
| rows || || 1024 (10 bits) ||
|-
| columns || || 8192 (13 bits) ||
|-
| CL || || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || x / 160 || ||
|-
| EMIF Clock / VCLK3 || x / 80 || ||
|-
! CLK2CNTRL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || - / 4-1 || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 5 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 80 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 5 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 0 / 6 || 5+3-1 || configure refresh rate
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 2000 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 3 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 3 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-07-05T23:08:39Z

Pisa: More clock data

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || || IS45S16320 ||
|-
| banks || || 4 (2 bits) ||
|-
| rows || || 1024 (10 bits) ||
|-
| columns || || 8192 (13 bits) ||
|-
| CL || || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
| HCLK [MHz] || x / 160 || ||
|-
| EMIF Clock / VCLK3 || x / 80 || ||
|-
! CLK2CNTRL !! !! !! Clock 2 Control Register
|-
| VCLK3R (3-0) || || 2-1 || HCKL to EMIF VCLK3 ration
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 5 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 80 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 5 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 0 / 6 || 5+3-1 || configure refresh rate
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 2000 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 3 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 3 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-07-05T22:45:27Z

Pisa: SDRAM setup clarification from manual

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || || IS45S16320 ||
|-
| banks || || 4 (2 bits) ||
|-
| rows || || 1024 (10 bits) ||
|-
| columns || || 8192 (13 bits) ||
|-
| CL || || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
! SDTIMR !! !! !! SDRAM Timing Register
|-
| TRF_C (31-27) || 5 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 80 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 5 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !! Self Refresh Exit Timing Register
|-
| T_XS (XSR) || 0 / 6 || 5+3-1 || configure refresh rate
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 2000 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !! SDRAM Configuration Register
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 3 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 3 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-07-05T22:36:05Z

Pisa: SDRAM values from HDK connectivity test added

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK / Conn test !! Value for RPP !! Notice
|-
| Chip || || IS45S16320 ||
|-
| banks || || 4 (2 bits) ||
|-
| rows || || 1024 (10 bits) ||
|-
| columns || || 8192 (13 bits) ||
|-
| CL || || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
! SDTIMR !! !! !!
|-
| TRF_C (31-27) || 5 / 6 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 1 / 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 1 / 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 1 / 2 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 80 / 4 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 5 / 3 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 / 0 || 0 ||
|-
| T_RRD (6-4) || 1 / 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! XSR !! !! !!
|-
| || - / 6 || ||
|-
! SDSRETR !! !! !!
|-
| || 0 / || 5+3-1 || configure refresh rate
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 2000 / 1250 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !!
|-
| SR (31) || 0 / 0 || 0 || self refresh mode
|-
| PD (30) || 0 / 0 || 0 || power down
|-
| PDWR (29) || 0 / 0 || 0 || refresh in PD
|-
| NM (14) || 1 / 1 || 1 || narrow mode
|-
| CL (11-9) || 3 / 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 / 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 / 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 3 / 0 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]

TMS570LS3137

2014-07-05T22:13:28Z

Pisa: Fill in last HDK used setup (probably mess from HalCoGen). Requires checking.

[[File:TMS570LS31x HDK Kit.jpg|right|300px]]
[[File:Rpp.jpg|right]]

== Documentation ==
* [http://www.ti.com/product/tms570ls3137 Main TI page] containing datasheets.
* [http://e2e.ti.com/support/microcontrollers/hercules/f/312.aspx TI TMS570 related forum]
* [http://processors.wiki.ti.com/index.php/Category:TMS570 TMS570 Wiki]

* [http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration LwIP integration]

* [[Media:Studim_procesoru.pdf]] Notes from documentation (in Czech language)

== Programming ==

Tools recommended by TI for programming of this microcontroller:

* [http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5 Code Composer Studio] (runs on Win and Linux).
* [http://www.ti.com/tool/halcogen HalCoGen] (for Windows only, but also runs quite well in Wine).
** [[TMS570LS3137 HalCoGen Bugs|TMS570LS3137 HalCoGen Bugs]]

=== CCS5.3.0.00090_linux in Ubuntu 12.04 64bits ===

After installation the application can be run with:

<code>
cd <install_dir>/ccsv5/eclipse/

./ccstudio
</code>

If the application fails to start is because CCS5 is a 32bits application a thus requires 32bits libraries:

<code>
sudo apt-get install libgtk2.0-0:i386 libxtst6:i386 gtk2-engines-pixbuf:i386 libcanberra-gtk-module:i386
</code>

If the application crashes with a segmentation fault do:

Edit <code><install_dir>/ccsv5/eclipse/plugins/com.ti.ccstudio.branding_<your version number>/plugin_customization.ini</code>

And change key <code>org.eclipse.ui/showIntro</code> to <code>false</code>.

Choose "FREE License - for use with XDS100 JTAG Emulators" on the licensing options.

You may create a symbolic link and a desktop entry:

<code>
sudo ln -s <install_dir>/ccsv5/eclipse/ccstudio /usr/local/bin/ccstudio
</code>

And put in <code>~/.local/share/applications/ccs5.desktop</code>

<nowiki>
[Desktop Entry]
Version=1.0
Type=Application
Terminal=false
Exec=ccstudio
Name=Code Composer Studio
Icon=/usr/local/ti/ccsv5/eclipse/icon.xpm
</nowiki>

=== CCS5.5.0.00077_windows on Windows 7x64 ===

Download ccs_setup_5.5.0.00077.exe from http://ti.com and run.

Choose component:
* Safety MCUs

Choose Compiler tools:
* TI ARM Compiler Tools
* TI Documentation

Coose JTAG Emulator Support
* XDS100 Class Emulator Support

== FreeRTOS ==
Installation is easy, simply create new project in HalCoGen

* New -> Project
* Select Family:TMS570LS31x
* Select Device: TMS570LS3137ZWT_FREERTOS

All necessary files will be added into project automaticaly.

== Matlab/Simulink Embedded Coder target ==
We have implemented support for Matlab/Simulink which allows to use
designed peripherals support libraries from Simulink model design.

For further information look at separate pages for the target

http://rtime.felk.cvut.cz/rpp-tms570/

== Hardware ==
Developement board we are using: [http://processors.wiki.ti.com/index.php?title=TMS570LS31x_HDK_Kit TMS570LS31x_HDK_Kit]

=== SDRAM setup ===

* Simple code to setup SDRAM for use from OpenOCD and others code loaders
** https://github.com/hornmich/tms570ls3137-hdk-sdram

Setup of bit 31 in GPREG1 is required ele EMIF does not work as expected.
From UM 4.3.3 Control of Special Multiplexed Options: Any application that requires the EMIF functionality
must set GPREG1[31]. This allows these 8 EMIF module outputs to be driven on to the assigned balls.

<pre>systemREG1->GPREG1 |= 0x80000000;</pre>

{| class="wikitable"
! Parameter !! Value for HDK !! Value for RPP !! Notice
|-
| Chip || || IS45S16320 ||
|-
| banks || || 4 (2 bits) ||
|-
| rows || || 1024 (10 bits) ||
|-
| columns || || 8192 (13 bits) ||
|-
| CL || || 2/3 ||
|-
| refresh [ms] || || 64 / 16 @ 80 °C ||
|-
| self. ref. exit [ns] || || 67 ||
|-
! SDTIMR !! !! !!
|-
| TRF_C (31-27) || 5 || 9-1 || REFR to REFR
|-
| T_RP (26-24) || 1 || 3-1 || PRE to ACTIV or REFR
|-
| (23) || 0 || 0 ||
|-
| T_RCD (22-20) || 1 || 3-1 || ACTIV to RD/WR
|-
| (19) || 0 || 0 ||
|-
| T_WR (18-16) || 1 || 2-1 || WRITE to PRE
|-
| T_RAS (15-12) || 80 || 6-1 || ACTIV to PRE
|-
| T_RC (11-8) || 5 || 9-1 || ACTIV to ACTIV
|-
| (7) || 0 || 0 ||
|-
| T_RRD (6-4) || 1 || 2-1 || ACTIV to ACTIV other bank
|-
| (3) || 0 || 0 ||
|-
! SDSRETR !! !! !!
|-
| || 0 || 5+3-1 || configure refresh rate
|-
! SDRCR !! !! !!
|-
| RR (12-0) || 2000 || 156 || 80e6 * 16e-3 / 8192 => less or equal to 156
|-
! SDCR !! !! !!
|-
| SR (31) || 0 || 0 || self refresh mode
|-
| PD (30) || 0 || 0 || power down
|-
| PDWR (29) || 0 || 0 || refresh in PD
|-
| NM (14) || 1 || 1 || narrow mode
|-
| CL (11-9) || 3 || 3 || CAS latency
|-
| BIT11_9LOCK (8) || 1 || 1 || CAS latency lock
|-
| IBANK (6-4) || 2 || 2 (4 banks) || banks
|-
| PAGESIZE (2-0) || 3 || 2 (10 bit) || counted in elements
|}

===SCI port===
We have connected serial port on Expansion Connector P3 (see HDK documentation) pin W3 and N2. TX is connected to N2 pin and RX to W3 pin. This brings us consequences as both pins are mutexed.

When you want to use SCI, you have to set few things in HalCoGen.
* Enable driver SCI (not LIN or SCI2 driver)
* In tab PINMUX select SCI and check conflict with other drivers
* In tab SCI choose and set data format.
When you want use interrupts in adittion, do the following:
* In tab VIM Channel 64-95 select interrupt 64: SCI level0 interrupt for high level interrupt or 74: SCI Level1 for low level interrupt
* In SCI tab enable TX and/or RX interrupt and select High or Low.
* In your code enable IRQ using _enable_IRQ() function, than enable notification using sciEnableNotification() function.
* Implement notification callback sciNotification() in notificatin.c

In your code don't forget to initialize sci using sciInit() function.

== Debug over JTAG ==

=== XDS100v2 JTAG Interface from Ti ===

The XDS100v2 is equipped with Ti specific 14-pin JTAG connector.
Next cable wires placement allows to use it with TMS570LS31x_HDK_Kit
or other device with ARM JTAG pin placement.

{| class="wikitable"
!colspan="2"| 14 pin Ti
!colspan="2"| 20 pin ARM
|-
| 1 || TMS || TMS || 7
|-
| 2 || TRST || NTRST || 3
|-
| 3 || TDI || TDI || 5
|-
| 4 || DIS || GND || 6
|-
| 5 || VD || VREF || 1 (2)
|-
| 6 || NC || || --
|-
| 7 || TDO || TDO || 13
|-
| 8 || GND || GND || (4)
|-
| 9 || RTCK || RTCK || 11
|-
| 10 || GND || GND || 8 (12)
|-
| 11 || TCK || TCK || 9
|-
| 12 || GND || GND || 10 (14)
|-
| 13 || EMU0 || ||
|-
| 14 || EMU1 || ||
|}

=== Setup XDS100v2 on Linux ===

By default the device (if nothing more connected then <code>/dev/ttyUSB0</code>) is added with permissions 664 with
<code>root</code> as user and group. You access the device we need write access for current user. To do so we need
to create a new udev rules:

sudo nano /etc/udev/rules.d/45-pes-rpp.rules

And add line:

SUBSYSTEM=="usb", ATTR{idVendor}=="0403", ATTR{idProduct}=="a6d0", MODE="0660", GROUP="plugdev"

Then reload udev rules with:

sudo udevadm control --reload-rules

You can check device properties like <code>idVendor</code> or <code>idProduct</code> with the following command:

udevadm info -a -p $(udevadm info -q path -n /dev/ttyUSB0)

== RS232 communication setup ==

Connect serial communication pins to computer's RS232 port or to USB through a FTDI adapter. If using RS232 port the
device should be <code>/dev/ttyS0</code>, if using FTDI it should be something like <code>/dev/ttyUSBx</code>
(check <code>dmesg</code> for details).

Make sure minicom or similar terminal program is installed:

sudo apt-get install minicom

Then configure minicon:

sudo minicom -s

And use the following configuration "9600 81N":

Serial Device : /dev/ttyS0
Lockfile Location : /var/lock
Callin Program :
Callout Program :
Bps/Par/Bits : 9600 8N1
Hardware Flow Control : No
Software Flow Control : No

Start terminal session and type <code>HELP</code> command to test communication.

== GCC build for Cortex-R4 Big-Endian ==

GCC options <pre>-mbig-endian -march=armv7-r -mthumb</pre>

GCC options with hard float <pre>-mbig-endian -mthumb -march=armv7-r -mfpu=vfpv3-d16 -mfloat-abi=hard</pre>

GCC multilib options

armv7-r/thumb2/be;@mbig-endian@mthumb@march=armv7-r
armv7-r/thumb2/vfpv3/be;@mbig-endian@mthumb@mfloat-abi=hard@march=armv7-r@mfpu=vfpv3-d16

* https://answers.launchpad.net/gcc-arm-embedded/+question/189066

* Patch to enable GCC and Newlib with big-endian support for RTEMS proposal
** http://lists.rtems.org/pipermail/devel/2014-June/007232.html
** Toolchain for RTEMS port to Cortex-R4F big-endian (TMS570LS3137)

* Sebastian Huber's version to push upstream
** http://lists.rtems.org/pipermail/devel/2014-July/007244.html
** RTEMS: Add multilibs for ARM

* Newlib correction
** http://lists.rtems.org/pipermail/devel/2014-July/007251.html
** Remaining arch issue in Newlib optimized ARM ASM memchr for Cortex-R

== RTEMS Cortex-R4 TMS570 BSP Deveopment (GSoC 2014 project) ==

* http://wiki.rtems.org/wiki/index.php/RTEMSPortToCortexR4
* http://github.com/AoLaD/rtems/tree/tms570-bsp
* http://github.com/AoLaD/rtems-tms570-utils

== Contacts ==

* Management: [http://dce.felk.cvut.cz/hanzalek/ Prof. Zdeněk Hanzálek]
* Technical: [http://cmp.felk.cvut.cz/~pisa/ Pavel Píša, Ph.D.]