https://rtime.felk.cvut.cz/hw/api.php?action=feedcontributions&feedformat=atom&user=Meloumar HW wiki - User contributions [en] 2026-05-20T02:03:35Z User contributions MediaWiki 1.43.8 https://rtime.felk.cvut.cz/hw/index.php?title=LX_CPU1&diff=4111 LX CPU1 2013-09-10T14:40:09Z <p>Meloumar: /* ISE Design Suite */</p> <hr /> <div>This page describes &quot;LX CPU1&quot; developer board made by PiKRON, with LPC1788 and Spartan6.<br /> <br /> == ISE Design Suite ==<br /> <br /> ISE 14.6 is known to work well for Spartan6, WebPack edition is sufficient, however the board is using customized Tumbl core coprocessor, which is based off Microblaze from EDK. You can use versions 13.4+, as there is the fix for errata preventing 9K block ram initialization. Additional information for ISE deployment under Linux system can be found [http://rtime.felk.cvut.cz/hw/index.php/Xilinx_ISE here].<br /> <br /> == Board notes ==<br /> <br /> #DONE pin<br /> #: [http://www.xilinx.com/support/documentation/user_guides/ug380.pdf Xilinx configuration guide] recommends using an external pull-up resistor for DONE pin, 330 Ohms to Vcco_2 voltage.<br /> #BLS1 pin<br /> #: Random problems (reason unknown) occuring with BLS1 not being asserted upon memory bus write transaction (for 32-bit and 16-bit). At the moment it appears to be either soldering problem or HW issue. Identified by memory bus verification failing upon writing the respective bits regardless of External Memory Controller setup.</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=LX_CPU1&diff=4110 LX CPU1 2013-09-10T14:39:55Z <p>Meloumar: /* ISE Design Suite */</p> <hr /> <div>This page describes &quot;LX CPU1&quot; developer board made by PiKRON, with LPC1788 and Spartan6.<br /> <br /> == ISE Design Suite ==<br /> <br /> ISE 14.6 is known to work well for Spartan6, WebPack edition is sufficient, however the board is using customized Tumbl core coprocessor, which is based off Microblaze from EDK. You can use version 13.4+, as there is the fix for errata preventing 9K block ram initialization. Additional information for ISE deployment under Linux system can be found [http://rtime.felk.cvut.cz/hw/index.php/Xilinx_ISE here].<br /> <br /> == Board notes ==<br /> <br /> #DONE pin<br /> #: [http://www.xilinx.com/support/documentation/user_guides/ug380.pdf Xilinx configuration guide] recommends using an external pull-up resistor for DONE pin, 330 Ohms to Vcco_2 voltage.<br /> #BLS1 pin<br /> #: Random problems (reason unknown) occuring with BLS1 not being asserted upon memory bus write transaction (for 32-bit and 16-bit). At the moment it appears to be either soldering problem or HW issue. Identified by memory bus verification failing upon writing the respective bits regardless of External Memory Controller setup.</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=Template:Main_Page/Hardware&diff=4109 Template:Main Page/Hardware 2013-09-10T14:38:07Z <p>Meloumar: /* Hardware */</p> <hr /> <div>== Hardware ==<br /> <br /> * [[A0B36APO Virtual Hardware]]<br /> * [[AT91SAM7X256]]<br /> * [[Boa5200]]<br /> * [[ColdFire_DEMO52233 | ColdFire DEMO52233 (Board from Freescale)]] <br /> * [[ColdFire_MCF548x | ColdFire MCF548x (resources and experiments)]] <br /> * [[FPGA]]<br /> * [[FTDI2232 JTAG]]<br /> * [[H8S/2638]]<br /> * [[HC12 | Motorola HC12]]<br /> * [[Humusoft MF6xx]]<br /> * [[LX CPU1]]<br /> * [[LPC21xx]]<br /> * [[MIDAM MPC5200 DB1]] (Mikroklima)<br /> * [[ML403 | ML403 Xilinx Virtex-4]]<br /> * [[OJ10 - welding robot]]<br /> * [[PiMX1]] i.MX1 processor based board<br /> * [[STM32 VLDISCOVERY]]<br /> * [[TC1798|TC1798 - Infineon AUDO MAX]]<br /> * [[TMS570LS3137]]<br /> * [[Wireless_Sensor_Networks | Wireless Sensor Networks (WSNs)]]<br /> * [[XC2S100-kit|Xilinx Spartan II XC2S100 Demo Board]]<br /> * [[XC2V1000-kit|Xilinx Virtex II XC2V1000 Demo Board]]</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=LX_CPU1&diff=4108 LX CPU1 2013-08-30T09:28:07Z <p>Meloumar: /* Board notes */</p> <hr /> <div>This page describes &quot;LX CPU1&quot; developer board made by PiKRON, with LPC1788 and Spartan6.<br /> <br /> == ISE Design Suite ==<br /> <br /> ISE 14.6 is known to work well for Spartan6, WebPack edition is sufficient if you do not indent to use EDK. You can use version 13.4+, as there is the fix for errata preventing 9K block ram initialization. Additional information for ISE deployment under Linux system can be found [http://rtime.felk.cvut.cz/hw/index.php/Xilinx_ISE here].<br /> <br /> == Board notes ==<br /> <br /> #DONE pin<br /> #: [http://www.xilinx.com/support/documentation/user_guides/ug380.pdf Xilinx configuration guide] recommends using an external pull-up resistor for DONE pin, 330 Ohms to Vcco_2 voltage.<br /> #BLS1 pin<br /> #: Random problems (reason unknown) occuring with BLS1 not being asserted upon memory bus write transaction (for 32-bit and 16-bit). At the moment it appears to be either soldering problem or HW issue. Identified by memory bus verification failing upon writing the respective bits regardless of External Memory Controller setup.</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=LX_CPU1&diff=4107 LX CPU1 2013-08-30T09:27:11Z <p>Meloumar: /* Board notes = */</p> <hr /> <div>This page describes &quot;LX CPU1&quot; developer board made by PiKRON, with LPC1788 and Spartan6.<br /> <br /> == ISE Design Suite ==<br /> <br /> ISE 14.6 is known to work well for Spartan6, WebPack edition is sufficient if you do not indent to use EDK. You can use version 13.4+, as there is the fix for errata preventing 9K block ram initialization. Additional information for ISE deployment under Linux system can be found [http://rtime.felk.cvut.cz/hw/index.php/Xilinx_ISE here].<br /> <br /> == Board notes ==<br /> <br /> #DONE pin<br /> #: [http://www.xilinx.com/support/documentation/user_guides/ug380.pdf Xilinx configuration guide] recommends using an external pull-up resistor for DONE pin, 330 Ohms to Vcco_2 voltage.<br /> #BLS1 pin<br /> #: Random problems (reason unknown) occuring with BLS1 not being asserted upon memory bus write transaction (for 32-bit and 16-bit). At the moment it appears to be either soldering problem or EMC issue. Identified by memory bus verification failing upon writing the respective bits regardless of EMC setup.</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=LX_CPU1&diff=4106 LX CPU1 2013-08-30T09:25:07Z <p>Meloumar: /* ISE Design Suite */</p> <hr /> <div>This page describes &quot;LX CPU1&quot; developer board made by PiKRON, with LPC1788 and Spartan6.<br /> <br /> == ISE Design Suite ==<br /> <br /> ISE 14.6 is known to work well for Spartan6, WebPack edition is sufficient if you do not indent to use EDK. You can use version 13.4+, as there is the fix for errata preventing 9K block ram initialization. Additional information for ISE deployment under Linux system can be found [http://rtime.felk.cvut.cz/hw/index.php/Xilinx_ISE here].<br /> <br /> == Board notes ===<br /> <br /> #DONE pin<br /> #: [http://www.xilinx.com/support/documentation/user_guides/ug380.pdf Xilinx configuration guide] recommends using an external pull-up resistor for DONE pin, 330 Ohms to Vcco_2 voltage.<br /> #BLS1 pin<br /> #: Random problems (reason unknown) occuring with BLS1 not being asserted upon memory bus write transaction (for 32-bit and 16-bit). At the moment it appears to be either soldering problem or EMC issue. Identified by memory bus verification failing upon writing the respective bits regardless of EMC setup.</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=Xilinx_ISE&diff=4105 Xilinx ISE 2013-08-30T09:20:40Z <p>Meloumar: /* Xilix based boards at DCE */</p> <hr /> <div>= Notes for Xilinx ISE version 14.6 under Linux system =<br /> <br /> # ISIM and gcc<br /> #: ISIM binaries have hardcoded gcc path, as &quot;/usr/bin/gcc4&quot; and &quot;/usr/bin/gcc&quot; (in this order), however doesn't work with newest GCC distributions (symbol mismatches during linking). If you run into a trouble (probable with GCC 4.7+ versions), install older GCC (3.3 works fine) and either symlink &quot;/usr/bin/gcc4&quot; to the old one, or modify the binaries with a hex editor and update the path in them. The binaries &quot;fuse&quot;, &quot;vlogcomp&quot; and &quot;vhpcomp&quot; require patching.<br /> # QT and Coregen<br /> #: To prevent mismatches, unset QT_PLUGIN_PATH before running ISE, otherwise Coregen will segfault when running dialogs for source file generation (such as BRAM) due to different QT versions. It may be good to unset the rest of QT_ environmental variables too.<br /> <br /> = Xilix based boards at DCE =<br /> <br /> * [[XC2S100-kit]] includes documentation how to use FTDI2232 based cable with ISE 10.1<br /> * [[XC2V1000-kit]]<br /> * [[ML403]]<br /> * [[LX CPU1]]<br /> <br /> [[Category:FPGA]]</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=LX_CPU1&diff=4104 LX CPU1 2013-08-30T09:19:29Z <p>Meloumar: /* ISE Design Suite */</p> <hr /> <div>This page describes &quot;LX CPU1&quot; developer board made by PiKRON, with LPC1788 and Spartan6.<br /> <br /> == ISE Design Suite ==<br /> <br /> ISE 14.6 is known to work well for Spartan6, WebPack edition is sufficient if you do not indent to use EDK. You can use version 13.4+, as there is the fix for errata preventing 9K block ram initialization. Additional information for ISE deployment under Linux system can be found [http://rtime.felk.cvut.cz/hw/index.php/Xilinx_ISE here].</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=LX_CPU1&diff=4103 LX CPU1 2013-08-30T09:17:22Z <p>Meloumar: /* ISE Design Suite */</p> <hr /> <div>This page describes &quot;LX CPU1&quot; developer board made by PiKRON, with LPC1788 and Spartan6.<br /> <br /> == ISE Design Suite ==<br /> <br /> ISE 14.6 is known to work well for Spartan6. You can use version 13.4+, as there is the fix for errata preventing 9K block ram initialization. Additional information for ISE deployment under Linux system can be found [http://rtime.felk.cvut.cz/hw/index.php/Xilinx_ISE here].</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=Xilinx_ISE&diff=4102 Xilinx ISE 2013-08-30T09:15:09Z <p>Meloumar: English translation</p> <hr /> <div>= Notes for Xilinx ISE version 14.6 under Linux system =<br /> <br /> # ISIM and gcc<br /> #: ISIM binaries have hardcoded gcc path, as &quot;/usr/bin/gcc4&quot; and &quot;/usr/bin/gcc&quot; (in this order), however doesn't work with newest GCC distributions (symbol mismatches during linking). If you run into a trouble (probable with GCC 4.7+ versions), install older GCC (3.3 works fine) and either symlink &quot;/usr/bin/gcc4&quot; to the old one, or modify the binaries with a hex editor and update the path in them. The binaries &quot;fuse&quot;, &quot;vlogcomp&quot; and &quot;vhpcomp&quot; require patching.<br /> # QT and Coregen<br /> #: To prevent mismatches, unset QT_PLUGIN_PATH before running ISE, otherwise Coregen will segfault when running dialogs for source file generation (such as BRAM) due to different QT versions. It may be good to unset the rest of QT_ environmental variables too.<br /> <br /> = Xilix based boards at DCE =<br /> <br /> * [[XC2S100-kit]] includes documentation how to use FTDI2232 based cable with ISE 10.1<br /> * [[XC2V1000-kit]]<br /> * [[ML403]]<br /> <br /> [[Category:FPGA]]</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=Lx_cpu1&diff=4101 Lx cpu1 2013-08-30T09:07:56Z <p>Meloumar: Blanked the page</p> <hr /> <div></div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=Lx_cpu1&diff=4100 Lx cpu1 2013-08-30T09:07:47Z <p>Meloumar: Meloumar moved page Lx cpu1 to LX CPU1</p> <hr /> <div>#REDIRECT [[LX CPU1]]</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=LX_CPU1&diff=4099 LX CPU1 2013-08-30T09:07:47Z <p>Meloumar: Meloumar moved page Lx cpu1 to LX CPU1</p> <hr /> <div>This page describes &quot;LX CPU1&quot; developer board made by PiKRON, with LPC1788 and Spartan6.<br /> <br /> == ISE Design Suite ==</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=LX_CPU1&diff=4098 LX CPU1 2013-08-30T09:07:33Z <p>Meloumar: </p> <hr /> <div>This page describes &quot;LX CPU1&quot; developer board made by PiKRON, with LPC1788 and Spartan6.<br /> <br /> == ISE Design Suite ==</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=LX_CPU1&diff=4097 LX CPU1 2013-08-30T09:05:30Z <p>Meloumar: Created page with &quot;.&quot;</p> <hr /> <div>.</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=Xilinx_ISE&diff=4096 Xilinx ISE 2013-08-24T11:21:55Z <p>Meloumar: /* Poznámky k ISE v 14.6 při použití na systému Linux */</p> <hr /> <div>= Poznámky k ISE v 14.6 při použití na systému Linux =<br /> <br /> # ISIM a gcc<br /> #: V binarkach pro ISIM je natvrdo cesta ke gcc &quot;/usr/bin/gcc4&quot; a pote &quot;/usr/bin/gcc&quot;, ovsem s nejnovejsim gcc nefunguje (problemy se symboly pri linkovani). V mem pripade funguje gcc-3.3 (na internetu pisou problemy od gcc asi 4.7 a vice). Jedna se o binarky: &quot;fuse&quot;, &quot;vlogcomp&quot; a &quot;vhpcomp&quot; (ve slozce unwrapped). Pripade je mozne tyto soubory otevrit v HEX editoru a rucne upravit cestu ke gcc.<br /> <br /> # QT a coregen<br /> #: Je vhodne odnastavit QT_PLUGIN_PATH, jinak se v Coregenu nemusi spustit dialogy pro generovani zdrojovych souboru (alespon u blokove RAM pameti) kvuli ruznym verzim QT.<br /> <br /> = Xilix based boards at DCE =<br /> <br /> * [[XC2S100-kit]] includes documentation how to use FTDI2232 based cable with ISE 10.1<br /> * [[XC2V1000-kit]]<br /> * [[ML403]]<br /> <br /> [[Category:FPGA]]</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3962 ColdFire MCF548x 2011-06-28T20:35:11Z <p>Meloumar: /* Bootloaders */</p> <hr /> <div>== GCC ==<br /> <br /> GCC works correctly with Coldfire since version 4.5.x; however produces badly optimized code (redundant register allocations).<br /> <br /> == Bootloaders ==<br /> <br /> === Coldfire Linux Loader ===<br /> <br /> Coldfire Linux loader in version 0.3.3 supports MCF548x (bootable from SRAM with dBUG; or from Flash). Note that CoLiLo has set harcoded only 9600 baudrate for serial line (edit board.c file to change). In case for MCF5484LITE it also has to be updated with Flash Adress. CoLiLo does not initialize XL Bus arbiter.<br /> <br /> Source Code Archive: [https://rapidshare.com/files/2137542509/colilo-0.3.3-fsl.tar.gz]<br /> <br /> === U-Boot ===<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2, [ftp://ftp.denx.de/pub/u-boot/u-boot-2011.06-rc2.tar.bz2]) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;<br /> <br /> == Linux ==<br /> <br /> Latest kernel officially supported by Freescale is 2.6.25 can be found in BSP package [https://www.freescale.com/webapp/Download?colCode=CWF-MCF547X-548X-2-6-KL&amp;nodeId=015210033202A9&amp;appType=license&amp;location=overview&amp;Parent_nodeId=11490914845966901902A9&amp;Parent_pageType=overview]. A repository of 2.6.31 kernel by Freescale (with support only for Serial and FEC is here [https://dev.openwrt.org/browser/trunk/target/linux/coldfire]. Locally developped port (2.6.37) git repository is here [http://rtime.felk.cvut.cz/gitweb/mcf548x/linux.git], this port is still in development.</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3961 ColdFire MCF548x 2011-06-28T20:33:56Z <p>Meloumar: /* GCC */</p> <hr /> <div>== Bootloaders ==<br /> <br /> === Coldfire Linux Loader ===<br /> <br /> Coldfire Linux loader in version 0.3.3 supports MCF548x (bootable from SRAM with dBUG; or from Flash). Note that CoLiLo has set harcoded only 9600 baudrate for serial line (edit board.c file to change). In case for MCF5484LITE it also has to be updated with Flash Adress. CoLiLo does not initialize XL Bus arbiter.<br /> <br /> Source Code Archive: [https://rapidshare.com/files/2137542509/colilo-0.3.3-fsl.tar.gz]<br /> <br /> === U-Boot ===<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2, [ftp://ftp.denx.de/pub/u-boot/u-boot-2011.06-rc2.tar.bz2]) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;<br /> <br /> == Linux ==<br /> <br /> Latest kernel officially supported by Freescale is 2.6.25 can be found in BSP package [https://www.freescale.com/webapp/Download?colCode=CWF-MCF547X-548X-2-6-KL&amp;nodeId=015210033202A9&amp;appType=license&amp;location=overview&amp;Parent_nodeId=11490914845966901902A9&amp;Parent_pageType=overview]. A repository of 2.6.31 kernel by Freescale (with support only for Serial and FEC is here [https://dev.openwrt.org/browser/trunk/target/linux/coldfire]. Locally developped port (2.6.37) git repository is here [http://rtime.felk.cvut.cz/gitweb/mcf548x/linux.git], this port is still in development.</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3960 ColdFire MCF548x 2011-06-28T20:29:50Z <p>Meloumar: /* Bootloaders */</p> <hr /> <div>== GCC ==<br /> <br /> <br /> <br /> == Bootloaders ==<br /> <br /> === Coldfire Linux Loader ===<br /> <br /> Coldfire Linux loader in version 0.3.3 supports MCF548x (bootable from SRAM with dBUG; or from Flash). Note that CoLiLo has set harcoded only 9600 baudrate for serial line (edit board.c file to change). In case for MCF5484LITE it also has to be updated with Flash Adress. CoLiLo does not initialize XL Bus arbiter.<br /> <br /> Source Code Archive: [https://rapidshare.com/files/2137542509/colilo-0.3.3-fsl.tar.gz]<br /> <br /> === U-Boot ===<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2, [ftp://ftp.denx.de/pub/u-boot/u-boot-2011.06-rc2.tar.bz2]) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;<br /> <br /> == Linux ==<br /> <br /> Latest kernel officially supported by Freescale is 2.6.25 can be found in BSP package [https://www.freescale.com/webapp/Download?colCode=CWF-MCF547X-548X-2-6-KL&amp;nodeId=015210033202A9&amp;appType=license&amp;location=overview&amp;Parent_nodeId=11490914845966901902A9&amp;Parent_pageType=overview]. A repository of 2.6.31 kernel by Freescale (with support only for Serial and FEC is here [https://dev.openwrt.org/browser/trunk/target/linux/coldfire]. Locally developped port (2.6.37) git repository is here [http://rtime.felk.cvut.cz/gitweb/mcf548x/linux.git], this port is still in development.</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3959 ColdFire MCF548x 2011-06-28T20:27:06Z <p>Meloumar: /* Coldfire Linux Loader */</p> <hr /> <div>== Bootloaders ==<br /> <br /> === Coldfire Linux Loader ===<br /> <br /> Coldfire Linux loader in version 0.3.3 supports MCF548x (bootable from SRAM with dBUG; or from Flash). Note that CoLiLo has set harcoded only 9600 baudrate for serial line (edit board.c file to change). In case for MCF5484LITE it also has to be updated with Flash Adress. CoLiLo does not initialize XL Bus arbiter.<br /> <br /> TODO: Add source code archive<br /> <br /> === U-Boot ===<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2, [ftp://ftp.denx.de/pub/u-boot/u-boot-2011.06-rc2.tar.bz2]) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;<br /> <br /> == Linux ==<br /> <br /> Latest kernel officially supported by Freescale is 2.6.25 can be found in BSP package [https://www.freescale.com/webapp/Download?colCode=CWF-MCF547X-548X-2-6-KL&amp;nodeId=015210033202A9&amp;appType=license&amp;location=overview&amp;Parent_nodeId=11490914845966901902A9&amp;Parent_pageType=overview]. A repository of 2.6.31 kernel by Freescale (with support only for Serial and FEC is here [https://dev.openwrt.org/browser/trunk/target/linux/coldfire]. Locally developped port (2.6.37) git repository is here [http://rtime.felk.cvut.cz/gitweb/mcf548x/linux.git], this port is still in development.</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3957 ColdFire MCF548x 2011-06-15T13:41:55Z <p>Meloumar: /* Linux */</p> <hr /> <div>== Bootloaders ==<br /> <br /> === Coldfire Linux Loader ===<br /> <br /> Coldfire Linux loader in version 0.3.3 supports MCF548x (bootable from SRAM with dBUG; or from Flash). Note that CoLiLo has set harcoded only 9600 baudrate for serial line (edit board.c file to change). In case for MCF5484LITE it also has to be updated with Flash Adress. CoLiLo does not initialize XLB arbiter.<br /> <br /> TODO: Add source code archive<br /> <br /> === U-Boot ===<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2, [ftp://ftp.denx.de/pub/u-boot/u-boot-2011.06-rc2.tar.bz2]) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;<br /> <br /> == Linux ==<br /> <br /> Latest kernel officially supported by Freescale is 2.6.25 can be found in BSP package [https://www.freescale.com/webapp/Download?colCode=CWF-MCF547X-548X-2-6-KL&amp;nodeId=015210033202A9&amp;appType=license&amp;location=overview&amp;Parent_nodeId=11490914845966901902A9&amp;Parent_pageType=overview]. A repository of 2.6.31 kernel by Freescale (with support only for Serial and FEC is here [https://dev.openwrt.org/browser/trunk/target/linux/coldfire]. Locally developped port (2.6.37) git repository is here [http://rtime.felk.cvut.cz/gitweb/mcf548x/linux.git], this port is still in development.</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3956 ColdFire MCF548x 2011-06-15T13:35:38Z <p>Meloumar: /* Coldfire Linux Loader */</p> <hr /> <div>== Bootloaders ==<br /> <br /> === Coldfire Linux Loader ===<br /> <br /> Coldfire Linux loader in version 0.3.3 supports MCF548x (bootable from SRAM with dBUG; or from Flash). Note that CoLiLo has set harcoded only 9600 baudrate for serial line (edit board.c file to change). In case for MCF5484LITE it also has to be updated with Flash Adress. CoLiLo does not initialize XLB arbiter.<br /> <br /> TODO: Add source code archive<br /> <br /> === U-Boot ===<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2, [ftp://ftp.denx.de/pub/u-boot/u-boot-2011.06-rc2.tar.bz2]) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;<br /> <br /> == Linux ==</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3955 ColdFire MCF548x 2011-06-15T13:35:30Z <p>Meloumar: /* Coldfire Linux Loader */</p> <hr /> <div>== Bootloaders ==<br /> <br /> ==== Coldfire Linux Loader ====<br /> <br /> Coldfire Linux loader in version 0.3.3 supports MCF548x (bootable from SRAM with dBUG; or from Flash). Note that CoLiLo has set harcoded only 9600 baudrate for serial line (edit board.c file to change). In case for MCF5484LITE it also has to be updated with Flash Adress. CoLiLo does not initialize XLB arbiter.<br /> <br /> TODO: Add source code archive<br /> <br /> === U-Boot ===<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2, [ftp://ftp.denx.de/pub/u-boot/u-boot-2011.06-rc2.tar.bz2]) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;<br /> <br /> == Linux ==</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3954 ColdFire MCF548x 2011-06-15T13:35:18Z <p>Meloumar: /* Bootloaders */</p> <hr /> <div>== Bootloaders ==<br /> <br /> === Coldfire Linux Loader ===<br /> <br /> Coldfire Linux loader in version 0.3.3 supports MCF548x (bootable from SRAM with dBUG; or from Flash). Note that CoLiLo has set harcoded only 9600 baudrate for serial line (edit board.c file to change). In case for MCF5484LITE it also has to be updated with Flash Adress. CoLiLo does not initialize XLB arbiter.<br /> <br /> TODO: Add source code archive<br /> <br /> === U-Boot ===<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2, [ftp://ftp.denx.de/pub/u-boot/u-boot-2011.06-rc2.tar.bz2]) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;<br /> <br /> == Linux ==</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3953 ColdFire MCF548x 2011-06-15T13:34:26Z <p>Meloumar: /* U-Boot */</p> <hr /> <div>== Bootloaders ==<br /> <br /> === Coldfire Linux Loader ===<br /> <br /> Coldfire Linux loader in version 0.3.3 supports MCF548x (bootable from SRAM with dBUG; or from Flash). Note that CoLiLo has set harcoded only 9600 baudrate for serial line (edit board.c file to change). In case for MCF5484LITE it also has to be updated with Flash Adress. CoLiLo does not initialize XLB arbiter.<br /> <br /> TODO: Add source code archive<br /> <br /> === U-Boot ===<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2, [ftp://ftp.denx.de/pub/u-boot/u-boot-2011.06-rc2.tar.bz2]) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3952 ColdFire MCF548x 2011-06-15T13:32:41Z <p>Meloumar: /* Coldfire Linux Loader */</p> <hr /> <div>== Bootloaders ==<br /> <br /> === Coldfire Linux Loader ===<br /> <br /> Coldfire Linux loader in version 0.3.3 supports MCF548x (bootable from SRAM with dBUG; or from Flash). Note that CoLiLo has set harcoded only 9600 baudrate for serial line (edit board.c file to change). In case for MCF5484LITE it also has to be updated with Flash Adress. CoLiLo does not initialize XLB arbiter.<br /> <br /> TODO: Add source code archive<br /> <br /> === U-Boot ===<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3951 ColdFire MCF548x 2011-06-15T13:24:59Z <p>Meloumar: /* Bootloaders */</p> <hr /> <div>== Bootloaders ==<br /> <br /> === Coldfire Linux Loader ===<br /> <br /> === U-Boot ===<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3950 ColdFire MCF548x 2011-06-15T13:24:37Z <p>Meloumar: /* U-Boot */</p> <hr /> <div>== Bootloaders ==<br /> <br /> === U-Boot ===<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3949 ColdFire MCF548x 2011-06-15T13:24:31Z <p>Meloumar: /* Bootloaders */</p> <hr /> <div>== Bootloaders ==<br /> <br /> == U-Boot ==<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=ColdFire_MCF548x&diff=3948 ColdFire MCF548x 2011-06-15T13:24:18Z <p>Meloumar: </p> <hr /> <div>=== Bootloaders ===<br /> <br /> == U-Boot ==<br /> <br /> Current version of U-Boot (u-boot-2011.06-rc2) requires small compilation fixes:<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/Makefile 2011-06-03 18:31:05.849143300 +0200<br /> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk<br /> <br /> # CFLAGS += -DET_DEBUG<br /> <br /> -LIB = lib$(CPU).o<br /> +LIB = $(obj)lib$(CPU).o<br /> <br /> START =<br /> COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/u-boot.lds 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/u-boot.lds 2011-06-03 18:28:15.013291752 +0200<br /> @@ -56,9 +56,9 @@ SECTIONS<br /> /* the sector layout of our flash chips! XXX FIXME XXX */<br /> <br /> arch/m68k/cpu/mcf547x_8x/start.o (.text)<br /> - arch/m68k/lib/traps.o (.text)<br /> + /*arch/m68k/lib/traps.o (.text)<br /> arch/m68k/lib/interrupts.o (.text)<br /> - common/dlmalloc.o (.text)<br /> + common/dlmalloc.o (.text)*/<br /> <br /> . = DEFINED(env_offset) ? env_offset : .;<br /> common/env_embedded.o (.text)<br /> &lt;/pre&gt;<br /> <br /> This patch will allow booting U-Boot from SRAM. This allows keeping original dBUG bootloader on the board and send U-Boot via ethernet and then boot it from SRAM. It requires MBAR on 0x01000000 and SDRAM base on 0x00000000.<br /> <br /> &lt;pre&gt;<br /> diff -rupN u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S<br /> --- u-boot-2011.06-rc2/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/arch/m68k/cpu/mcf547x_8x/start.S 2011-06-05 18:24:40.791112512 +0200<br /> @@ -130,7 +130,7 @@ _start:<br /> move.w #0x2700,%sr /* Mask off Interrupt */<br /> <br /> /* Set vector base register at the beginning of the Flash */<br /> - move.l #CONFIG_SYS_FLASH_BASE, %d0<br /> + move.l #CONFIG_SYS_TEXT_BASE, %d0<br /> movec %d0, %VBR<br /> <br /> move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0<br /> @@ -139,8 +139,11 @@ _start:<br /> move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0<br /> movec %d0, %RAMBAR1<br /> <br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> + /* Don't do this if we are running from SRAM */<br /> move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */<br /> move.c %d0, %MBAR<br /> +#endif<br /> <br /> /* invalidate and disable cache */<br /> move.l #0x01040100, %d0 /* Invalidate cache cmd */<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/config.mk 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/config.mk 2011-06-05 18:05:07.807347260 +0200<br /> @@ -22,4 +22,8 @@<br /> # MA 02111-1307 USA<br /> #<br /> <br /> -CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +ifdef SRAM_BOOT<br /> + CONFIG_SYS_TEXT_BASE = 0x01000000<br /> +else<br /> + CONFIG_SYS_TEXT_BASE = 0xFF800000<br /> +endif<br /> diff -rupN u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c<br /> --- u-boot-2011.06-rc2/board/freescale/m548xevb/m548xevb.c 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/board/freescale/m548xevb/m548xevb.c 2011-06-15 14:45:58.556427667 +0200<br /> @@ -68,13 +70,18 @@ phys_size_t initdram(int board_type)<br /> sdram-&gt;cfg1 = CONFIG_SYS_SDRAM_CFG1;<br /> sdram-&gt;cfg2 = CONFIG_SYS_SDRAM_CFG2;<br /> <br /> +#ifdef CONFIG_SYS_SRAM_BOOT<br /> + /* This is already done; and MODE_EN in ctrl will be disabled. */<br /> + return dramsize;<br /> +#endif<br /> +<br /> /* Issue PALL */<br /> sdram-&gt;ctrl = CONFIG_SYS_SDRAM_CTRL | 2;<br /> <br /> /* Issue LEMR */<br /> sdram-&gt;mode = CONFIG_SYS_SDRAM_EMOD;<br /> sdram-&gt;mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);<br /> <br /> udelay(500);<br /> <br /> /* Issue PALL */<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5475EVB.h u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5475EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5475EVB.h 2011-06-05 18:21:21.431681338 +0200<br /> @@ -239,7 +239,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/include/configs/M5485EVB.h u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h<br /> --- u-boot-2011.06-rc2/include/configs/M5485EVB.h 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/include/configs/M5485EVB.h 2011-06-15 14:29:14.422206634 +0200<br /> @@ -181,8 +181,13 @@<br /> #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK<br /> #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2<br /> <br /> -#define CONFIG_SYS_MBAR 0xF0000000<br /> -#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000)<br /> +#ifndef CONFIG_SYS_SRAM_BOOT<br /> +#define CONFIG_SYS_MBAR 0xF0000000 /* And we use that value because of? */<br /> +#else<br /> +#define CONFIG_SYS_MBAR 0x10000000<br /> +#endif<br /> +<br /> +#define CONFIG_SYS_INTSRAM (CONFIG_SYS_MBAR + 0x10000) /* ??? */<br /> #define CONFIG_SYS_INTSRAMSZ 0x8000<br /> <br /> /*#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000)*/<br /> @@ -225,7 +230,7 @@<br /> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400<br /> #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) &lt;&lt; 20)<br /> <br /> -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)<br /> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)<br /> #define CONFIG_SYS_MONITOR_LEN (256 &lt;&lt; 10) /* Reserve 256 kB for Monitor */<br /> <br /> #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024<br /> diff -rupN u-boot-2011.06-rc2/Makefile u-boot-2011.06-rc2-mod/Makefile<br /> --- u-boot-2011.06-rc2/Makefile 2011-06-02 23:19:27.000000000 +0200<br /> +++ u-boot-2011.06-rc2-mod/Makefile 2011-06-15 11:54:54.643463575 +0200<br /> @@ -758,6 +758,45 @@ M5485HFE_config : unconfig<br /> fi<br /> @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> <br /> +M5485AFE_SRAM_config \<br /> +M5485BFE_SRAM_config \<br /> +M5485CFE_SRAM_config \<br /> +M5485DFE_SRAM_config \<br /> +M5485EFE_SRAM_config \<br /> +M5485FFE_SRAM_config \<br /> +M5485GFE_SRAM_config \<br /> +M5485HFE_SRAM_config : unconfig<br /> + @case &quot;$@&quot; in \<br /> + M5485AFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485BFE_SRAM_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485CFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485DFE_SRAM_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \<br /> + M5485EFE_SRAM_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \<br /> + M5485FFE_SRAM_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \<br /> + M5485GFE_SRAM_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \<br /> + M5485HFE_SRAM_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \<br /> + esac; \<br /> + echo &quot;#define CONFIG_SYS_BUSCLK 100000000&quot; &gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_BOOTSZ $${BOOT}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ $${RAM}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + echo &quot;#define CONFIG_SYS_SRAM_BOOT&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + if [ &quot;$${RAM1}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_DRAMSZ1 $${RAM1}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${CODE}&quot; != &quot;0&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_NOR1SZ $${CODE}&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${VID}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_VIDEO&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi; \<br /> + if [ &quot;$${USB}&quot; == &quot;1&quot; ] ; then \<br /> + echo &quot;#define CONFIG_SYS_USBCTRL&quot; &gt;&gt; $(obj)include/config.h ; \<br /> + fi<br /> + <br /> + @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale<br /> + #add the ram switch to config.mk<br /> + echo &quot;SRAM_BOOT = 1&quot; &gt;&gt; $(obj)include/config.mk<br /> +<br /> #========================================================================<br /> # ARM<br /> #========================================================================<br /> &lt;/pre&gt;</div> Meloumar https://rtime.felk.cvut.cz/hw/index.php?title=File:U-boot_coldfire_compilation_error.txt&diff=3947 File:U-boot coldfire compilation error.txt 2011-06-15T13:05:22Z <p>Meloumar: Fixes compilation error for u-boot for Coldfire.</p> <hr /> <div>Fixes compilation error for u-boot for Coldfire.</div> Meloumar