From 16cbb9ac085b3fcdec89c60539a4ef0f85edd9b0 Mon Sep 17 00:00:00 2001 From: Anurag Kumar Vulisha Date: Fri, 1 Mar 2019 14:38:36 +0000 Subject: [PATCH] usb: dwc3: otg: mask host/device soft reset from affecting the phy Setting OCFG.OTGSFTRSTMASK bit masks reset signal issued either from host or device soft reset from affecting the reset signal outputs sent to the phy. This patch sets programs this bit when starting host or peripheral mode Signed-off-by: Anurag Kumar Vulisha Signed-off-by: Michal Simek --- drivers/usb/dwc3/otg.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/usb/dwc3/otg.c b/drivers/usb/dwc3/otg.c index 157f926712ef..47168eaae02b 100644 --- a/drivers/usb/dwc3/otg.c +++ b/drivers/usb/dwc3/otg.c @@ -297,6 +297,7 @@ static int start_host(struct dwc3_otg *otg) int flg; u32 octl; u32 osts; + u32 ocfg; u32 dctl; struct usb_hcd *hcd; struct xhci_hcd *xhci; @@ -306,6 +307,14 @@ static int start_host(struct dwc3_otg *otg) if (!otg->otg.host) return -ENODEV; + /* + * Prevent the host USBCMD.HCRST from resetting OTG core by setting + * OCFG.OTGSftRstMsk + */ + ocfg = otg_read(otg, OCFG); + ocfg |= DWC3_OCFG_SFTRSTMASK; + otg_write(otg, OCFG, ocfg); + dctl = otg_read(otg, DCTL); if (dctl & DWC3_DCTL_RUN_STOP) { otg_dbg(otg, "Disabling the RUN/STOP bit\n"); @@ -497,11 +506,20 @@ static void start_peripheral(struct dwc3_otg *otg) { struct usb_gadget *gadget = otg->otg.gadget; struct dwc3 *dwc = otg->dwc; + u32 ocfg; otg_dbg(otg, "\n"); if (!gadget) return; + /* + * Prevent the gadget DCTL.CSFTRST from resetting OTG core by setting + * OCFG.OTGSftRstMsk + */ + ocfg = otg_read(otg, OCFG); + ocfg |= DWC3_OCFG_SFTRSTMASK; + otg_write(otg, OCFG, ocfg); + if (!set_peri_mode(otg, PERI_MODE_PERIPHERAL)) otg_err(otg, "Failed to set peripheral mode\n"); -- 2.39.2