]> rtime.felk.cvut.cz Git - zynq/linux.git/commit
drm: xilinx: sdi: correcting interlaced modes values
authorSaurabh Sengar <saurabh.singh@xilinx.com>
Mon, 21 Aug 2017 07:11:44 +0000 (12:41 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 24 Aug 2017 14:32:56 +0000 (16:32 +0200)
commitfb9a8f7a0e559413d2ceb29c4a8dd40887001cff
tree54b307b16b44cea381d1b3997c1068d7be62a991
parent3b94edc4c8aa7c6f07f99a52c1d85ad9e27d5ec0
drm: xilinx: sdi: correcting interlaced modes values

Interlaced vertical line values should be half then progressive mode

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/gpu/drm/xilinx/xilinx_drm_sdi.c