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Xilinx: ARM: EmacPs Driver: Added a write to ISR to clear the interrupt status
authorAnirudha Sarangi <anirudh@xhdrdevl6.(none)>
Wed, 14 Dec 2011 04:59:00 +0000 (10:29 +0530)
committerJohn Linn <john.linn@xilinx.com>
Thu, 15 Dec 2011 01:10:19 +0000 (17:10 -0800)
commitd1bbfd16c4bf7c012dce590a940820cbc2019f10
treec30f575d46265adc43d244888ed905db7f2ae3fbtree | snapshot
parent4ae132221d54a31970a417dae47ef96aaa8fe3f1commit | diff
Xilinx: ARM: EmacPs Driver: Added a write to ISR to clear the interrupt status

The GEM interrupt status register needs a write to clear the interrupt status
bits. This write was missing in the function xemacps_reset_hw. Added this write
to clear the interrupt status bits during a reset/initialization.

Signed-off-by:Anirudha <anirudh@xilinx.com>
drivers/net/xilinx_emacps.c diff | blob | history
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