]> rtime.felk.cvut.cz Git - zynq/linux.git/commit
axidma: xilinx: Make boolean DT properties real bools
authorSrikanth Thokala <srikanth.thokala@xilinx.com>
Wed, 18 Sep 2013 11:57:40 +0000 (17:27 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 19 Sep 2013 08:08:41 +0000 (10:08 +0200)
commitcd02885cdcae13d1fc02c2b9330c73c21df90e94
tree296a742d33ad8f3129176f69e0f4bf71f973500b
parent09795b4e78bac80446b1208337a355a4a446b7a3
axidma: xilinx: Make boolean DT properties real bools

has_sg and has_dre fields of channel structure are changed
to boolean type

Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/dma/xilinx/xilinx_axidma.c