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(parent: e2fb437) | patch
PCI: XDMA PL PCIe: Add documentation for MSI DECODE mode.
authorBharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Thu, 10 May 2018 12:59:22 +0000 (18:29 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Fri, 11 May 2018 13:51:28 +0000 (15:51 +0200)
commitac318a8d008b6c53dc5b01d6e3273a4761803f5a
treeba87b3b5a3059a26b7b1aa8b96861fadb7db11eetree | snapshot
parente2fb4372e66bee356feef71cfc1d697d4bb28125commit | diff
PCI: XDMA PL PCIe: Add documentation for MSI DECODE mode.

The XDMA IP now support MSI decode mode along with existing
MSI FIFO mode.
The new DECODE mode uses three GIC IRQ lines, one for legacy
and error, two for lower and upper 32 MSI.

Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Documentation/devicetree/bindings/pci/xilinx-xdma-pl-pcie.txt diff | blob | history
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