]> rtime.felk.cvut.cz Git - zynq/linux.git/commit
projects / zynq / linux.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 67d1351) | patch
Xilinx: ARM: Adding L2 cache to defconfigs for PEEP5
authorJohn Linn <john.linn@xilinx.com>
Wed, 25 Aug 2010 19:35:40 +0000 (13:35 -0600)
committerJohn Linn <john.linn@xilinx.com>
Wed, 25 Aug 2010 19:35:40 +0000 (13:35 -0600)
commit8a0431a34f897f81ced27349b8a68803d47693e6
tree8bbe5ac5b0eb01ea206e2d8cbe6c6d078277b679tree | snapshot
parent67d1351e7c9b1c67aec20d5e8dc440a32a7c73b2commit | diff
Xilinx: ARM: Adding L2 cache to defconfigs for PEEP5

PEEP4 had problems with the L2 cache on.  This enables L2 cache
as we're seeing good results with PEEP5.
arch/arm/configs/xilinx_defconfig diff | blob | history
arch/arm/configs/xilinx_smp_defconfig diff | blob | history
Linux kenrel for Xilinx Zynq