media: xilinx: dma: Change vdma configuration to cyclic-mode
VDMA in non-cyclic mode doesn't work with fsync enabled. Fsync is needed
to synchronize the pipeline with external input. So VDMA is configured to
cyclic mode in this patch, with fsync enabled at synthesis. This patch is
the only way to run the pipeline with external input, and it will be
revisited after IP level investigation.