]> rtime.felk.cvut.cz Git - zynq/linux.git/commit
reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller.
authorNava kishore Manne <nava.manne@xilinx.com>
Fri, 25 Jan 2019 07:46:54 +0000 (13:16 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 29 Jan 2019 13:08:40 +0000 (14:08 +0100)
commit62f0d7dc3bae9f7ce2701d6c8cfd3d93130017af
tree3c9a25263e65d7afb2f9d807a02700ee2cb932ab
parent3f1b66be4aaa5dbe0a16197bfdfc355cf1da7701
reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller.

Add a reset controller driver for Xilinx Zynq UltraScale+ MPSoC.
The zynqmp reset-controller has the ability to reset lines
connected to different blocks and peripheral in the Soc.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/reset/Makefile
drivers/reset/reset-zynqmp.c [new file with mode: 0644]