]> rtime.felk.cvut.cz Git - zynq/linux.git/commit
projects / zynq / linux.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 5b8a2d2) | patch
net: ethernet: axienet: Add clock support
authorKedareswara rao Appana <appana.durga.rao@xilinx.com>
Wed, 8 Mar 2017 10:52:17 +0000 (16:22 +0530)
committerMichal Simek <monstr@monstr.eu>
Tue, 3 Oct 2017 15:26:31 +0000 (17:26 +0200)
commit330549c05438ab7a8c701bfecf066bfc147c317f
tree197babe7117c2213be75363cc746b91f46e635f6tree | snapshot
parent5b8a2d255641b1047c3b7e588372fb1fe1bade7fcommit | diff
net: ethernet: axienet: Add clock support

This patch adds clock support in the driver.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/net/ethernet/xilinx/xilinx_axienet.h diff | blob | history
drivers/net/ethernet/xilinx/xilinx_axienet_main.c diff | blob | history
Linux kenrel for Xilinx Zynq