net: ethernet: Fix issues in the driver when DRE is not enabled in the h/w
If DRE (Data realignment engine) is not enabled in the DMA h/w,
SW has to take care of the alignment of the buffers.
Currently driver is not handling alignment of buffers properly,
Resulting weired behaviour when try to test the ethernet interface
with these kind of designs.
This patch fixes this issue by allocating a pool of tx buffers
In the driver when DRE is not enabled in the h/w.
When there is an unaligned skb comes it will use those
Allocated tx buffers when DRE is not enabled in the h/w.
Note: When DRE is not enabled in the h/w the tx
Side performance will be very less as there is
a manual copy in the hard_xmit for this case.
Tx Perf Numbers on ZynqMP:
Without DRE: 248 Mbits/sec.
With DRE: 932 Mbits/sec.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>