Adding initial suspend support to the Zynq architecture. The
required suspend functions are implemented and suspend is at least
partially working.
Clock gating and PLL bypassing heavily depend on device drivers.
It's likely that drivers/HW not implementing proper suspend
and resume callbacks break when a suspend is triggered.
During suspend DRAM is put into self-refresh and all DDR related
clocks are stopped and the DDR PLL is bypassed.
Also leave L2 cache enabled during suspend and enable A9 clock gating
feature.
Having self-refresh enabled at all times negatively affects
memory performance. Hence, only enable clock-stop at boot and limit
self-refresh to suspend.