Merge branch '4.0.8-rt6'

[zynq/linux.git] / arch / arm / mach-spear / platsmp.c

diff --git a/arch/arm/mach-spear/platsmp.c b/arch/arm/mach-spear/platsmp.c
index fd4297713d679c477b6b623c1162eff03c402f82..b0553b2c2d53ff7488c8410646301cf5a8cd0b84 100644 (file)
--- a/arch/arm/mach-spear/platsmp.c
+++ b/arch/arm/mach-spear/platsmp.c
@@ -32,7 +32,7 @@ static void write_pen_release(int val)
        sync_cache_w(&pen_release);
 }
 
-static DEFINE_SPINLOCK(boot_lock);
+static DEFINE_RAW_SPINLOCK(boot_lock);
 
 static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
 
@@ -47,8 +47,8 @@ static void spear13xx_secondary_init(unsigned int cpu)
        /*
         * Synchronise with the boot thread.
         */
-       spin_lock(&boot_lock);
-       spin_unlock(&boot_lock);
+       raw_spin_lock(&boot_lock);
+       raw_spin_unlock(&boot_lock);
 }
 
 static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
@@ -59,7 +59,7 @@ static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
         * set synchronisation state between this boot processor
         * and the secondary one
         */
-       spin_lock(&boot_lock);
+       raw_spin_lock(&boot_lock);
 
        /*
         * The secondary processor is waiting to be released from
@@ -84,7 +84,7 @@ static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
         * now the secondary core is starting up let it run its
         * calibrations, then wait for it to finish
         */
-       spin_unlock(&boot_lock);
+       raw_spin_unlock(&boot_lock);
 
        return pen_release != -1 ? -ENOSYS : 0;
 }