]> rtime.felk.cvut.cz Git - zynq/linux.git/blobdiff - drivers/gpu/drm/i915/intel_sprite.c
Apply preempt_rt patch-4.9-rt1.patch.xz
[zynq/linux.git] / drivers / gpu / drm / i915 / intel_sprite.c
index dbed12c484c9d5d5f3af0529caa4746737f4b007..5c540b78e8b571c4b57aadb9fd3ee300dec86e79 100644 (file)
@@ -35,6 +35,7 @@
 #include <drm/drm_rect.h>
 #include <drm/drm_atomic.h>
 #include <drm/drm_plane_helper.h>
+#include <linux/locallock.h>
 #include "intel_drv.h"
 #include "intel_frontbuffer.h"
 #include <drm/i915_drm.h>
@@ -65,6 +66,8 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
                            1000 * adjusted_mode->crtc_htotal);
 }
 
+static DEFINE_LOCAL_IRQ_LOCK(pipe_update_lock);
+
 /**
  * intel_pipe_update_start() - start update of a set of display registers
  * @crtc: the crtc of which the registers are going to be updated
@@ -95,7 +98,7 @@ void intel_pipe_update_start(struct intel_crtc *crtc)
        min = vblank_start - intel_usecs_to_scanlines(adjusted_mode, 100);
        max = vblank_start - 1;
 
-       local_irq_disable();
+       local_lock_irq(pipe_update_lock);
 
        if (min <= 0 || max <= 0)
                return;
@@ -125,11 +128,11 @@ void intel_pipe_update_start(struct intel_crtc *crtc)
                        break;
                }
 
-               local_irq_enable();
+               local_unlock_irq(pipe_update_lock);
 
                timeout = schedule_timeout(timeout);
 
-               local_irq_disable();
+               local_lock_irq(pipe_update_lock);
        }
 
        finish_wait(wq, &wait);
@@ -181,7 +184,7 @@ void intel_pipe_update_end(struct intel_crtc *crtc, struct intel_flip_work *work
                crtc->base.state->event = NULL;
        }
 
-       local_irq_enable();
+       local_unlock_irq(pipe_update_lock);
 
        if (crtc->debug.start_vbl_count &&
            crtc->debug.start_vbl_count != end_vbl_count) {