Apply preempt_rt patch-4.9-rt1.patch.xz

[zynq/linux.git] / arch / arm / mach-omap2 / omap-smp.c

diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index b4de3da6dffa5e0593dad0ca305895fc9c341e6a..b52893319d75852250ed3298eff213fb4055e983 100644 (file)
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -64,7 +64,7 @@ static const struct omap_smp_config omap5_cfg __initconst = {
        .startup_addr = omap5_secondary_startup,
 };
 
-static DEFINE_SPINLOCK(boot_lock);
+static DEFINE_RAW_SPINLOCK(boot_lock);
 
 void __iomem *omap4_get_scu_base(void)
 {
@@ -131,8 +131,8 @@ static void omap4_secondary_init(unsigned int cpu)
        /*
         * Synchronise with the boot thread.
         */
-       spin_lock(&boot_lock);
-       spin_unlock(&boot_lock);
+       raw_spin_lock(&boot_lock);
+       raw_spin_unlock(&boot_lock);
 }
 
 static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
@@ -146,7 +146,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
         * Set synchronisation state between this boot processor
         * and the secondary one
         */
-       spin_lock(&boot_lock);
+       raw_spin_lock(&boot_lock);
 
        /*
         * Update the AuxCoreBoot0 with boot state for secondary core.
@@ -223,7 +223,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
         * Now the secondary core is starting up let it run its
         * calibrations, then wait for it to finish
         */
-       spin_unlock(&boot_lock);
+       raw_spin_unlock(&boot_lock);
 
        return 0;
 }